diff options
Diffstat (limited to 'py/waf/defaults')
-rw-r--r-- | py/waf/defaults/__init__.py | 2 | ||||
-rw-r--r-- | py/waf/defaults/bsp/__init__.py | 17 | ||||
-rw-r--r-- | py/waf/defaults/bsp/arm.py | 720 | ||||
-rw-r--r-- | py/waf/defaults/bsp/avr.py | 15 | ||||
-rw-r--r-- | py/waf/defaults/bsp/bfin.py | 48 | ||||
-rw-r--r-- | py/waf/defaults/bsp/h8300.py | 27 | ||||
-rw-r--r-- | py/waf/defaults/bsp/i386.py | 74 | ||||
-rw-r--r-- | py/waf/defaults/bsp/lm32.py | 36 | ||||
-rw-r--r-- | py/waf/defaults/bsp/m32c.py | 17 | ||||
-rw-r--r-- | py/waf/defaults/bsp/m32r.py | 15 | ||||
-rw-r--r-- | py/waf/defaults/bsp/m68k.py | 271 | ||||
-rw-r--r-- | py/waf/defaults/bsp/mips.py | 80 | ||||
-rw-r--r-- | py/waf/defaults/bsp/moxie.py | 17 | ||||
-rw-r--r-- | py/waf/defaults/bsp/nios2.py | 16 | ||||
-rw-r--r-- | py/waf/defaults/bsp/powerpc.py | 914 | ||||
-rw-r--r-- | py/waf/defaults/bsp/sh.py | 87 | ||||
-rw-r--r-- | py/waf/defaults/bsp/sparc.py | 62 | ||||
-rw-r--r-- | py/waf/defaults/bsp/sparc64.py | 27 | ||||
-rw-r--r-- | py/waf/defaults/bsp/v850.py | 70 | ||||
-rw-r--r-- | py/waf/defaults/options.py | 2700 |
20 files changed, 5215 insertions, 0 deletions
diff --git a/py/waf/defaults/__init__.py b/py/waf/defaults/__init__.py new file mode 100644 index 0000000000..4bad4a5dbd --- /dev/null +++ b/py/waf/defaults/__init__.py @@ -0,0 +1,2 @@ +from .options import * +from .bsp import * diff --git a/py/waf/defaults/bsp/__init__.py b/py/waf/defaults/bsp/__init__.py new file mode 100644 index 0000000000..e71761df16 --- /dev/null +++ b/py/waf/defaults/bsp/__init__.py @@ -0,0 +1,17 @@ +from . import arm +from . import avr +from . import bfin +from . import h8300 +from . import i386 +from . import lm32 +from . import m32c +from . import m32r +from . import m68k +from . import mips +from . import moxie +from . import nios2 +from . import powerpc +from . import sh +from . import sparc +from . import sparc64 +from . import v850 diff --git a/py/waf/defaults/bsp/arm.py b/py/waf/defaults/bsp/arm.py new file mode 100644 index 0000000000..2f86cde4db --- /dev/null +++ b/py/waf/defaults/bsp/arm.py @@ -0,0 +1,720 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "arm" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class csb336(Base): + name = "arm/csb336" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb336/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class csb337_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ENABLE_LCD = Default + c.ENABLE_UMON = True + c.ENABLE_UMON_CONSOLE = True + + def header(self, c): + c.ENABLE_USART0 = True + c.ENABLE_USART1 = True + c.ENABLE_USART2 = True + c.ENABLE_USART3 = True + c.csb637 = Default + + + +class csb637(csb337_shared): + name = "arm/csb637" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb637', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.csb637 = True + + + +class csb337(csb337_shared): + name = "arm/csb337" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + + +class kit637_v6(csb337_shared): + name = "arm/kit637_v6" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/csb337/startup/linkcmds.csb337', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.csb637 = True + + + + +class lm3s_shared(Base): + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + + def header(self, c): + c.BSP_SMALL_MEMORY = True + c.LM3S69XX_ENABLE_UART_0 = Default + c.LM3S69XX_ENABLE_UART_1 = Default + c.LM3S69XX_ENABLE_UART_2 = Default + c.LM3S69XX_HAS_UDMA = Default + c.LM3S69XX_MCU_LM3S3749 = Default + c.LM3S69XX_MCU_LM3S6965 = Default + c.LM3S69XX_SSI_CLOCK = Default + c.LM3S69XX_SYSTEM_CLOCK = Default + c.LM3S69XX_UART_BAUD = Default + c.LM3S69XX_USE_AHB_FOR_GPIO = Default + + +class lm3s3749(lm3s_shared): + name = "arm/lm3s3749" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s3749', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_HAS_UDMA = True + c.LM3S69XX_XTAL_CONFIG = Default + c.LM3S69XX_MCU_LM3S3749 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 8 + c.LM3S69XX_NUM_SSI_BLOCKS = 2 + c.LM3S69XX_USE_AHB_FOR_GPIO = True + +class lm3s6965(lm3s_shared): + name = "arm/lm3s6965" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_XTAL_CONFIG = "0xE" + c.LM3S69XX_MCU_LM3S6965 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 7 + + +class lm3s6965_qemu(lm3s_shared): + name = "arm/lm3s6965_qemu" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lm3s69xx/startup/linkcmds.lm3s6965_qemu', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.LM3S69XX_XTAL_CONFIG = "0xE" + c.LM3S69XX_MCU_LM3S6965 = True + c.LM3S69XX_NUM_GPIO_BLOCKS = 7 + + +class lpc17xx_shared(Base): + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.LPC24XX_CCLK = Default + c.LPC24XX_CONFIG_CONSOLE = Default + c.LPC24XX_CONFIG_I2C_2 = Default + c.LPC24XX_CONFIG_UART_1 = Default + c.LPC24XX_EMC_TEST = Default + c.LPC24XX_ETHERNET_RMII = Default + c.LPC24XX_OSCILLATOR_MAIN = Default + c.LPC24XX_OSCILLATOR_RTC = Default + c.LPC24XX_STOP_ETHERNET = Default + c.LPC24XX_STOP_GPDMA = Default + c.LPC24XX_STOP_USB = Default + c.LPC24XX_UART_BAUD = Default + c.LPC24XX_PCLKDIV = Default + c.LPC24XX_EMCCLKDIV = Default + c.LPC24XX_EMC_MT48LC4M16A2 = Default + c.LPC24XX_EMC_W9825G2JB75I = Default + c.LPC24XX_EMC_IS42S32800D7 = Default + c.LPC24XX_EMC_IS42S32800B = Default + c.LPC24XX_EMC_M29W160E = Default + c.LPC24XX_EMC_M29W320E70 = Default + c.LPC24XX_EMC_SST39VF3201 = Default + c.LPC24XX_CONFIG_UART_2 = Default + c.LPC24XX_CONFIG_UART_3 = Default + c.LPC24XX_CONFIG_I2C_0 = Default + c.LPC24XX_CONFIG_I2C_1 = Default + c.LPC_DMA_CHANNEL_COUNT = 8 + c.BSP_START_RESET_VECTOR = Default + c.BSP_USB_OTG_TRANSCEIVER_I2C_ADDR = "(0x2f << 1)" + + + +class lpc17xx_ea_ram(lpc17xx_shared): + name = "arm/lpc17xx_ea_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "96000000U" + c.LPC24XX_PCLKDIV = "2U" + c.LPC24XX_EMCCLKDIV = "2U" + + +class lpc17xx_ea_rom_int(lpc17xx_shared): + name = "arm/lpc17xx_ea_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_ea_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "96000000U" + c.LPC24XX_PCLKDIV = "2U" + c.LPC24XX_EMC_IS42S32800B = True + +class lpc17xx_plx800_ram(lpc17xx_shared): + name = "arm/lpc17xx_plx800_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + pass + +class lpc17xx_plx800_rom_int(lpc17xx_shared): + name = "arm/lpc17xx_plx800_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc17xx_plx800_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_EMC_M29W320E70 = True + + +class edb7312(Base): + name = "arm/edb7312" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/edb7312/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.ON_SKYEYE = Default + + + +class gba(Base): + name = "arm/gba" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/gba/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gdbarmsim_shared(Base): + def build(self, c): + pass + + +class arm1136jfs(gdbarmsim_shared): + name = "arm/arm1136jfs" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1136jf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm1136js(gdbarmsim_shared): + name = "arm/arm1136js" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1136j-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class armcortexa9(gdbarmsim_shared): + name = "arm/armcortexa9" + + def build(self, c): + c.CFLAGS = ['-mcpu=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm7tdmi(gdbarmsim_shared): + name = "arm/arm7tdmi" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class arm920(gdbarmsim_shared): + name = "arm/arm920" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm920', '-mfloat-abi=soft', '-mfpu=vfp'] + c.LINKCMDS = ['src/lib/libbsp/arm/gdbarmsim/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gp32(Base): + name = "arm/gp32" + + def build(self, c): + c.CFLAGS = ['-DCPU_S3C2400', '-mcpu=arm920t', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=32'] + c.LINKCMDS = ['src/lib/libbsp/arm/gp32/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class gumstix(Base): + name = "arm/gumstix" + + def build(self, c): + c.CFLAGS = ['-mcpu=xscale', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/gumstix/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ON_SKYEYE = Default + + def header(self, c): + c.ON_SKYEYE = Default + + + +class lpc24xx_shared(Base): + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.LPC24XX_CCLK = Default + c.LPC24XX_CONFIG_CONSOLE = Default + c.LPC24XX_CONFIG_I2C_2 = Default + c.LPC24XX_CONFIG_UART_1 = Default + c.LPC24XX_EMC_TEST = Default + c.LPC24XX_ETHERNET_RMII = Default + c.LPC24XX_OSCILLATOR_MAIN = Default + c.LPC24XX_OSCILLATOR_RTC = Default + c.LPC24XX_STOP_ETHERNET = Default + c.LPC24XX_STOP_GPDMA = Default + c.LPC24XX_STOP_USB = Default + c.LPC24XX_UART_BAUD = Default + c.LPC24XX_PCLKDIV = Default + c.LPC24XX_EMCCLKDIV = Default + c.LPC24XX_EMC_MT48LC4M16A2 = Default + c.LPC24XX_EMC_W9825G2JB75I = Default + c.LPC24XX_EMC_IS42S32800D7 = Default + c.LPC24XX_EMC_IS42S32800B = Default + c.LPC24XX_EMC_M29W160E = Default + c.LPC24XX_EMC_M29W320E70 = Default + c.LPC24XX_EMC_SST39VF3201 = Default + c.LPC24XX_CONFIG_UART_2 = Default + c.LPC24XX_CONFIG_UART_3 = Default + c.LPC24XX_CONFIG_I2C_0 = Default + c.LPC24XX_CONFIG_I2C_1 = Default + c.LPC_DMA_CHANNEL_COUNT = Default + c.BSP_START_RESET_VECTOR = Default + c.BSP_USB_OTG_TRANSCEIVER_I2C_ADDR = Default + + +class lpc24xx_ncs_rom_ext(lpc24xx_shared): + name = "arm/lpc24xx_ncs_rom_ext" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_rom_ext', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "0x80000040" + c.LPC24XX_EMC_MT48LC4M16A2 = True + c.BSP_START_RESET_VECTOR = "0x80000040" + +class lpc24xx_ncs_rom_int(lpc24xx_shared): + name = "arm/lpc24xx_ncs_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_EMC_M29W320E70 = True + c.BSP_START_RESET_VECTOR = "0x80000040" + + +class lpc24xx_plx800_ram(lpc24xx_shared): + name = "arm/lpc24xx_plx800_ram" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_plx800_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "51612800U" + c.LPC24XX_CONFIG_UART_1 = False + c.LPC24XX_CONFIG_UART_2 = Default + + +class lpc24xx_plx800_rom_int(lpc24xx_shared): + name = "arm/lpc24xx_plx800_rom_int" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_plx800_rom_int', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CCLK = "51612800U" + c.LPC24XX_CONFIG_UART_1 = False + c.LPC24XX_CONFIG_UART_2 = Default + + +class lpc24xx_ea(lpc24xx_shared): + name = "arm/lpc24xx_ea" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ea', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_ETHERNET_RMII = True + c.BSP_START_RESET_VECTOR = "0x80000040" + + +class lpc23xx_tli800(lpc24xx_shared): + name = "arm/lpc23xx_tli800" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc23xx_tli800', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_OSCILLATOR_MAIN = "3686400U" + c.LPC24XX_CCLK = "58982400U" + c.LPC24XX_HEAP_EXTEND = True + +class lpc2362(lpc24xx_shared): + name = "arm/lpc2362" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2362', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_OSCILLATOR_MAIN = "3686400U" + c.LPC24XX_CCLK = "58982400U" + c.LPC24XX_HEAP_EXTEND = True + + +#XXX: Some of the armv4 linkcmds are unnessicary (when armv7 is used) +class lpc24xx_ncs_ram(lpc24xx_shared): + name = "arm/lpc24xx_ncs_ram" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm7tdmi-s', '-mthumb', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc24xx_ncs_ram', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC24XX_CONFIG_I2C_1 = 1 + + +class lpc32xx_shared(Base): + + def header(self, c): + c.BSP_SMALL_MEMORY = Default + c.BSP_START_RESET_VECTOR = "" + c.LPC32XX_ARM_CLK = Default + c.LPC32XX_CONFIG_U3CLK = Default + c.LPC32XX_CONFIG_U4CLK = Default + c.LPC32XX_CONFIG_U5CLK = Default + c.LPC32XX_CONFIG_U6CLK = Default + c.LPC32XX_CONFIG_UART_CLKMODE = Default + c.LPC32XX_DISABLE_MMU = Default + c.LPC32XX_DISABLE_READ_ONLY_PROTECTION = Default + c.LPC32XX_DISABLE_READ_WRITE_DATA_CACHE = Default + c.LPC32XX_ENABLE_WATCHDOG_RESET = Default + c.LPC32XX_ETHERNET_RMII = Default + c.LPC32XX_HCLK = Default + c.LPC32XX_OSCILLATOR_MAIN = Default + c.LPC32XX_OSCILLATOR_RTC = Default + c.LPC32XX_PERIPH_CLK = Default + c.LPC32XX_STOP_ETHERNET = Default + c.LPC32XX_STOP_GPDMA = Default + c.LPC32XX_STOP_USB = Default + c.LPC32XX_UART_1_BAUD = Default + c.LPC32XX_UART_2_BAUD = Default + c.LPC32XX_UART_7_BAUD = Default + c.TESTS_USE_PRINTK = True + + + +class lpc32xx_mzx_stage_1(lpc32xx_shared): + name = "arm/lpc32xx_mzx_stage_1" + + def build(self, c): + # XXX: -Os was added as a hack to fix test builds (results were too huge resulting in an error) + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb', '-Os'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_1', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_SMALL_MEMORY = True + c.LPC_DMA_CHANNEL_COUNT = Default + + +class lpc32xx_mzx_stage_2(lpc32xx_shared): + name = "arm/lpc32xx_mzx_stage_2" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx_stage_2', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class lpc32xx_phycore(lpc32xx_shared): + name = "arm/lpc32xx_phycore" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_phycore', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class lpc32xx_mzx(lpc32xx_shared): + name = "arm/lpc32xx_mzx" + + def build(self, c): + c.CFLAGS = ['-fno-schedule-insns2', '-mcpu=arm926ej-s', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx_mzx', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/lpc32xx/startup/linkcmds.lpc32xx', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.LPC_DMA_CHANNEL_COUNT = 8 + + +class nds(Base): + name = "arm/nds" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm9tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb-interwork'] + c.LINKCMDS = ['src/lib/libbsp/arm/nds/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class rtl22xx_shared(Base): + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ON_SKYEYE = Default + + def header(self, c): + c.ON_SKYEYE = Default + + +class raspberrypi(Base): + name = "arm/raspberrypi" + def build(self, c): + c.CFLAGS = ['-mcpu=arm1176jzf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/raspberrypi/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + + +class realview_pbx_a9_qemu(Base): + name = "arm/realview_pbx_a9_qemu" + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/realview-pbx-a9/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + c.BSP_ARM_A9MPCORE_PERIPHCLK = "100000000U" + + +class rtl22xx(rtl22xx_shared): + name = "arm/rtl22xx" + + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class rtl22xx_t(rtl22xx_shared): + name = "arm/rtl22xx_t" + + def build(self, c): + c.CFLAGS = ['-mapcs-frame', '-mcpu=arm7tdmi', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=8', '-mthumb', '-fno-schedule-insns2'] + c.LINKCMDS = ['src/lib/libbsp/arm/rtl22xx/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + +class smdk2410(Base): + name = "arm/smdk2410" + + def build(self, c): + c.CFLAGS = ['-DCPU_S3C2410', '-mcpu=arm920t', '-mfloat-abi=soft', '-mfpu=vfp', '-mstructure-size-boundary=32'] + c.LINKCMDS = ['src/lib/libbsp/arm/smdk2410/startup/linkcmds', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.ON_SKYEYE = Default + + +class stm32f4(Base): + name = "arm/stm32f4" + + def build(self, c): + c.CFLAGS = ['-march=armv7-m', '-mthumb'] + c.LINKCMDS = ['src/lib/libbsp/arm/stm32f4/startup/linkcmds.stm32f4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.STM32F4_HSE_OSCILLATOR = Default + c.STM32F4_SYSCLK = Default + c.STM32F4_HCLK = Default + c.STM32F4_PCLK1 = Default + c.STM32F4_PCLK2 = Default + c.STM32F4_USART_BAUD = Default + c.STM32F4_ENABLE_USART_1 = Default + c.STM32F4_ENABLE_USART_2 = Default + c.STM32F4_ENABLE_USART_3 = Default + c.STM32F4_ENABLE_UART_4 = Default + c.STM32F4_ENABLE_UART_5 = Default + c.STM32F4_ENABLE_USART_6 = Default + + +class xilinx_zynq_a9_qemu(Base): + name = "arm/xilinx_zynq_a9_qemu" + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + + def header(self, c): + c.BSP_START_RESET_VECTOR = "" + c.BSP_ARM_A9MPCORE_PERIPHCLK = "100000000U" + + +class xilinx_zynq_shared(Base): + + def build(self, c): + c.CFLAGS = ['-march=armv7-a', '-mthumb', '-mfpu=neon', '-mfloat-abi=hard', '-mtune=cortex-a9'] + c.LINKCMDS = ['src/lib/libbsp/arm/xilinx-zynq/startup/linkcmds.in', 'src/lib/libbsp/arm/shared/startup/linkcmds.base', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv7m'] + c.ZYNQ_RAM_ORIGIN = Default + c.ZYNQ_RAM_MMU = Default + c.ZYNQ_RAM_MMU_LENGTH = Default + c.ZYNQ_RAM_ORIGIN_AVAILABLE = Default + c.ZYNQ_RAM_LENGTH_AVAILABLE = Default + c.ZYNQ_RAM_INT_0_ORIGIN = Default + c.ZYNQ_RAM_INT_0_LENGTH = Default + c.ZYNQ_RAM_INT_1_ORIGIN = Default + c.ZYNQ_RAM_INT_1_LENGTH = Default + c.ZYNQ_CPUS = Default + c.ZYNQ_RAM_NOCACHE_LENGTH = Default + c.CLOCK_DRIVER_USE_FAST_IDLE = Default + + + def header(self, c): + c.BSP_START_RESET_VECTOR = Default + c.BSP_DATA_CACHE_ENABLED = Default + c.BSP_INSTRUCTION_CACHE_ENABLED = Default + c.BSP_ARM_A9MPCORE_PERIPHCLK = Default + c.ZYNQ_CLOCK_UART = Default + c.ZYNQ_CLOCK_CPU_1X = Default + + +class xilinx_zynq_a9_qemu(xilinx_zynq_shared): + name = "arm/xilinx_zynq_a9_qemu" + + def build(self, c): + c.CLOCK_DRIVER_USE_FAST_IDLE = True + c.BSP_ZYNQ_RAM_LENGTH = Default + c.ZYNQ_RAM_ORIGIN = "0x00000000" + c.ZYNQ_RAM_MMU = "0x0fffc000" + c.ZYNQ_RAM_ORIGIN_AVAILABLE = "%(ZYNQ_RAM_ORIGIN)s" + c.ZYNQ_RAM_LENGTH_AVAILABLE = "%(BSP_ZYNQ_RAM_LENGTH)s - 16k" + + def header(self, c): + c.BSP_DATA_CACHE_ENABLED = False + + +class xilinx_zynq_zc702(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zc702" + + def build(self, c): + c.BSP_ARM_A9MPCORE_PERIPHCLK = "333333333U" + c.ZYNQ_RAM_ORIGIN = "0x00100000" + + def header(self, c): + c.ZYNQ_CLOCK_UART = "50000000UL" + c.BSP_ZYNQ_RAM_LENGTH = "1024M" + + +class xilinx_zynq_zc706(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zc706" + + def build(self, c): + c.BSP_ZYNQ_RAM_LENGTH = "1024M" + c.ZYNQ_RAM_LENGTH_AVAILABLE = "%(BSP_ZYNQ_RAM_LENGTH)s - 4M - 16k" + + +class xilinx_zynq_zedboard(xilinx_zynq_shared): + name = "arm/xilinx_zynq_zedboard" + + def build(self, c): + c.BSP_ZYNQ_RAM_LENGTH = "512M" + c.ZYNQ_RAM_ORIGIN = "0x00100000" + + def header(self, c): + c.BSP_ARM_A9MPCORE_PERIPHCLK = "666666667U" + c.ZYNQ_CLOCK_UART = "50000000UL" + + +class beagle_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cortex-a8'] + c.LINKCMDS = ['src/lib/libbsp/arm/beagle/startup/linkcmds.beagle', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_POLLED = Default + c.CONSOLE_BAUD = Default + +class beagleboardorig(beagle_shared): + name = "arm/beagleboardorig" + + def header(self, c): + c.IS_DM3730 = True + + +class beagleboardxm(beagle_shared): + name = "arm/beagleboardxm" + + def header(self, c): + c.IS_DM3730 = True + + +class beaglebonewhite(beagle_shared): + name = "arm/beaglebonewhite" + + def header(self, c): + c.IS_AM335X = True + + +class beagleboneblack(beagle_shared): + name = "arm/beagleboneblack" + + def header(self, c): + c.IS_AM335X = True + + +class raspberrypi(Base): + name = "arm/raspberrypi" + + def build(self, c): + c.CFLAGS = ['-mcpu=arm1176jzf-s'] + c.LINKCMDS = ['src/lib/libbsp/arm/beagle/startup/linkcmds.beagle', 'src/lib/libbsp/arm/shared/startup/linkcmds.armv4', 'src/lib/libbsp/arm/shared/startup/linkcmds.base'] + + diff --git a/py/waf/defaults/bsp/avr.py b/py/waf/defaults/bsp/avr.py new file mode 100644 index 0000000000..c06ed02f4f --- /dev/null +++ b/py/waf/defaults/bsp/avr.py @@ -0,0 +1,15 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "avr" + conflicts=("clang",) + + + +class avrtest(Base): + name = "avr/avrtest" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/avr/avrtest/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__init'] + diff --git a/py/waf/defaults/bsp/bfin.py b/py/waf/defaults/bsp/bfin.py new file mode 100644 index 0000000000..18a4b9519c --- /dev/null +++ b/py/waf/defaults/bsp/bfin.py @@ -0,0 +1,48 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "bfin" + conflicts=("clang",) + + + +class bf537stamp(Base): + name = "bfin/bf537stamp" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/bfin/bf537Stamp/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_USE_INTERRUPTS = Default + + + +class ezkit533(Base): + name = "bfin/ezkit533" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/bfin/eZKit533/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_USE_INTERRUPTS = Default + + + +class tll6527m(Base): + name = "bfin/tll6527m" + + def build(self, c): + c.CFLAGS = ['-mcpu=bf527'] + c.LINKCMDS = ['src/lib/libbsp/bfin/TLL6527M/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '__start'] + + def header(self, c): + c.BFIN_ON_SKYEYE = Default + c.CONSOLE_BAUDRATE = 9600 + c.CONSOLE_USE_INTERRUPTS = False + c.INTERRUPT_USE_TABLE = Default + c.UART_USE_DMA = Default diff --git a/py/waf/defaults/bsp/h8300.py b/py/waf/defaults/bsp/h8300.py new file mode 100644 index 0000000000..faa147536a --- /dev/null +++ b/py/waf/defaults/bsp/h8300.py @@ -0,0 +1,27 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "h8300" + conflicts=("clang",) + + + +class h8sim_shared(Base): + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + +class h8sxsim(h8sim_shared): + name = "h8300/h8sxsim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + + +class h8sim(h8sim_shared): + name = "h8300/h8sim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/h8300/h8sim/startup/linkcmds'] + + diff --git a/py/waf/defaults/bsp/i386.py b/py/waf/defaults/bsp/i386.py new file mode 100644 index 0000000000..59ce98cee4 --- /dev/null +++ b/py/waf/defaults/bsp/i386.py @@ -0,0 +1,74 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "i386" + conflicts=("clang",) + + + +class pc386_shared(Base): + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LDFLAGS = ['-Wl,-Ttext,0x00100000'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + c.ENABLE_NETWORKING = True + + def header(self, c): + c.BSP_HAS_SMP = Default + c.BSP_VIDEO_80x50 = Default + c.CLOCK_DRIVER_USE_8254 = Default + c.CLOCK_DRIVER_USE_TSC = Default + c.IDE_USE_PRIMARY_INTERFACE = Default + c.IDE_USE_SECONDARY_INTERFACE = Default + c.USE_COM1_AS_CONSOLE = Default + c.BSP_PRESS_KEY_FOR_RESET = True + + +class pc486(pc386_shared): + name = "i386/pc486" + + def build(self, c): + c.CFLAGS = ['-mtune=i486'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc386(pc386_shared): + name = "i386/pc386" + + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + + +class pc686(pc386_shared): + name = "i386/pc686" + + def build(self, c): + c.CFLAGS = ['-mtune=pentiumpro'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc586_sse(pc386_shared): + name = "i386/pc586-sse" + + def build(self, c): + c.CFLAGS = ['-mtune=i386'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pc586(pc386_shared): + name = "i386/pc586" + + def build(self, c): + c.CFLAGS = ['-mtune=pentium'] + c.LINKCMDS = ['src/lib/libbsp/i386/pc386/startup/linkcmds'] + + +class pcp4(pc386_shared): + name = "i386/pcp4" + + def build(self, c): + c.CFLAGS = ['-mtune=pentium4', '-march=pentium4', '-msse3'] diff --git a/py/waf/defaults/bsp/lm32.py b/py/waf/defaults/bsp/lm32.py new file mode 100644 index 0000000000..7caf519587 --- /dev/null +++ b/py/waf/defaults/bsp/lm32.py @@ -0,0 +1,36 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "lm32" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-N'] + + + +class lm32_evr(Base): + name = "lm32/lm32_evr" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/lm32/lm32_evr/startup/linkcmds'] + + def header(self, c): + c.ON_SIMULATOR = Default + + + +class milkymist(Base): + name = "lm32/milkymist" + + def build(self, c): + c.CFLAGS = ['-mbarrel-shift-enabled', '-mmultiply-enabled', '-mdivide-enabled', '-msign-extend-enabled'] + c.LINKCMDS = ['src/lib/libbsp/lm32/milkymist/startup/linkcmds'] + + def header(self, c): + c.ON_SIMULATOR = Default + + + diff --git a/py/waf/defaults/bsp/m32c.py b/py/waf/defaults/bsp/m32c.py new file mode 100644 index 0000000000..aa51d7344b --- /dev/null +++ b/py/waf/defaults/bsp/m32c.py @@ -0,0 +1,17 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m32c" + conflicts=("clang",) + + + +class m32csim(Base): + name = "m32c/m32csim" + + def build(self, c): + c.CFLAGS = ["-mcpu=m32cm"] + c.LINKCMDS = ['src/lib/libbsp/m32c/m32cbsp/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o'] + c.LINK_LINK = ['-dc', '-dp', '-N'] diff --git a/py/waf/defaults/bsp/m32r.py b/py/waf/defaults/bsp/m32r.py new file mode 100644 index 0000000000..9ad5fad991 --- /dev/null +++ b/py/waf/defaults/bsp/m32r.py @@ -0,0 +1,15 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m32r" + conflicts=("clang",) + + + +class m32rsim(Base): + name = "m32r/m32rsim" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/m32r/m32rsim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtinit.o', '-e', '_start'] + diff --git a/py/waf/defaults/bsp/m68k.py b/py/waf/defaults/bsp/m68k.py new file mode 100644 index 0000000000..a6551b1647 --- /dev/null +++ b/py/waf/defaults/bsp/m68k.py @@ -0,0 +1,271 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "m68k" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class av5282(Base): + name = "m68k/av5282" + + def build(self, c): + c.CFLAGS = ['-mcpu=528x'] + c.LINKCMDS = ['src/lib/libbsp/m68k/av5282/startup/linkcmds'] + +class csb360(Base): + name = "m68k/csb360" + + def build(self, c): + c.CFLAGS = ['-mcpu=5272'] + c.LINKCMDS = ['src/lib/libbsp/m68k/csb360/startup/linkcmds'] + + +class gen68302(Base): + name = "m68k/gen68302" + + def build(self, c): + c.CFLAGS = ['-mcpu=68302'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68302/startup/linkcmds'] + + +class gen68340(Base): + name = "m68k/gen68340" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68340/startup/linkcmds'] + + +class gen68360_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.GEN68360 = True + + + +class gen68360_040(gen68360_shared): + name = "m68k/gen68360_040" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.GEN68360_040 = True + + + +class pgh360(gen68360_shared): + name = "m68k/pgh360" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + def header(self, c): + c.PGH360 = True + + + +class gen68360(gen68360_shared): + name = "m68k/gen68360" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/gen68360/startup/linkcmds', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.bootp', 'src/lib/libbsp/m68k/gen68360/startup/linkcmds.prom'] + + + +class genmcf548x_shared(Base): + + def header(self, c): + c.BSP_CONSOLE_BAUD = 9600 + c.BSP_CPU_CLOCK_SPEED = 100000000 + c.HAS_DBUG = Default + c.HAS_LOW_LEVEL_INIT = Default + + + +class cobra5475(genmcf548x_shared): + name = "m68k/cobra5475" + + def build(self, c): + c.CFLAGS = ['-mcfv4e', '-Wa,-memac'] + c.LINKCMDS = ['src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.COBRA5475'] + + +class m5484fireengine(genmcf548x_shared): + name = "m68k/m5484fireengine" + + def build(self, c): + c.CFLAGS = ['-mcfv4e', '-Wa,-memac'] + c.LINKCMDS = ['src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine', 'src/lib/libbsp/m68k/genmcf548x/startup/linkcmds.m5484FireEngine.flash'] + + +class idp(Base): + name = "m68k/idp" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040', '-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/m68k/idp/startup/linkcmds'] + + +class mcf5206elite(Base): + name = "m68k/mcf5206elite" + + def build(self, c): + c.CFLAGS = ['-mcpu=5206e'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5206elite/startup/linkcmds.flash'] + + +class mcf52235(Base): + name = "m68k/mcf52235" + + def build(self, c): + c.CFLAGS = ['-mcpu=52235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf52235/startup/linkcmds'] + + +class mcf5225x(Base): + name = "m68k/mcf5225x" + + def build(self, c): + c.CFLAGS = ['-mcpu=52235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5225x/startup/linkcmds'] + + +class mcf5235(Base): + name = "m68k/mcf5235" + + def build(self, c): + c.CFLAGS = ['-mcpu=5235'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5235/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5235/startup/linkcmdsflash', 'src/lib/libbsp/m68k/mcf5235/startup/linkcmdsram'] + + +class mcf5329(Base): + name = "m68k/mcf5329" + + def build(self, c): + c.CFLAGS = ['-mcpu=5307'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mcf5329/startup/linkcmds', 'src/lib/libbsp/m68k/mcf5329/startup/linkcmdsflash'] + + +class mrm332(Base): + name = "m68k/mrm332" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mrm332/startup/linkcmds', 'src/lib/libbsp/m68k/mrm332/startup/linkcmds_ROM'] + + +class mvme136(Base): + name = "m68k/mvme136" + + def build(self, c): + c.CFLAGS = ['-mcpu=68020'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme136/startup/linkcmds'] + + +class mvme147(Base): + name = "m68k/mvme147" + + def build(self, c): + c.CFLAGS = ['-mcpu=68030'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme147/startup/linkcmds'] + + +class mvme147s(Base): + name = "m68k/mvme147s" + + def build(self, c): + c.CFLAGS = ['-mcpu=68030'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme147s/startup/linkcmds'] + + +class mvme162_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme162lx(mvme162_shared): + name = "m68k/mvme162lx" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme162(mvme162_shared): + name = "m68k/mvme162" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme162/startup/linkcmds'] + + +class mvme167(Base): + name = "m68k/mvme167" + + def build(self, c): + c.CFLAGS = ['-mcpu=68040'] + c.LINKCMDS = ['src/lib/libbsp/m68k/mvme167/startup/linkcmds'] + + def header(self, c): + c.mvme167 = True + c.CD2401_INT_LEVEL = Default + c.CD2401_IO_MODE = Default + c.CD2401_USE_TERMIOS = Default + c.CONSOLE_MINOR = Default + c.PRINTK_MINOR = Default + + +class ods68302(Base): + name = "m68k/ods68302" + + def build(self, c): + c.CFLAGS = ['-mcpu=68302'] + c.LINKCMDS = ['src/lib/libbsp/m68k/ods68302/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/reset.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + + +class sim68000_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=68000'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = Default + + + +class sim68000(sim68000_shared): + name = "m68k/sim68000" + + def build(self, c): + c.CFLAGS = ['-mcpu=68000'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + + +class simcpu32(sim68000_shared): + name = "m68k/simcpu32" + + def build(self, c): + c.CFLAGS = ['-mcpu=cpu32'] + c.LINKCMDS = ['src/lib/libbsp/m68k/sim68000/startup/linkcmds'] + + +class uc5282(Base): + name = "m68k/uc5282" + + def build(self, c): + c.CFLAGS = ['-mcpu=5282'] + c.LINKCMDS = ['src/lib/libbsp/m68k/uC5282/startup/linkcmds'] diff --git a/py/waf/defaults/bsp/mips.py b/py/waf/defaults/bsp/mips.py new file mode 100644 index 0000000000..d3f7e7f051 --- /dev/null +++ b/py/waf/defaults/bsp/mips.py @@ -0,0 +1,80 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "mips" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + +class csb350(Base): + name = "mips/csb350" + + def build(self, c): + c.CFLAGS = ['-mips32', '-G0', '-msoft-float'] + c.LDFLAGS = ['-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/mips/csb350/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', '_start'] + + +class genmongoosev(Base): + name = "mips/genmongoosev" + + def build(self, c): + c.CFLAGS = ['-mips1', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/genmongoosev/startup/linkcmds'] + + +class hurricane(Base): + name = "mips/hurricane" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/hurricane/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug + + def header(self, c): + c.BSP_HAS_RM52xx = Default + c.BSP_HAS_USC320 = Default + + + +class jmr3904(Base): + name = "mips/jmr3904" + + def build(self, c): + c.CFLAGS = ['-march=r3900', '-Wa,-xgot', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/jmr3904/startup/linkcmds'] + + + +class malta(Base): + name = "mips/malta" + + def build(self, c): + c.CFLAGS = ['-march=24kf1_1', '-Wa,-xgot', '-G0'] + c.LINKCMDS = ['src/lib/libbsp/mips/malta/startup/linkcmds'] + + +class rbtx4925(Base): + name = "mips/rbtx4925" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/rbtx4925/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug + + def header(self, c): + c.BSP_HAS_TX49xx = Default + + + +class rbtx4938(Base): + name = "mips/rbtx4938" + + def build(self, c): + c.CFLAGS = ['-mips3', '-G0', '-EL'] + c.LINKCMDS = ['src/lib/libbsp/mips/rbtx4938/startup/linkcmds'] + c.LINK_LINK = ['-EL'] # work around gcc driver bug diff --git a/py/waf/defaults/bsp/moxie.py b/py/waf/defaults/bsp/moxie.py new file mode 100644 index 0000000000..9516b344fe --- /dev/null +++ b/py/waf/defaults/bsp/moxie.py @@ -0,0 +1,17 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "moxie" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + + +class moxiesim(Base): + name = "moxie/moxiesim" + + def build(self, c): + c.LDFLAGS = ['-Wl,--gc-sections'] + c.LINKCMDS = ['src/lib/libbsp/moxie/moxiesim/startup/linkcmds'] + diff --git a/py/waf/defaults/bsp/nios2.py b/py/waf/defaults/bsp/nios2.py new file mode 100644 index 0000000000..1bc451e878 --- /dev/null +++ b/py/waf/defaults/bsp/nios2.py @@ -0,0 +1,16 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "nios2" + conflicts=("clang",) + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/nios2/nios2_iss/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o', '-e', 'start'] + c.LINK_END = ['crtend.o', '${RTEMS}/crtnn.o'] + +class nios2_iss(Base): + name = "nios2/nios2_iss" + + def build(self, c): + c.CFLAGS = ["-mno-hw-mul", "-mno-hw-div"] diff --git a/py/waf/defaults/bsp/powerpc.py b/py/waf/defaults/bsp/powerpc.py new file mode 100644 index 0000000000..00c4b287a9 --- /dev/null +++ b/py/waf/defaults/bsp/powerpc.py @@ -0,0 +1,914 @@ +from rtems_waf.config import Default, Config, Disable + +class Base(Config): + arch = name = "powerpc" + conflicts=("clang",) + + + +class beatnik(Base): + name = "powerpc/beatnik" + + def build(self, c): + c.CFLAGS = ['-mcpu=7400', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '-e', '__rtems_entry_point', '-u', '__vectors', '${RTEMS}/vectors_entry.o', '${RTEMS}/preload.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class ep1a(Base): + name = "powerpc/ep1a" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e', '-mmultiple', '-mstring', '-mstrict-align'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/ep1a/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o', '-e', '__rtems_entry_point', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.CONSOLE_USE_INTERRUPTS = Default + + +class gen5200_shared(Base): + def header(self, c): + c.ALLOW_IRQ_NESTING = True + c.BENCHMARK_IRQ_PROCESSING = False + c.BSP_GPIOPCR_INITMASK = Default + c.BSP_GPIOPCR_INITVAL = Default + c.BSP_PRESS_KEY_FOR_RESET = Default + c.BSP_RESET_BOARD_AT_EXIT = Default + c.BSP_UART_AVAIL_MASK = Default + c.PRINTK_MINOR = "0" + c.SINGLE_CHAR_MODE = Default + c.UARTS_USE_TERMIOS_INT = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-mstrict-align', '-meabi', '-msdata', '-fno-common'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class icecube(gen5200_shared): + name = "powerpc/icecube" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.icecube', + 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.ALLOW_IRQ_NESTING = False + c.BSP_PRESS_KEY_FOR_RESET = True + c.BSP_RESET_BOARD_AT_EXIT = True + c.HAS_UBOOT = True + c.MPC5200_BOARD_ICECUBE = True + + +class dp2(gen5200_shared): + name = "powerpc/dp2" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.dp2', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_GPIOPCR_INITMASK = "0x337F3F77" + c.BSP_GPIOPCR_INITVAL = "0x03550040" + c.BSP_TYPE_DP2 = True + c.BSP_UART_AVAIL_MASK = "0x22" + c.HAS_UBOOT = True + c.MPC5200_BOARD_DP2 = True + c.MPC5200_PSC_INDEX_FOR_GPS_MODULE = 5 + c.PRINTK_MINOR = "1" + + +class pm520_ze30(gen5200_shared): + name = "powerpc/pm520_ze30" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_ze30', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_GPIOPCR_INITMASK = "0x037F3F07" + c.BSP_GPIOPCR_INITVAL = "0x01552104" + c.BSP_UART_AVAIL_MASK = "0x39" + c.HAS_UBOOT = True + c.MPC5200_BOARD_PM520_ZE30 = True + + +class pm520_cr825(gen5200_shared): + name = "powerpc/pm520_cr825" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.pm520_cr825', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.BSP_RESET_BOARD_AT_EXIT = True + c.BSP_UART_AVAIL_MASK = "0x07" + c.HAS_UBOOT = True + c.MPC5200_BOARD_PM520_CR825 = True + + + +class brs5l(gen5200_shared): + name = "powerpc/brs5l" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs5l', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.MPC5200_BOARD_BRS5L = True + c.BSP_GPIOPCR_INITMASK = "0xb30F0F77" + c.BSP_GPIOPCR_INITVAL = "0x91050444" + c.BSP_RESET_BOARD_AT_EXIT = True + c.BSP_UART_AVAIL_MASK = "0x07" + + +class brs6l(gen5200_shared): + name = "powerpc/brs6l" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen5200/startup/linkcmds.brs6l', 'src/lib/libbsp/powerpc/gen5200/startup/linkcmds.base'] + + def header(self, c): + c.MPC5200_BOARD_BRS6L = True + + +class gen83xx_shared(Base): + def header(self, c): + c.BSP_CONSOLE_BAUD = 9600 + c.GEN83XX_ENABLE_INTERRUPT_NESTING = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-meabi', '-msdata', '-fno-common', '-mstrict-align'] + # XXX: These extra linkcmds need to move below. + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.hsc_cm01', + 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8349eamds', + 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8313erdb'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + + +class br_uid(gen83xx_shared): + name = "powerpc/br_uid" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.br_uid', 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC83XX_BOARD_BR_UID = True + c.MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR = "-1" + c.MPC83XX_CHIP_TYPE = 8309 + c.MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 = True + + +class mpc8349eamds(gen83xx_shared): + name = "powerpc/mpc8349eamds" + + def header(self, c): + c.BSP_USE_UART2 = True + c.HAS_UBOOT = True + c.MPC8349 = True + c.MPC8349EAMDS = True + + + +class mpc8313erdb(gen83xx_shared): + name = "powerpc/mpc8313erdb" + + def header(self, c): + c.BSP_CONSOLE_BAUD = 115200 + c.BSP_USE_UART2 = True + c.BSP_USE_UART_INTERRUPTS = Default + c.HAS_UBOOT = True + c.MPC8313ERDB = True + c.MPC8349 = True + + + +class hsc_cm01(gen83xx_shared): + name = "powerpc/hsc_cm01" + + def header(self, c): + c.BSP_USE_UART2 = True + c.HSC_CM01 = True + c.MPC8349 = True + c.MPC83XX_BOARD_HSC_CM01 = Default + + +class mpc8309som(gen83xx_shared): + name = "powerpc/mpc8309som" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc8309som', 'src/lib/libbsp/powerpc/gen83xx/startup/linkcmds.mpc83xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC83XX_BOARD_MPC8309SOM = True + c.MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR = "0x11" + c.MPC83XX_CHIP_TYPE = 8309 + c.HAS_UBOOT = True + + + +class haleakala(Base): + name = "powerpc/haleakala" + + def build(self, c): + c.CFLAGS = ['-mcpu=405', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/haleakala/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors', '-u', 'download_entry'] + + def header(self, c): + c.PPC_USE_SPRG = Default + c.PPC_VECTOR_FILE_BASE = Default + + +class mbx8xx_shared(Base): + def header(self, c): + c.CONSOLE_MINOR = "SMC2_MINOR" + c.DISPATCH_HANDLER_STAT = True + c.EPPCBUG_SMC1 = Default + c.EPPCBUG_VECTORS = Default + c.NVRAM_CONFIGURE = Default + c.PRINTK_IO_MODE = Default + c.PRINTK_MINOR = "SMC2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mbx8xx/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '-e', 'start'] + c.LINK_END = ['ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + +class mbx860_005b(mbx8xx_shared): + name = "powerpc/mbx860_005b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_005b', '-meabi', '-msdata', '-fno-common'] + + def header(self, c): + c.CONSOLE_MINOR = "SMC1_MINOR" + c.EPPCBUG_SMC1 = Default + c.EPPCBUG_VECTORS = Default + c.NVRAM_CONFIGURE = False + c.PRINTK_MINOR = "SMC1_MINOR" + c.UARTS_USE_TERMIOS = True + + + +class mbx821_002(mbx8xx_shared): + name = "powerpc/mbx821_002" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_002', '-meabi', '-msdata', '-fno-common'] + + +class mbx821_001(mbx8xx_shared): + name = "powerpc/mbx821_001" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_001', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_1b(mbx8xx_shared): + name = "powerpc/mbx860_1b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_001b', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_002(mbx8xx_shared): + name = "powerpc/mbx860_002" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_002', '-meabi', '-msdata', '-fno-common'] + + +class mbx821_002b(mbx8xx_shared): + name = "powerpc/mbx821_002b" + + def build(self, c): + c.CFLAGS = ['-mcpu=821', '-Dmpc821', '-Dmbx821_002b', '-meabi', '-msdata', '-fno-common'] + + +class mbx860_001b(mbx8xx_shared): + name = "powerpc/mbx860_001b" + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-Dmbx860_001b', '-meabi', '-msdata', '-fno-common'] + + +class motorola_powerpc_shared(Base): + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/vectors_entry.o', '${RTEMS}/start.o', '-e', '__rtems_entry_point', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + +class mvme2307(motorola_powerpc_shared): + name = "powerpc/mvme2307" + + def build(self, c): + c.CFLAGS = ['-mcpu=604', '-mmultiple', '-mstring', '-mstrict-align', '-meabi'] + + def header(self, c): + c.mpc8240 = True + +class mvme2100(motorola_powerpc_shared): + name = "powerpc/mvme2100" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + + def header(self, c): + c.mvme2100 = True + + + +class mtx603e(motorola_powerpc_shared): + name = "powerpc/mtx603e" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + + +class mcp750(motorola_powerpc_shared): + name = "powerpc/mcp750" + + def build(self, c): + c.CFLAGS = ['-mcpu=750', '-Dmpc750'] + + +class qemuprep(motorola_powerpc_shared): + name = "powerpc/qemuprep" + + def build(self, c): + c.CFLAGS = ['-mcpu=powerpc', '-mmultiple', '-mstring', '-mstrict-align', '-D__ppc_generic'] + + def header(self, c): + c.qemu = True + + +class qemuprep_altivec(motorola_powerpc_shared): + name = "powerpc/qemuprep-altivec" + + def build(self, c): + c.CFLAGS = ['-mcpu=7400', '-mmultiple', '-mstring', '-mstrict-align', '-D__ppc_generic'] + + def header(self, c): + c.qemu = True + + +class mpc55xxevb_shared(Base): + def header(self, c): + c.MPC55XX_BOOTFLAGS = Default + c.MPC55XX_CHIP_TYPE = 5554 + c.MPC55XX_CHIP_FAMILY = Default + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "(MPC55XX_EMIOS_CHANNEL_NUMBER-1)" + c.MPC55XX_EMIOS_PRESCALER = Default + c.MPC55XX_ESCI_CONSOLE_MINOR = Default + c.MPC55XX_ESCI_USE_INTERRUPTS = Default + c.MPC55XX_FMPLL_CLK_OUT = 128000000 + c.MPC55XX_FMPLL_MFD = 12 + c.MPC55XX_FMPLL_PREDIV = Default + c.MPC55XX_FMPLL_REF_CLOCK = 8000000 + c.SMSC9218I_EDMA_RX_CHANNEL = Default + c.SMSC9218I_EDMA_TX_CHANNEL = Default + c.SMSC9218I_BIG_ENDIAN_SUPPORT = Default + c.SMSC9218I_ENABLE_LED_OUTPUTS = Default + c.SMSC9218I_RESET_PIN = Default + c.SMSC9218I_IRQ_PIN = Default + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = Default + c.MPC55XX_FMPLL_ESYNCR1_CLKCFG = Default + c.MPC55XX_CONSOLE_MINOR = Default + c.BSP_DEFAULT_BAUD_RATE = Default + c.MPC55XX_EARLY_STACK_SIZE = Default + c.MPC55XX_REFERENCE_CLOCK = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-msoft-float', '-D__ppc_generic', '-mstrict-align'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class gwlcfm(mpc55xxevb_shared): + name = "powerpc/gwlcfm" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.gwlcfm', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.MPC55XX_BOARD_GWLCFM = True + c.MPC55XX_CHIP_TYPE = 5516 + c.MPC55XX_EMIOS_PRESCALER = 66 + c.MPC55XX_FMPLL_CLK_OUT = 66000000 + c.MPC55XX_FMPLL_MFD = 99 + c.MPC55XX_FMPLL_PREDIV = 10 + c.MPC55XX_FMPLL_REF_CLOCK = 40000000 + c.RTEMS_BSP_I2C_EEPROM_DEVICE_NAME = "'\"eeprom\"'" + c.RTEMS_BSP_I2C_EEPROM_DEVICE_PATH = "'\"/dev/i2c1.eeprom\"'" + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 66000000 + + +class mpc5566evb(mpc55xxevb_shared): + name = "powerpc/mpc5566evb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.MPC55XX_BOARD_MPC5566EVB = True + c.MPC55XX_CHIP_TYPE = 5566 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = Default + c.MPC55XX_REFERENCE_CLOCK = 40000000 + +class mpc5566evb_spe(mpc55xxevb_shared): + name = "powerpc/mpc5566evb_spe" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb_spe', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5566evb', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_CHIP_TYPE = 5566 + c.MPC55XX_BOARD_MPC5566EVB = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + + +class mpc5643l_dpu(mpc55xxevb_shared): + name = "powerpc/mpc5643l_dpu" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_dpu', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_EMIOS_PRESCALER = Disable + c.MPC55XX_CLOCK_EMIOS_CHANNEL = Disable + c.MPC55XX_CLOCK_PIT_CHANNEL = 3 + c.MPC55XX_CHIP_TYPE = 5643 + c.BSP_DATA_CACHE_ENABLED = False + +class mpc5643l_evb(mpc55xxevb_shared): + name = "powerpc/mpc5643l_evb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5643l_evb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 127 + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_EMIOS_PRESCALER = Disable + c.MPC55XX_CLOCK_EMIOS_CHANNEL = Disable + c.MPC55XX_CLOCK_PIT_CHANNEL = 3 + c.MPC55XX_CHIP_TYPE = 5643 + c.BSP_DATA_CACHE_ENABLED = False + + +class mpc5674f_ecu508_app(mpc55xxevb_shared): + name = "powerpc/mpc5674f_ecu508_app" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508_app', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_NEEDS_LOW_LEVEL_INIT = Default + c.BSP_DATA_CACHE_USE_WRITE_THROUGH = True + c.MPC55XX_BOARD_MPC5674F_ECU508 = True + c.MPC55XX_CONSOLE_MINOR = 2 + c.SMSC9218I_BIG_ENDIAN_SUPPORT = True + c.SMSC9218I_ENABLE_LED_OUTPUTS = True + c.SMSC9218I_IRQ_PIN = 450 + c.SMSC9218I_RESET_PIN = 433 + + +class mpc5674f_ecu508_boot(mpc55xxevb_shared): + name = "powerpc/mpc5674f_ecu508_boot" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508_boot', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_ecu508', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.BSP_DATA_CACHE_USE_WRITE_THROUGH = True + c.MPC55XX_BOARD_MPC5674F_ECU508 = True + c.MPC55XX_CONSOLE_MINOR = 2 + c.SMSC9218I_BIG_ENDIAN_SUPPORT = True + c.SMSC9218I_ENABLE_LED_OUTPUTS = True + c.SMSC9218I_IRQ_PIN = 450 + c.SMSC9218I_RESET_PIN = 433 + + + +class mpc5674f_rsm6(mpc55xxevb_shared): + name = "powerpc/mpc5674f_rsm6" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_rsm6', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674f_rsm6_base', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674F_RSM6 = True + c.MPC55XX_ENABLE_START_PROLOGUE = True + c.MPC55XX_FMPLL_ESYNCR1_CLKCFG = 6 + + + +class mpc5674fevb(mpc55xxevb_shared): + name = "powerpc/mpc5674fevb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674FEVB = True + + +class mpc5674fevb_spe(mpc55xxevb_shared): + name = "powerpc/mpc5674fevb_spe" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb_spe', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc5674fevb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.BSP_INTERRUPT_HANDLER_TABLE_SIZE = 255 + c.MPC55XX_CHIP_TYPE = 5674 + c.MPC55XX_CLOCK_EMIOS_CHANNEL = "31" + c.MPC55XX_FMPLL_MFD = 66 + c.MPC55XX_FMPLL_PREDIV = 5 + c.MPC55XX_NULL_POINTER_PROTECTION = True + c.MPC55XX_REFERENCE_CLOCK = 40000000 + c.MPC55XX_SYSTEM_CLOCK = 264000000 + c.MPC55XX_SYSTEM_CLOCK_DIVIDER = 2 + c.MPC55XX_BOARD_MPC5674FEVB = True + + + +class phycore_mpc5554(mpc55xxevb_shared): + name = "powerpc/phycore_mpc5554" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.phycore_mpc5554', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base', 'src/lib/libbsp/powerpc/mpc55xxevb/startup/linkcmds.mpc55xx'] + + def header(self, c): + c.HAS_SMC91111 = True + c.SMC91111_ENADDR_IS_SETUP = True + c.MPC55XX_BOARD_PHYCORE_MPC5554 = True + + + +class mpc8260ads(Base): + name = "powerpc/mpc8260ads" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-mstrict-align', '-Dmpc8260', '-meabi', '-msdata', '-fno-common'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/mpc8260ads/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/start.o', '-e', 'start', '-u', '__vectors'] + c.LINK_END = ['ecrtn.o'] + + def header(self, c): + c.CONSOLE_MINOR = "SCC2_MINOR" + c.DISPATCH_HANDLER_STAT = True + c.PRINTK_MINOR = "SMC2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + + + +class mvme3100(Base): + name = "powerpc/mvme3100" + + def build(self, c): + c.CFLAGS = ['-mcpu=powerpc', '-msoft-float', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '-e', '__rtems_entry_point', '-u', '__vectors', + '${RTEMS}/preload.o', '${RTEMS}/vectors_entry.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class mvme5500(Base): + name = "powerpc/mvme5500" + + def build(self, c): + c.CFLAGS = ['-mcpu=7450', '-mtune=7450', '-Dmpc7455'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/shared/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '-e', '__rtems_entry_point', '-u', '__vectors', + '${RTEMS}/preload.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + c.ENABLE_NETWORKING = False # broken VPD.h header + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + + + +class psim(Base): + name = "powerpc/psim" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/psim/startup/linkcmds', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CLOCK_DRIVER_USE_FAST_IDLE = True + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.PPC_USE_SPRG = False + c.PPC_VECTOR_FILE_BASE = "0xFFF00100" + + + +class qemuppc(Base): + name = "powerpc/qemuppc" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/qemuppc/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + + +class qoriq_shared(Base): + name = "powerpc/qoriq" + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-mstrict-align', '-mspe', '-mabi=spe', '-mfloat-gprs=double', '-D__ppc_generic'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-u', '__vectors'] + + def header(self, c): + c.BSP_CONSOLE_BAUD = 115200 + c.BSP_DISABLE_UBOOT_WORK_AREA_CONFIG = Default + c.BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN = Default + c.BSP_USE_UART_INTERRUPTS = Default + c.HAS_UBOOT = True + c.QORIQ_CLOCK_TIMER = Default + c.QORIQ_ETSEC_1_PHY_ADDR = -1 + c.QORIQ_ETSEC_2_PHY_ADDR = Default + c.QORIQ_ETSEC_3_PHY_ADDR = Default + c.QORIQ_INITIAL_MSR = Default + c.QORIQ_INITIAL_SPEFSCR = Default + c.QORIQ_INTERCOM_AREA_BEGIN = Default + c.QORIQ_INTERCOM_AREA_SIZE = Default + c.QORIQ_UART_0_ENABLE = Default + c.QORIQ_UART_1_ENABLE = Default + c.QORIQ_UART_BRIDGE_0_ENABLE = Default + c.QORIQ_UART_BRIDGE_1_ENABLE = Default + c.QORIQ_UART_BRIDGE_MASTER_CORE = Default + c.QORIQ_UART_BRIDGE_SLAVE_CORE = Default + c.QORIQ_UART_BRIDGE_TASK_PRIORITY = 250 + + +class qoriq_core_0(qoriq_shared): + name = "powerpc/qoriq_core_0" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_0', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_0_ENABLE = True + c.QORIQ_UART_1_ENABLE = True + c.QORIQ_UART_BRIDGE_1_ENABLE = Default + + +class qoriq_core_1(qoriq_shared): + name = "powerpc/qoriq_core_1" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_core_1', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_BRIDGE_1_ENABLE = True + c.QORIQ_CLOCK_TIMER = 4 + + +class qoriq_p1020rdb(qoriq_shared): + name = "powerpc/qoriq_p1020rdb" + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/powerpc/qoriq/startup/linkcmds.qoriq_p1020rdb', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + + def header(self, c): + c.QORIQ_UART_0_ENABLE = True + c.QORIQ_UART_1_ENABLE = True + + +class score603e(Base): + name = "powerpc/score603e" + + def build(self, c): + c.CFLAGS = ['-mcpu=603e', '-Dppc603e'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/score603e/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/start.o', '-e', '_start', '-u', '__vectors'] + c.LINK_END = ['ecrtn.o'] + c.LINK_LINK = ['-Bstatic'] + + def header(self, c): + c.CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK = Default + c.CONSOLE_USE_INTERRUPTS = Default + c.HAS_PMC_PSC8 = True + c.INITIALIZE_COM_PORTS = False + c.PPC_USE_SPRG = False + c.PPC_VECTOR_FILE_BASE = Default + c.SCORE603E_OPEN_FIRMWARE = Default + c.SCORE603E_USE_DINK = True + c.SCORE603E_USE_NONE = Default + c.SCORE603E_USE_SDS = Default + + + +class ss555(Base): + name = "powerpc/ss555" + + def build(self, c): + c.CFLAGS = ['-mcpu=505', '-Dmpc555'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/ss555/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '-u', '__vectors', '-N', '-u', 'start', '-e', 'start'] + c.LINK_END = ['ecrtn.o'] + + def header(self, c): + c.CONSOLE_MINOR = "SCI2_MINOR" + c.PRINTK_MINOR = "SCI2_MINOR" + c.UARTS_IO_MODE = Default + c.UARTS_USE_TERMIOS = Default + c.WATCHDOG_TIMEOUT = Default + + +class t32mppc(Base): + name = "powerpc/t32mppc" + + def build(self, c): + c.CFLAGS = ['-mcpu=8540', '-meabi', '-msdata', '-fno-common', '-msoft-float', '-D__ppc_generic'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/t32mppc/startup/linkcmds.t32mppc', 'src/lib/libbsp/powerpc/shared/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '${RTEMS}/start.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-u', '__vectors', '-N'] + + def header(self, c): + c.BSP_INSTRUCTION_CACHE_ENABLED = True + c.BSP_DATA_CACHE_ENABLED = True + + + +class tqm8xx_shared(Base): + def header(self, c): + c.BSP_USE_NETWORK_FEC = Default + c.BSP_USE_NETWORK_SCC = True + c.CONSOLE_CHN = "CONS_CHN_SMC1" + c.CONS_SCC1_MODE = Default + c.CONS_SCC2_MODE = Default + c.CONS_SCC3_MODE = Default + c.CONS_SCC4_MODE = Default + c.CONS_SMC1_MODE = Default + c.CONS_SMC2_MODE = Default + c.PRINTK_CHN = "CONS_CHN_SMC1" + c.SPI_BOARD_INIT_FNC = Default + c.SPI_SEND_ADDR_FNC = Default + c.SPI_SEND_STOP_FNC = Default + + def build(self, c): + c.CFLAGS = ['-mcpu=860', '-Dmpc860', '-mstrict-align', '-fno-strict-aliasing', + '-meabi', '-msdata', '-fno-common'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds.tqm8xx', + 'src/lib/libbsp/powerpc/tqm8xx/startup/linkcmds.base'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', + '${RTEMS}/start.o', '-u', '__vectors'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + +class pghplus(tqm8xx_shared): + name = "powerpc/pghplus" + + def header(self, c): + c.BSP_USE_NETWORK_FEC = True + c.BSP_USE_NETWORK_SCC = Default + c.CONS_SMC1_MODE = "CONS_MODE_IRQ" + c.SPI_BOARD_INIT_FNC = "bsp_pghplus_spi_init" + c.SPI_SEND_ADDR_FNC = "bsp_pghplus_spi_sel_addr" + c.SPI_SEND_STOP_FNC = "bsp_pghplus_spi_send_stop" + +class tqm8xx_stk8xx(tqm8xx_shared): + name = "powerpc/tqm8xx_stk8xx" + + def header(self, c): + c.CONS_SMC1_MODE = "CONS_MODE_POLLED" + c.CONS_SMC2_MODE = "CONS_MODE_POLLED" + + + +class virtex(Base): + name = "powerpc/virtex" + + def build(self, c): + c.CFLAGS = ['-mcpu=403', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o', '-u', '__vectors', '-u', 'download_entry'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + + def header(self, c): + c.PPC_USE_SPRG = Default + c.PPC_VECTOR_FILE_BASE = Default + c.RTEMS_XPARAMETERS_H = Default + c.RTEMS_XPPC_BASE = Default + + +class virtex4(Base): + name = "powerpc/virtex4" + + def build(self, c): + c.CFLAGS = ['-mcpu=405', '-Dppc405'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex4/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-Bstatic', '-u', '__vectors', '-u', 'download_entry', '-N'] + + def header(self, c): + c.PPC_USE_DATA_CACHE = True + c.PPC_USE_SPRG = True + c.PPC_VECTOR_FILE_BASE = "0x0100" + + +class virtex5(Base): + name = "powerpc/virtex5" + + def build(self, c): + c.CFLAGS = ['-mcpu=440', '-Dppc440', '-msoft-float'] + c.LINKCMDS = ['src/lib/libbsp/powerpc/virtex5/startup/linkcmds'] + c.LINK_START = ['ecrti.o', '${RTEMS}/rtems_crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'ecrtn.o'] + c.LINK_LINK = ['-dc', '-dp', '-Bstatic', '-u', '__vectors', '-u', 'download_entry', '-N'] + + def header(self, c): + c.PPC_USE_DATA_CACHE = True + c.PPC_USE_SPRG = True + c.PPC_VECTOR_FILE_BASE = "0x0100" diff --git a/py/waf/defaults/bsp/sh.py b/py/waf/defaults/bsp/sh.py new file mode 100644 index 0000000000..ad919404cb --- /dev/null +++ b/py/waf/defaults/bsp/sh.py @@ -0,0 +1,87 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sh" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', '-e', '_start'] + + +class gensh1(Base): + name = "sh/gensh1" + + def build(self, c): + c.CFLAGS = ['-m1'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh1/startup/linkcmds'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = Default + c.START_HW_INIT = Default + + + +class gensh2(Base): + name = "sh/gensh2" + + def build(self, c): + c.CFLAGS = ['-m2'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh2/startup/linkcmds', + 'src/lib/libbsp/sh/gensh2/startup/linkcmds.ram', + 'src/lib/libbsp/sh/gensh2/startup/linkcmds.rom'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = 29491200 + c.STANDALONE_EVB = Default + c.START_HW_INIT = Default + + + +class gensh4(Base): + name = "sh/gensh4" + + def build(self, c): + c.CFLAGS = ['-m4', '-ml'] + c.LDFLAGS = ['-m4', '-ml'] + c.LINKCMDS = ['src/lib/libbsp/sh/gensh4/startup/linkcmds', + 'src/lib/libbsp/sh/gensh4/startup/linkcmds.rom', + 'src/lib/libbsp/sh/gensh4/startup/linkcmds.rom2ram'] + c.LINK_LINK = ['-EL'] + + def header(self, c): + c.CPU_CLOCK_RATE_HZ = 29491200 + c.START_HW_INIT = Default + + +class shsim_shared(Base): + def header(self, c): + c.CPU_CLOCK_RATE_HZ = Default + c.START_HW_INIT = Default + + def build(self, c): + c.CFLAGS = ['-m1'] + c.LINKCMDS = ['src/lib/libbsp/sh/shsim/startup/linkcmds', + 'src/lib/libbsp/sh/shsim/startup/linkcmds.sim'] + + +class simsh1(shsim_shared): + name = "sh/simsh1" + + def build(self, c): + c.CFLAGS = ['-m1'] + + +class simsh2(shsim_shared): + name = "sh/simsh2" + + def build(self, c): + c.CFLAGS = ['-m2'] + + +class simsh4(shsim_shared): + name = "sh/simsh4" + + + +class simsh2e(shsim_shared): + name = "sh/simsh2e" diff --git a/py/waf/defaults/bsp/sparc.py b/py/waf/defaults/bsp/sparc.py new file mode 100644 index 0000000000..3d24fd70c9 --- /dev/null +++ b/py/waf/defaults/bsp/sparc.py @@ -0,0 +1,62 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sparc" + conflicts=("clang",) + + def build(self, c): + c.LINK_START = ['${RTEMS}/start.o', 'crti.o', 'crtbegin.o'] + c.LINK_END = ['crtend.o', 'crtn.o'] + + + +class erc32_shared(Base): + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/erc32/startup/linkcmds', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = False + c.ENABLE_SIS_QUIRKS = Default + c.SIMSPARC_FAST_IDLE = Default + + + +class erc32(erc32_shared): + name = "sparc/erc32" + + +class sis(erc32_shared): + name = "sparc/sis" + + def header(self, c): + c.ENABLE_SIS_QUIRKS = True + + + +class leon2(Base): + name = "sparc/leon2" + + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/leon2/startup/linkcmds', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.CONSOLE_USE_INTERRUPTS = False + c.SIMSPARC_FAST_IDLE = Default + + +class leon3(Base): + name = "sparc/leon3" + + def build(self, c): + c.CFLAGS = ['-mcpu=cypress'] + c.LINKCMDS = ['src/lib/libbsp/sparc/leon3/startup/linkcmds.leon3', + 'src/lib/libbsp/sparc/shared/startup/linkcmds.base'] + + def header(self, c): + c.BSP_LEON3_SMP = Default + c.CONSOLE_USE_INTERRUPTS = False + c.SIMSPARC_FAST_IDLE = Default diff --git a/py/waf/defaults/bsp/sparc64.py b/py/waf/defaults/bsp/sparc64.py new file mode 100644 index 0000000000..73003200fb --- /dev/null +++ b/py/waf/defaults/bsp/sparc64.py @@ -0,0 +1,27 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "sparc64" + conflicts=("clang",) + + def build(self, c): + c.LINKCMDS = ['src/lib/libbsp/sparc64/shared/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', 'crtbegin.o', '-e', '_start'] + c.LINK_END = ['crtend.o'] + + +class niagara(Base): + name = "sparc64/niagara" + + def build(self, c): + c.CFLAGS = ['-mcpu=niagara', '-DSUN4V'] + + +class usiii(Base): + name = "sparc64/usiii" + + def build(self, c): + c.CFLAGS = ['-mcpu=ultrasparc3', '-DUS3', '-DSUN4U'] + + def header(self, c): + c.SIMSPARC_FAST_IDLE = Default diff --git a/py/waf/defaults/bsp/v850.py b/py/waf/defaults/bsp/v850.py new file mode 100644 index 0000000000..8d1a22da31 --- /dev/null +++ b/py/waf/defaults/bsp/v850.py @@ -0,0 +1,70 @@ +from rtems_waf.config import Default, Config + +class Base(Config): + arch = name = "v850" + conflicts=("clang",) + + + +class v850_shared(Base): + def build(self, c): + c.CFLAGS = ['-mtune=i386'] +# c.LDFLAGS = ['-Wl,-Ttext,0x00100000'] + c.LINKCMDS = ['src/lib/libbsp/v850/gdbv850sim/startup/linkcmds'] + c.LINK_START = ['${RTEMS}/start.o', '-e', 'start'] +# c.LINK_END = ['crtend.o', 'crtn.o'] +# c.ENABLE_NETWORKING = True + +# def header(self, c): +# c.BSP_HAS_SMP = Default +# c.BSP_VIDEO_80x50 = Default +# c.CLOCK_DRIVER_USE_8254 = Default +# c.CLOCK_DRIVER_USE_TSC = Default +# c.IDE_USE_PRIMARY_INTERFACE = Default +# c.IDE_USE_SECONDARY_INTERFACE = Default +# c.USE_COM1_AS_CONSOLE = Default +# c.BSP_PRESS_KEY_FOR_RESET = True + + +class v850e1sim(v850_shared): + name = "v850/v850e1sim" + + def build(self, c): + c.CFLAGS = ["-mv850e1",] + + +class v850e2sim(v850_shared): + name = "v850/v850e2sim" + + def build(self, c): + c.CFLAGS = ["-mv850e2",] + + +class v850e2v3sim(v850_shared): + name = "v850/v850e2v3sim" + + def build(self, c): + c.CFLAGS = ["-mv850e2v3",] + + +class v850esim(v850_shared): + name = "v850/v850esim" + + def build(self, c): + c.CFLAGS = ["-mv850e",] + + +class v850essim(v850_shared): + name = "v850/v850essim" + + def build(self, c): + c.CFLAGS = ["-mv850es",] + + +class v850sim(v850_shared): + name = "v850/v850sim" + + def build(self, c): + c.CFLAGS = ["-mv850",] + + diff --git a/py/waf/defaults/options.py b/py/waf/defaults/options.py new file mode 100644 index 0000000000..7ea9dc7139 --- /dev/null +++ b/py/waf/defaults/options.py @@ -0,0 +1,2700 @@ +from rtems_waf.config.options import Boolean, Integer, String, StringList + + +class ALLOW_IRQ_NESTING(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If set to !0, allow nested irq processing" + + +class ARM_CLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Arm clock in hz" + + +class BENCHMARK_IRQ_PROCESSING(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If set to !0, enable code to benchmark irq processing" + + +class BFIN_ON_SKYEYE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, disable features which are not supported on skyeye. + """ + + +class BSP(StringList): + value = [] + tag = ["general"] + undef = True + descr = "List of bsps to build, comma delimited." + + +class BSP_CONSOLE_BAUD(Integer): + value = 9600 + tag = ["general"] + undef = True + descr = "The default console baud rate." + + +class BSP_CPU_CLOCK_SPEED(Integer): + value = 0 + tag = ["general"] + undef = True + descr = "The cpu clock frequency." + + +class BSP_DATA_CACHE_ENABLED(Boolean): + value = True + tag = ["storage"] + undef = True + descr = "Enables the data cache, if defined to a value other than zero" + + +class BSP_DIRTY_MEMORY(Boolean): + value = False + tag = ["storage"] + undef = True + descr = """ +If defined, then the bsp framework will put a non-zero pattern into the rtems +workspace and C program heap. This should assist in finding code that assumes +memory starts set to zero. + """ + + +class BSP_DISABLE_UBOOT_WORK_AREA_CONFIG(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Disable u-boot work area configuration" + + +class BSP_GPIOPCR_INITMASK(String): + value = "0x330F0F77" + tag = ["general"] + undef = True + descr = """ +Defines the bits modified in the mpc5200 gpiopcr register during init. Must +match the hardware requirements + """ + + +class BSP_GPIOPCR_INITVAL(String): + value = "0x01050444" + tag = ["general"] + undef = True + descr = """ +Defines the bit values written in the mpc5200 gpiopcr register during init. +Must match the hardware requirements + """ + + +class BSP_HAS_RM52xx(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a rm52xx compatible cpu." + + +class BSP_HAS_SMP(Integer): + value = 1 + tag = ["build"] + undef = True + descr = """ +Always defined when on a pc386 to enable the pc386 support for determining +the cpu core number in an smp configuration. + """ + + +class BSP_HAS_TX49xx(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a rm52xx compatible cpu." + + +class BSP_HAS_USC320(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "This bsp has a v3 usc320 system controller chip." + + +class BSP_INSTRUCTION_CACHE_ENABLED(Boolean): + value = True + tag = ["storage"] + undef = True + descr = """ +Enables the instruction cache, if defined to a value other than zero + """ + + +class BSP_INTERRUPT_STACK_AT_WORK_AREA_BEGIN(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Indicate that the interrupt stack is at the work area begin" + + +class BSP_LEON3_SMP(Integer): + value = 1 + tag = ["build"] + undef = True + descr = """ +Always defined when on a leon3 to enable the leon3 support for determining +the cpu core number in an smp configuration. + """ + + +class BSP_PRESS_KEY_FOR_RESET(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, print a message and wait until pressed before resetting board when +application exits. + """ + + +class BSP_RESET_BOARD_AT_EXIT(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, reset the board when the application exits." + + +class BSP_SMALL_MEMORY(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable testsuite samples with high memory demands" + + +class BSP_START_RESET_VECTOR(String): + value = "" + tag = ["general"] + undef = True + descr = "Reset vector address for bsp start" + + +class BSP_UART_AVAIL_MASK(String): + value = "0x01" + tag = ["network"] + undef = True + descr = """ +Bit mask to specify the uarts (pscs), which should be enabled on this board. +Must match the hardware requirements. Psc1 corresponds to the lsb + """ + + +class BSP_USE_NETWORK_FEC(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +If defined, then the bsp will use the fast ethernet controller for 10/100mbit +networking and used as primary networking interface. + """ + + +class BSP_USE_NETWORK_SCC(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +If defined, then the bsp will use the serial communications controller (scc1) +for 10mbit networking. + """ + + +class BSP_USE_UART2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "If defined, enables uart2." + + +class BSP_USE_UART_INTERRUPTS(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable usage of interrupts for the uart modules" + + +class BSP_VIDEO_80x50(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, set the vga display to 80x50." + + +class CC(String): + value = "" + tag = ["build"] + undef = True + descr = "C compiler command" + + +class CCAS(String): + value = "" + tag = ["build"] + undef = True + descr = "Assembler compiler command (defaults to CC)" + + +class CCASFLAGS(String): + value = "" + tag = ["build"] + undef = True + descr = "Assembler compiler flags (defaults to cflags)" + + +class CCLK(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Cpu clock in hz" + + +class CD2401_INT_LEVEL(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Interrupt level for the cd2401 (when cd2401_io_mode == 1)." + + +class CD2401_IO_MODE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "0 for polled I/O, 1 for interrupt-driven." + + +class CD2401_USE_TERMIOS(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable using termios based console." + + +class CFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "C compiler flags" + + +class CFLAGS_DEBUG(String): + value = "" + tag = ["build"] + undef = True + descr = "Debug compiler flags." + + +class CFLAGS_OPTIMISE(String): + value = "" + tag = ["build"] + undef = True + descr = "Compiler flags for optimisation" + + +class CLOCK_DRIVER_USE_8254(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the good old 8254 chip to report +microsecond-accuracy clock times. Enable it, if: - you have nanosecond +timing enabled (you do not have use_ticks_for_cpu_usage_statistics enabled) +- you do not have clock_driver_use_tsc enabled (use one, the other, or +neither) - you do not mind adding roughly 5 microseconds to each context +switch. + """ + + +class CLOCK_DRIVER_USE_8254CLOCK_DRIVER_USE_TSC(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the good old 8254 chip to report +microsecond-accuracy clock times. Enable it, if: 1, you have nanosecond timing +enabled (you do not have use_ticks_for_cpu_usage_statistics enabled) 2, you +do not have clock_driver_use_tsc enabled (use one, the other, or neither 3, +you do not mind adding roughly 5 microseconds to each context switch. + """ + + +class CLOCK_DRIVER_USE_FAST_IDLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +This sets a mode where the time runs as fast as possible when a clock isr +occurs while the idle thread is executing. This can significantly reduce +simulation times. + """ + + +class CLOCK_DRIVER_USE_TSC(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If enabled, the clock driver will use the tsc register available with pentium- +class cpus to report close to nanosecond-accuracy clock times. Enable it, if: +1, you have nanosecond timing enabled (you do not have +use_ticks_for_cpu_usage_statistics enabled 2, you do not have +clock_driver_use_8254 enabled (use one, the other, or neither 3, you have a +pentium which supports tsc (all intels, and probably all or most clones 4, you +do not have a variable-speed cpu clock. Note that some motherboard bios will +automatically vary clock speed for thermal control. Note also, however, that +really new pentium-class chips from intel and amd will maintain a constant- +rate tsc regardless. + """ + + +class CONFIG_CFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Default compiler flags for rtems-config" + + +class CONFIG_CONSOLE(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for console (uart 0)" + + +class CONFIG_FPSP(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined enables the motorola floating point support package (fpsp) + """ + + +class CONFIG_I2C_0(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 0" + + +class CONFIG_I2C_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 1" + + +class CONFIG_I2C_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for i2c 2" + + +class CONFIG_LDFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Default linker flags for rtems-config" + + +class CONFIG_LIBS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "= Default libraries for rtems-config" + + +class CONFIG_U3CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 3" + + +class CONFIG_U4CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 4" + + +class CONFIG_U5CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 5" + + +class CONFIG_U6CLK(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock configuration for uart 6" + + +class CONFIG_UART_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 1" + + +class CONFIG_UART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 2" + + +class CONFIG_UART_3(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 3" + + +class CONFIG_UART_CLKMODE(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Clock mode configuration for uarts" + + +class CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK(Boolean): + value = True + tag = ["general"] + undef = True + descr = """ +If defined then the bsp may reduce the available memory size initially. This +can be useful for debugging (reduce the core size) or dynamic loading (std gcc +text offsets/Jumps are < +/-32m). Note that the policy can still be defined by +the application (see sbrk.C, bsp_sbrk_policy). By undefining +configure_malloc_bsp_supports_sbrk this feature is removed and a little memory +is saved. + """ + + +class CONS_SCC1_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc1 uart if mode) must be defined if scc1 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC2_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc2 uart if mode) must be defined if scc2 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC3_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc3 uart if mode) must be defined if scc3 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SCC4_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--scc4 uart if mode) must be defined if scc4 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONS_SMC1_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--smc1 uart if mode) must be defined if smc1 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not +used]) + """ + + +class CONS_SMC2_MODE(String): + value = "CONS_MODE_UNUSED" + tag = ["network"] + undef = True + descr = """ +(Bsp--smc2 uart if mode) must be defined if smc2 is used as a tty (uart) +channel. Set it to cons_mode_polled for polled operation, cons_mode_irq for +interrupt driven (spooled) operation. Set it to cons_mode_unused, if not used + """ + + +class CONSOLE_BAUDRATE(Integer): + value = 9600 + tag = ["general"] + undef = True + descr = "The baudrate of the console uart." + + +class CONSOLE_CHN(String): + value = "CONS_CHN_SMC1" + tag = ["general"] + undef = True + descr = """ +Bsp--console driver) must be defined to be one of cons_chn_smc1, +cons_chn_smc2, cons_chn_scc1, cons_chn_scc2, cons_chn_scc3, or cons_chn_scc4. +Determines which device will be registered as /Dev/Console. + """ + + +class CONSOLE_MINOR(String): + value = "SMC1_MINOR" + tag = ["general"] + undef = True + descr = """ +Port to use for the rtems console: 0 - /Dev/Tty0, serial port 1/Console on the +mvme712m, 1 - /Dev/Tty1, serial port 2/Tty01 on the mvme712m, 2 - /Dev/Tty2, +serial port 3 on the mvme712m, 3 - /Dev/Tty3, serial port 4 on the mvme712m.]) + """ + + +class CONSOLE_MINOR_DUPLICATE(String): + value = "SMC2_MINOR" + tag = ["general"] + undef = True + descr = """ +Bsp--console driver) must be defined to be one of smc1_minor, smc2_minor, +scc2_minor, scc3_minor, or scc4_minor. Determines which device will be +registered as /Dev/Console. + """ + + +class CONSOLE_USE_INTERRUPTS(Boolean): + value = True + tag = ["general"] + undef = False + descr = """ +The erc32 console driver can operate in either polled or interrupt mode. Under +the simulator (especially when fast_uart is defined), polled seems to operate +better. It is common for a task to print a line (like the end of test message) +and then exit. In this case, the program returns control to the simulator +command line before the program has even queued the output to the uart. Thus +sis has no chance of getting the data out. + """ + + +class CPU_CLOCK_RATE_HZ(Integer): + value = 20000000 + tag = ["general"] + undef = True + descr = "Cpu clock rate in hz" + + +class DISABLE_MMU(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu" + + +class DISABLE_READ_ONLY_PROTECTION(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu protection of read-only sections" + + +class DISABLE_READ_WRITE_DATA_CACHE(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable cache for read-write data sections" + + +class DISPATCH_HANDLER_STAT(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Used by irq/Irq.C" + + +class EMC_MICRON(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable micron configuration for emc" + + +class EMC_NUMONYX(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable numonyx configuration for emc" + + +class EMC_TEST(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable tests for emc" + + +class ENABLE(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Whether a bsp is enabled or disabled for use." + + +class ENABLE_DEBUG(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable debug build." + + +class ENABLE_FPSP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Motorola floating point support package (fpsp)" + + +class ENABLE_LCD(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the sed1356 controller and LCD." + + +class ENABLE_MP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable multiprocessing." + + +class ENABLE_MULTILIB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_NETWORKING(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable tcp/Ip stack." + + +class ENABLE_NEWLIB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_POSIX(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable posix." + + +class ENABLE_PTHREADS(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable pthreads, requires posix." + + +class ENABLE_SERDBG(Boolean): + value = False + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_SHELL(Boolean): + value = True + tag = ["general"] + undef = True + descr = "???" + + +class ENABLE_SIS_QUIRKS(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, then the sis simulator specific code in the bsp will be enabled. +In particular, sis requires special initialization not used on real erc32 + """ + + +class ENABLE_SMP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable smp, available for i386/Sparc only." + + +class ENABLE_UMON(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the umon console." + + +class ENABLE_UMON_CONSOLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the micromonitor console device." + + +class ENABLE_USART0(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 0." + + +class ENABLE_USART1(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 1." + + +class ENABLE_USART2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 2." + + +class ENABLE_USART3(Boolean): + value = False + tag = ["general"] + undef = True + descr = "If defined, enable use of the usart 3." + + +class ENABLE_WATCHDOG_RESET(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Bsp_reset() will use the watchdog to reset the chip" + + +class EPPCBUG_SMC1(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +If defined, smc1 is in use by eppc-bug. The console driver will not re- +initialize that port. + """ + + +class EPPCBUG_VECTORS(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +(Bsp--rtems) if defined, vectors branch to eppcbug, except the following: +0x500 (external interrupt), 0x900 (decrementer).]) + """ + + +class ETHERNET_RMII(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class GEN83XX_ENABLE_INTERRUPT_NESTING(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Enable interrupt nesting" + + +class HAS_DBUG(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +If defined, we will not boot from reset, but from freescale dbug monitor. + """ + + +class HAS_LOW_LEVEL_INIT(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, we will do all the low level init of the chip (like +bus/Memory...). + """ + + +class HAS_PMC_PSC8(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Whether has a psc8 pmc board attached to pmc slot" + + +class HAS_SMC91111(Boolean): + value = False + tag = ["network"] + undef = True + descr = "If defined the board has the smc91111 networking chip." + + +class HAS_UBOOT(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable u-boot startup" + + +class HAVE_SHSIM_IOMEM_PATCH(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +Whether support for functional iomem in shsim/Gdb shall be enabled + """ + + +class HCLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Ahb bus clock in hz" + + +class HEAP_EXTEND(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Enable heap extend by ethernet and usb regions" + + +class IDE_USE_PRIMARY_INTERFACE(Boolean): + value = True + tag = ["general"] + undef = True + descr = """ +Determines, whether rtems will try to use the primary ide interface. Disable +it, if: 1, you have no primary ide interface. 2, you have no disk attached to +this interface or 3, you do not want to access disks attached to this +interface. + """ + + +class IDE_USE_SECONDARY_INTERFACE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +Determines, whether rtems will try to use the secondary ide interface. Enable +it, if: 1, you have a secondary ide interface 2, you have at least one disk +attached to this interface 3, you do want to access disks attached to this +interface. + """ + + +class INITIALIZE_COM_PORTS(Boolean): + value = False + tag = ["general"] + undef = True + descr = "???" + + +class INTERRUPT_USE_TABLE(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Select if interrupt use table or link list" + + +class LDFLAGS(StringList): + value = [] + tag = ["build"] + undef = True + descr = """ +Linker flags only, do not use this for directories or libraries + """ + + +class LIBS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Libraries to pass to the linker, e.G. -L<library>" + + +class LINK_END(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Objects linked last" + + +class LINK_START(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Objects linked first" + + +class LINK_LINK(StringList): + value = ["-L${RTEMS} -T ${RTEMS}/linkcmds -dc -dp -N"] + tag = ["build"] + undef = True + descr = "Linker link flags" + + +class LINKCMDS(StringList): + value = [] + tag = ["build"] + undef = True + descr = "Linker command files, first one is installed as linkcmds" + + +class LPC24XX_CCLK(String): + value = "72000000U" + tag = ["general"] + undef = True + descr = "Cpu clock in hz" + + +class LPC24XX_CONFIG_CONSOLE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Configuration for console (uart 0)" + + +class LPC24XX_CONFIG_I2C_0(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Configuration for i2c 0" + + +class LPC24XX_CONFIG_I2C_1(Integer): + value = 1 + tag = ["network"] + undef = True + descr = "Configuration for i2c 1" + + +class LPC24XX_CONFIG_I2C_2(String): + value = "" + tag = ["network"] + undef = True + descr = "Configuration for i2c 2" + + +class LPC24XX_CONFIG_UART_1(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Configuration for uart 1" + + +class LPC24XX_CONFIG_UART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 2" + + +class LPC24XX_CONFIG_UART_3(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Configuration for uart 3" + + +class LPC24XX_EMC_MICRON(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Enable micron configuration for emc" + + +class LPC24XX_EMC_NUMONYX(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Enable numonyx configuration for emc" + + +class LPC24XX_EMC_TEST(String): + value = "" + tag = ["general"] + undef = True + descr = "Enable tests for emc" + + +class LPC24XX_ETHERNET_RMII(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class LPC24XX_HEAP_EXTEND(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable heap extend by ethernet and usb regions" + + +class LPC24XX_OSCILLATOR_MAIN(String): + value = "12000000U" + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class LPC24XX_OSCILLATOR_RTC(String): + value = "32768U" + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class LPC24XX_SPECIAL_TASK_STACKS_SUPPORT(Integer): + value = 1 + tag = ["general"] + undef = True + descr = """ +Enable special task stack support for task stacks in internal ram + """ + + +class LPC24XX_STOP_ETHERNET(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class LPC24XX_STOP_GPDMA(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class LPC24XX_STOP_USB(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class LPC24XX_UART_BAUD(String): + value = "115200U" + tag = ["general"] + undef = True + descr = "Baud for uarts" + + +class LPC32XX_ARM_CLK(String): + value = "208000000U" + tag = ["general"] + undef = True + descr = "Arm clock in hz" + + +class LPC32XX_CONFIG_U3CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 3" + + +class LPC32XX_CONFIG_U4CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 4" + + +class LPC32XX_CONFIG_U5CLK(String): + value = "0x00001386U" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 5" + + +class LPC32XX_CONFIG_U6CLK(String): + value = "" + tag = ["network"] + undef = True + descr = "Clock configuration for uart 6" + + +class LPC32XX_CONFIG_UART_CLKMODE(String): + value = "0x00000200U" + tag = ["network"] + undef = True + descr = "Clock mode configuration for uarts" + + +class LPC32XX_DISABLE_MMU(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu" + + +class LPC32XX_DISABLE_READ_ONLY_PROTECTION(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable mmu protection of read-only sections" + + +class LPC32XX_DISABLE_READ_WRITE_DATA_CACHE(Boolean): + value = False + tag = ["storage"] + undef = True + descr = "Disable cache for read-write data sections" + + +class LPC32XX_ENABLE_WATCHDOG_RESET(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Enable watchdog reset" + + +class LPC32XX_ETHERNET_RMII(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable rmii for ethernet" + + +class LPC32XX_HCLK(String): + value = "104000000U" + tag = ["general"] + undef = True + descr = "Ahb bus clock in hz" + + +class LPC32XX_OSCILLATOR_MAIN(String): + value = "13000000U" + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class LPC32XX_OSCILLATOR_RTC(String): + value = "32768U" + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class LPC32XX_PERIPH_CLK(String): + value = "13000000U" + tag = ["geenral"] + undef = True + descr = "Peripheral clock in hz" + + +class LPC32XX_SCRATCH_AREA_SIZE(Integer): + value = 4096 + tag = ["general"] + undef = True + descr = "Size of scratch area" + + +class LPC32XX_STOP_ETHERNET(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class LPC32XX_STOP_GPDMA(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class LPC32XX_STOP_USB(Boolean): + value = True + tag = ["general"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class LPC32XX_UART_1_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 1" + + +class LPC32XX_UART_2_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 2" + + +class LPC32XX_UART_7_BAUD(String): + value = "" + tag = ["network"] + undef = True + descr = "Baud for uart 7" + + +class MPC5200_PSC_INDEX_FOR_GPS_MODULE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "Psc index for gps module, if defined results in '/Dev/Gps'" + + +class MPC55XX_BOARD_GWLCFM(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for gwlcfm board" + + +class MPC55XX_BOARD_MPC5566EVB(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for mpc5566evb board" + + +class MPC55XX_BOARD_MPC5674FEVB(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for mpc5674fevb board" + + +class MPC55XX_BOARD_PHYCORE_MPC5554(Boolean): + value = True + tag = ["build"] + undef = True + descr = "If defined, use custom settings for phycore mpc5554 board" + + +class MPC55XX_BOOTFLAGS(String): + value = "" + tag = ["build"] + undef = True + descr = """ +If defined, builds in bootflags above the rchw for setup in a debugger to +avoid startup mmu setup + """ + + +class MPC55XX_CHIP_TYPE(Integer): + value = 5554 + tag = ["build"] + undef = True + descr = "Specifies the chip type in use (e.G. 5554 for mpc5554" + + +class MPC55XX_CLOCK_EMIOS_CHANNEL(String): + value = "MPC55XX_EMIOS_CHANNEL_NUMBER-1" + tag = ["build"] + undef = True + descr = """ +Define to the emios channel to use for the bsp clock. The default is the last +channel. + """ + + +class MPC55XX_EMIOS_PRESCALER(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "Must be defined to set the emios prescaler" + + +class MPC55XX_ESCI_CONSOLE_MINOR(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +Determines which esci device will be registered as /Dev/Console + """ + + +class MPC55XX_ESCI_USE_INTERRUPTS(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +Define to zero or one to disable or enable interrupts for the esci devices + """ + + +class MPC55XX_FMPLL_CLK_OUT(Integer): + value = 128000000 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll output clock (in hz) for clock generation + """ + + +class MPC55XX_FMPLL_MFD(Integer): + value = 12 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll multiplication factor for clock generation + """ + + +class MPC55XX_FMPLL_PREDIV(Integer): + value = 1 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the pll predivider factor for clock generation + """ + + +class MPC55XX_FMPLL_REF_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = """ +Must be defined to be the external reference clock (in hz) for clock +generation + """ + + +class NVRAM_CONFIGURE(Boolean): + value = True + tag = ["storage"] + undef = True + descr = """ +Define to 1 if you want the console driver, network driver and caches +configured at boot time from parameters stored in nvram. If set to 1, most +parameters below are ignored during the build. If not set to 1, then the +console driver is configured at build time, the network host information is +obtained from application supplied data structures, and the caches are +configured at boot time based on the information supplied in this file. + """ + + +class ON_SIMULATOR(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, this indicates the bsp is being built to run on the lm32 simulator +in gdb. This enables fast idle support which speeds up the clock ticks while +the idle task is running so time spent in the idle task is minimized. This +significantly reduces the wall time required to execute the rtems test suites. +It also enables a special exit and alternate printk support. + """ + + +class ON_SKYEYE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, enable options which optimize executingon the skyeye simulator. +Speed up the clock ticks while the idle task is running so time spent in the +idle task is minimized. This significantly reduces the wall time required to +execute the rtems test suites. + """ + + +class OSCILLATOR_MAIN(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Main oscillator frequency in hz" + + +class OSCILLATOR_RTC(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Rtc oscillator frequency in hz" + + +class PATH_TOOLS(String): + value = "" + tag = ["general"] + undef = True + descr = "Location of rtems tools." + + +class PERIPH_CLK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Peripheral clock in hz" + + +class PPC_USE_SPRG(Boolean): + value = True + tag = ["build"] + undef = True + descr = """ +If defined, then the powerpc specific code in rtems will use some of the +special purpose registers to slightly optimize interrupt response time. The +use of these registers can conflict with other tools like debuggers. + """ + + +class PPC_VECTOR_FILE_BASE(String): + value = "0x0100" + tag = ["build"] + undef = True + descr = """ +This defines the base address of the exception table. Note: vectors are +actually at 0xfff00000 but file starts at offset. + """ + + +class PREFIX(String): + value = "" + tag = ["general"] + undef = True + descr = "Install prefix." + + +class PRINTK_CHN(String): + value = "NOT_DEFINED_IN_BSP" + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) must be defined to be one of cons_chn_smc1, +cons_chn_smc2, cons_chn_scc2, cons_chn_scc3, or cons_chn_scc4. Determines +which device is used for output y printk(). If the port that printk() uses is +also used for other I/O (e.G. If printk_chn == console_chn), then both ports +should use the same type of I/O, otherwise the drivers will likely conflict +with each other. + """ + + +class PRINTK_IO_MODE(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) define to 0 or 1 if you want polled I/O performed by +rtems. Define to 2 if you want polled I/O performed by eppcbug. The printk() +port is not configured to use termios. With eppcbug 1.1, if mode 2 is +selected, printk_minor must be set to smc1_minor. This is a deficiency of the +firmware: it does not perform serial I/O on any port other than its default +debug port, which must be smc1. Printk always uses polled output. + """ + + +class PRINTK_MINOR(String): + value = "NOT_DEFINED_IN_BSP" + tag = ["general"] + undef = True + descr = """ +Port to use for the rtems console: 0 - /Dev/Tty0, serial port 1/Console on the +mvme712m, 1 - /Dev/Tty1, serial port 2/Tty01 on the mvme712m, 2 - /Dev/Tty2, +serial port 3 on the mvme712m, 3 - /Dev/Tty3, serial port 4 on the mvme712m.]) + """ + + +class PRINTK_MINOR_DUPLICATE(String): + value = "SMC2_MINOR" + tag = ["general"] + undef = True + descr = """ +(Bsp--console driver) must be defined to be one of smc1_minor, smc2_minor, +scc2_minor, scc3_minor, or scc4_minor. Determines which device is used for +output by printk(). If the port that printk() uses is also used for other I/O +(e.G. If printk_minor == \$console_minor), then both ports should use the +same type of I/O, otherwise the drivers will likely conflict with each other. + """ + + +class QORIQ_CLOCK_TIMER(Integer): + value = 0 + tag = ["general"] + undef = True + descr = """ +Global timer used for system clock, 0..3 maps to a0..a3, and 4..7 maps to +b0..b3 + """ + + +class QORIQ_ETSEC_1_PHY_ADDR(Integer): + value = -1 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 1" + + +class QORIQ_ETSEC_2_PHY_ADDR(Integer): + value = 0 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 2" + + +class QORIQ_ETSEC_3_PHY_ADDR(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "Phy address for etsec interface 3" + + +class QORIQ_INITIAL_MSR(String): + value = "0x02000200" + tag = ["general"] + undef = True + descr = "Initial msr value" + + +class QORIQ_INITIAL_SPEFSCR(String): + value = "0x00000000" + tag = ["general"] + undef = True + descr = "Initial spefscr value" + + +class QORIQ_INTERCOM_AREA_BEGIN(String): + value = "0x3000000" + tag = ["build"] + undef = True + descr = "Inter-processor communication area begin" + + +class QORIQ_INTERCOM_AREA_SIZE(String): + value = "0x1000000" + tag = ["build"] + undef = True + descr = "Inter-processor communication area size" + + +class QORIQ_UART_0_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 0, otherwise use 0" + + +class QORIQ_UART_1_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 1, otherwise use 0" + + +class QORIQ_UART_BRIDGE_0_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 0 to intercom bridge, otherwise use 0" + + +class QORIQ_UART_BRIDGE_1_ENABLE(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Use 1 to enable uart 1 to intercom bridge, otherwise use 0" + + +class QORIQ_UART_BRIDGE_MASTER_CORE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge master core index" + + +class QORIQ_UART_BRIDGE_SLAVE_CORE(Integer): + value = 1 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge slave core index" + + +class QORIQ_UART_BRIDGE_TASK_PRIORITY(Integer): + value = 250 + tag = ["network"] + undef = True + descr = "Uart to intercom bridge task priority" + + +class RTEMS_BSP_I2C_EEPROM_DEVICE_NAME(String): + value = "eeprom" + tag = ["storage"] + undef = True + descr = "Eeprom name for libi2c" + + +class RTEMS_BSP_I2C_EEPROM_DEVICE_PATH(String): + value = "/dev/i2c1.eeprom" + tag = ["storage"] + undef = True + descr = "Eeprom device file path" + + +class RTEMS_XPARAMETERS_H(String): + value = "<xparameters_dflt.h>" + tag = ["general"] + undef = True + descr = """ +This defines the location of the hardware specific xparameters.H + """ + + +class RTEMS_XPPC_BASE(String): + value = "." + tag = ["build"] + undef = True + descr = "Defines path to xilinx xps ppc libraries." + + +class SCORE603E_OPEN_FIRMWARE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use open firmware rom monitor" + + +class SCORE603E_USE_DINK(Boolean): + value = False + tag = ["build"] + undef = True + descr = "???" + + +class SCORE603E_USE_NONE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use no rom monitor" + + +class SCORE603E_USE_SDS(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use sds rom monitor" + + +class SCRATCH_AREA_SIZE(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Size of scratch area" + + +class SIMSPARC_FAST_IDLE(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, speed up the clock ticks while the idle task is running so time +spent in the idle task is minimized. This significantly reduces the wall time +required to execute the rtems test suites. + """ + + +class SINGLE_CHAR_MODE(String): + value = "" + tag = ["general"] + undef = True + descr = "Enable single character mode for the psc console driver" + + +class SMC91111_ENADDR_IS_SETUP(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined the smc91111 chip has the ethernet address loaded at reset. + """ + + +class SPECIAL_TASK_STACKS_SUPPORT(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +Enable special task stack support for task stacks in internal ram. + """ + + +class SPI_BOARD_INIT_FNC(String): + value = "bsp_dummy_spi_init" + tag = ["build"] + undef = True + descr = """ +(Bsp--spi board init function) specify the function that inits the board port +lines and further devices. + """ + + +class SPI_SEND_ADDR_FNC(String): + value = "bsp_dummy_spi_sel_addr" + tag = ["build"] + undef = True + descr = """ +Bsp--spi send address function) specify the function that addresses spi +devices. Set to bsp_dummy_spi_sel_addr for dummy implementation + """ + + +class SPI_SEND_STOP_FNC(String): + value = "bsp_dummy_spi_send_stop" + tag = ["build"] + undef = True + descr = """ +Bsp--spi send stop function) specify the function that deaddresses spi +devices. Set to bsp_dummy_spi_send_stop for dummy implementation + """ + + +class STANDALONE_EVB(String): + value = "" + tag = ["general"] + undef = True + descr = """ +If defined, compiles code to jump-start from flash, without a monitor + """ + + +class START_HW_INIT(String): + value = "" + tag = ["build"] + undef = True + descr = """ +If defined, selects whether 'early_hw_init()' is called from 'start.S'; +'bsp_hw_init()' is always called from 'bspstart.C' + """ + + +class STOP_ETHERNET(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Stop ethernet controller at start-up to avoid dma interference" + + +class STOP_GPDMA(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Stop general purpose dma at start-up to avoid dma interference" + + +class STOP_USB(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Stop usb controller at start-up to avoid dma interference" + + +class TESTS_USE_PRINTK(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Tests use printk() for output" + + +class UART_1_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 1" + + +class UART_2_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 2" + + +class UART_7_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uart 7" + + +class UART_BAUD(Boolean): + value = False + tag = ["network"] + undef = True + descr = "Baud for uarts" + + +class UART_USE_DMA(Boolean): + value = True + tag = ["network"] + undef = True + descr = """ +The uart driver can operate in dma mode with interrupts. Set true if dma +operation is required + """ + + +class UARTS_IO_MODE(Integer): + value = 0 + tag = ["network"] + undef = True + descr = """ +Define to 0 or 1 if you want polled I/O performed by rtems. Define to 1 if +you want interrupt-driven performed by rtems. Define to 2 if you want polled +I/O performed by eppcbug. There is no provision to have a MIX of interrupt- +driven and polled I/O ports, except that the printk port may use a different +mode from the other ports. If this is done, do not open the printk port from +an rtems application. With eppcbug 1.1, if mode 2 is selected, console_minor +must be set to smc1_minor. This is a deficiency of the firmware: it does not +perform serial I/O on any port other than its default debug port, which must +be smc1. + """ + + +class UARTS_USE_TERMIOS(Boolean): + value = False + tag = ["network"] + undef = True + descr = """ +Define to 1 if you want termios support for every port. Termios support is +independent of the choice of uart I/O mode. + """ + + +class UARTS_USE_TERMIOS_INT(Boolean): + value = True + tag = ["network"] + undef = True + descr = "Enable interrupt support for the psc console driver" + + +class USE_COM1_AS_CONSOLE(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +Determines, whether the console will be associated with the standard vga +display or with the com1 serial port. Currently only the vga display and com1 +support printk. + """ + + +class WATCHDOG_TIMEOUT(String): + value = "0xFFFF" + tag = ["general"] + undef = True + descr = """ +Define to the desired timeout (in steps of 1/20 msec) to enable the watchdog. +Default is to disable the watchdog entirely. + """ + + +# These are all hacks, they only exist to enable shared BSPS, they are not +# required and will be removed in the future. + +class BOARD_PHYCORE_MPC5554(Boolean): + value = False + tag = ["general"] + undef = True + descr = """ +If defined, use custom settings for the phytec phycore mpc5554 som + """ + + +class BSP_TYPE_DP2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable settings for dp2" + + +class csb637(Boolean): + value = False + tag = ["build"] + undef = True + descr = """ +If defined, this indicates that the bsp is being built for the csb637 +variant. + """ + + +class GEN68360(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the gen68360 bsp." + + +class GEN68360_040(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the gen68360_040 bsp." + + +class HSC_CM01(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the hsc_cm01 bsp." + + +class M5484FIREENGINE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the m5484fireengine bsp." + + +class mpc8240(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for boards with mpc8240 -- undefined for others" + + +class MPC8313ERDB(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8313erdb bsp." + + +class MPC8349(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8349 libcpu family." + + +class MPC8349EAMDS(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the mpc8349eamds bsp." + + +class mvme167(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for mvme167 -- undefined for others" + + +class mvme2100(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for mvme2100 -- undefined for others" + + +class PGH360(Boolean): + value = False + tag = ["build"] + undef = True + descr = "If defined, use custom settings for the pgh360 bsp." + + +class qemu(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Defined for qemu bsp -- undefined for others" + + +class MPC5200_BOARD_BRS5L(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 BRS5L" + +class MPC5200_BOARD_BRS6L(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 BRS6l" + +class MPC5200_BOARD_DP2(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 dp2" + +class MPC5200_BOARD_ICECUBE(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 icecube" + +class MPC5200_BOARD_PM520_CR825(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 PM520_CR825" + +class MPC5200_BOARD_PM520_ZE30(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Enable settings for powerpc MPC5200 pm520" + + +# RTEMS internal options. +class USE_CLANG(Boolean): + value = False + tag = ["build"] + undef = True + descr = "Use Clang compiler." + +class USE_GCC(Boolean): + value = True + tag = ["build"] + undef = True + descr = "Use GCC compiler.." + + + + +# THESE ARE UNSORTED! + + +class LPC24XX_PCLKDIV(String): + value = "1U" + tag = ["general"] + undef = True + descr = "clock divider for default PCLK (PCLK = CCLK / PCLKDIV)" + + +class LPC24XX_EMCCLKDIV(String): + value = "2U" + tag = ["general"] + undef = True + descr = "clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)" + + +class LPC24XX_EMC_MT48LC4M16A2(Boolean): + value = False + tag = ["general"] + undef = True + descr = "enable Micron MT48LC4M16A2 configuration for EMC" + + +class LPC24XX_EMC_W9825G2JB75I(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable Winbond W9825G2JB75I configuration for EMC" + + +class LPC24XX_EMC_IS42S32800D7(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable ISSI IS42S32800D7 configuration for EMC" + + +class LPC24XX_EMC_IS42S32800B(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable ISSI IS42S32800B configuration for EMC" + + +class LPC24XX_EMC_M29W160E(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable M29W160E configuration for EMC" + + +class LPC24XX_EMC_M29W320E70(Boolean): + value = False + tag = ["general"] + undef = True + descr = "enable M29W320E70 configuration for EMC" + + +class LPC24XX_EMC_SST39VF3201(Boolean): + value = True + tag = ["general"] + undef = True + descr = "enable SST39VF3201 configuration for EMC" + + +class LPC_DMA_CHANNEL_COUNT(Integer): + value = 2 + tag = ["general"] + undef = True + descr = "DMA channel count" + + +class BSP_USB_OTG_TRANSCEIVER_I2C_ADDR(String): + value = "" + tag = ["general"] + undef = True + descr = "USB OTG transceiver I2C address used by USB stack" + + +class MPC55XX_CHIP_FAMILY(String): + value = "(MPC55XX_CHIP_TYPE / 10)" + tag = ["general"] + undef = True + descr = "specifies the chip family in use (e.g. 555 for MPC5554)" + + +class SMSC9218I_EDMA_RX_CHANNEL(Integer): + value = 49 + tag = ["network"] + undef = True + descr = "receive eDMA channel for SMSC9218I network interface" + +class SMSC9218I_EDMA_TX_CHANNEL(Integer): + value = 48 + tag = ["network"] + undef = True + descr = "transmit eDMA channel for SMSC9218I network interface" + + +class SMSC9218I_BIG_ENDIAN_SUPPORT(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable big endian support for SMSC9218I network interface" + + +class SMSC9218I_ENABLE_LED_OUTPUTS(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable LED outputs for SMSC9218I network interface" + + +class SMSC9218I_RESET_PIN(Integer): + value = 186 + tag = ["network"] + undef = True + descr = "reset pin for SMSC9218I network interface" + + +class SMSC9218I_IRQ_PIN(Integer): + value = 193 + tag = ["network"] + undef = True + descr = "IRQ pin for SMSC9218I network interface" + + +class MPC55XX_SYSTEM_CLOCK_DIVIDER(Integer): + value = 1 + tag = ["general"] + undef = True + descr = "system clock divider" + + +class MPC55XX_REFERENCE_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = "Must be defined to be the external reference clock (in Hz) for clock generation" + + +class MPC55XX_SYSTEM_CLOCK(Integer): + value = 8000000 + tag = ["general"] + undef = True + descr = "The system clock frequency in Hz." + + +class MPC55XX_FMPLL_ESYNCR1_CLKCFG(Integer): + value = 7 + tag = ["general"] + undef = True + descr = "the FMPLL ESYNCR1[CLKCFG] value" + +class MPC83XX_BOARD_HSC_CM01(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, then use settings for the HSC_CM01 board" + + + + + + +class LM3S69XX_ENABLE_UART_0(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 0" + + +class LM3S69XX_ENABLE_UART_1(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 1" + + +class LM3S69XX_ENABLE_UART_2(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable UART 2" + + +class LM3S69XX_HAS_UDMA(Boolean): + value = False + tag = ["general"] + undef = True + descr = "defined if MCU supports UDMA" + + +class LM3S69XX_MCU_LM3S3749(Boolean): + value = False + tag = ["build"] + undef = True + descr = "board has LM3S3749 MCU" + + +class LM3S69XX_MCU_LM3S6965(Boolean): + value = False + tag = ["build"] + undef = True + descr = "board has LM3S6965 MCU" + + +class LM3S69XX_NUM_GPIO_BLOCKS(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "number of GPIO blocks supported by MCU" + + +class LM3S69XX_NUM_SSI_BLOCKS(Integer): + value = 1 + tag = ["build"] + undef = True + descr = "number of SSI blocks supported by MCU" + + +class LM3S69XX_SSI_CLOCK(String): + value = "1000000U" + tag = ["general"] + undef = True + descr = "SSI clock in Hz" + + +class LM3S69XX_SYSTEM_CLOCK(String): + value = "50000000U" + tag = ["general"] + undef = True + descr = "system clock in Hz" + + +class LM3S69XX_UART_BAUD(String): + value = "115200U" + tag = ["general"] + undef = True + descr = "baud for UARTs" + + +class LM3S69XX_USE_AHB_FOR_GPIO(Boolean): + value = False + tag = ["general"] + undef = True + descr = "use AHB apperture to access GPIO registers" + + +class LM3S69XX_XTAL_CONFIG(String): + value = "0x10" + tag = ["build"] + undef = True + descr = "crystal configuration for RCC register" + + +class BSP_ARM_A9MPCORE_PERIPHCLK(String): + value = "100000000U" + tag = ["build"] + undef = True + descr = "ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz" + + + +class STM32F4_HSE_OSCILLATOR(Integer): + value = 8000000 + tag = ["build"] + undef = True + descr = "HSE oscillator frequency in Hz" + + + +class STM32F4_SYSCLK(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "SYSCLK frequency in Hz" + + + +class STM32F4_HCLK(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "HCLK frequency in Hz" + + + +class STM32F4_PCLK1(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "PCLK1 frequency in Hz" + + + +class STM32F4_PCLK2(Integer): + value = 16000000 + tag = ["general"] + undef = True + descr = "PCLK2 frequency in Hz" + + + +class STM32F4_USART_BAUD(Integer): + value = 115200 + tag = ["network"] + undef = True + descr = "baud for USARTs" + + + +class STM32F4_ENABLE_USART_1(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 1" + + +class STM32F4_ENABLE_USART_2(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 2" + + +class STM32F4_ENABLE_USART_3(Boolean): + value = True + tag = ["network"] + undef = True + descr = "enable USART 3" + + +class STM32F4_ENABLE_UART_4(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable UART 4" + + +class STM32F4_ENABLE_UART_5(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable UART 5" + + +class STM32F4_ENABLE_USART_6(Boolean): + value = False + tag = ["network"] + undef = True + descr = "enable USART 6" + + +class MPC83XX_BOARD_BR_UID(Boolean): + value = True + tag = ["general"] + undef = True + descr = "if defined, then use settings for the BR UID board" + + +class MPC83XX_NETWORK_INTERFACE_0_PHY_ADDR(String): + value = "0x11" + tag = ["build"] + undef = True + quote = False + descr = "PHY address of network interface 0" + + +class MPC83XX_CHIP_TYPE(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "chip type of the MPC83XX family" + + +class MPC83XX_HAS_NAND_LP_FLASH_ON_CS0(Boolean): + value = True + tag = ["build"] + undef = True + descr = "indicates if the board has a NAND large page flash on chip select 0" + + +class BSP_INTERRUPT_HANDLER_TABLE_SIZE(Integer): + no_default = True + undef = True + descr = "defines the maximum number of interrupt handlers" + tag = ["general"] + +class MPC55XX_NULL_POINTER_PROTECTION(Boolean): + value = True + tag = ["build"] + undef = True + descr = "enable NULL pointer protection" + + +class MPC55XX_CLOCK_PIT_CHANNEL(Integer): + no_default = True + undef = True + descr = "selects the PIT channel for the RTEMS system tick (the default is the last channel" + tag = ["build"] + +class MPC55XX_NEEDS_LOW_LEVEL_INIT(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, do low level initialization" + + +class BSP_DATA_CACHE_USE_WRITE_THROUGH(Boolean): + no_default = True + undef = True + descr = "use write-through for data cache" + tag = ["storage"] + +class MPC55XX_BOARD_MPC5674F_ECU508(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, use custom settings for ECU508 board" + + +class MPC55XX_CONSOLE_MINOR(Integer): + value = 0 + tag = ["build"] + undef = True + descr = "determines which serial device will be registered as /dev/console" + + +class MPC55XX_BOARD_MPC5674F_RSM6(Boolean): + value = True + tag = ["build"] + quote = False + undef = True + descr = "if defined, use custom settings for RSM6 board" + + +class MPC55XX_ENABLE_START_PROLOGUE(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, enable start prologue" + + +class BSP_DEFAULT_BAUD_RATE(Integer): + value = 115200 + tag = ["general"] + undef = True + descr = "default console baud" + + +class MPC55XX_EARLY_STACK_SIZE(Integer): + value = 1024 + tag = ["build"] + undef = True + descr = "size of the early initialization stack in bytes" + +class MPC83XX_BOARD_MPC8309SOM(Boolean): + value = True + tag = ["build"] + undef = True + descr = "if defined, then use settings for the MPC8309SOM board" + + +class ZYNQ_RAM_ORIGIN(String): + value = "0x00400000" + tag = ["storage"] + undef = True + descr = "Normal RAM region origin" + +class ZYNQ_RAM_MMU(String): + value = "%(ZYNQ_RAM_ORIGIN)s" + tag = ["storage"] + quote = False + undef = True + descr = "MMU region origin" + +class ZYNQ_RAM_MMU_LENGTH(String): + value = "16k" + tag = ["storage"] + undef = True + descr = "MMU region length" + +class ZYNQ_RAM_ORIGIN_AVAILABLE(String): + value = "%(ZYNQ_RAM_ORIGIN)s + 0x00004000" + tag = ["storage"] + undef = True + descr = "Origin of available RAM" + +class ZYNQ_RAM_LENGTH_AVAILABLE(String): + value = "%(BSP_ZYNQ_RAM_LENGTH)s - 1M - 16k" + tag = ["storage"] + undef = True + descr = "Length of available RAM" + +class ZYNQ_RAM_INT_0_ORIGIN(String): + value = "0x00000000" + tag = ["storage"] + undef = True + descr = "Internal 0 RAM region origin" + +class ZYNQ_RAM_INT_0_LENGTH(String): + value = "64k + 64k + 64k" + tag = ["storage"] + undef = True + descr = "Internal 0 RAM region length" + +class ZYNQ_RAM_INT_1_ORIGIN(String): + value = "0xFFFF0000" + tag = ["storage"] + undef = True + descr = "Internal 1 RAM region origin" + +class ZYNQ_RAM_INT_1_LENGTH(String): + value = "64k - 512" + tag = ["storage"] + undef = True + descr = "Internal 1 RAM region length" + +class BSP_ZYNQ_RAM_LENGTH(String): + value = "256M" + tag = ["storage"] + quote = False + undef = True + descr = "Override a BSP's default RAM length" + +class ZYNQ_RAM_NOCACHE_LENGTH(String): + value = "1M" + tag = ["storage"] + quote = False + undef = True + descr = "Length of nocache RAM region" + +class ZYNQ_CLOCK_CPU_1X(String): + value = "111111111U" + tag = ["general"] + quote = False + undef = True + descr = "Zynq cpu_1x clock frequency in Hz" + +class ZYNQ_CLOCK_UART(String): + value = "50000000UL" + tag = ["network"] + quote = False + undef = True + descr = "Zynq UART clock frequency in Hz" + + +class ZYNQ_CPUS(Integer): + value = 1 + tag = ["general"] + quote = False + undef = True + descr = "Number of active cores" + + +class IS_DM3730(Boolean): + value = False + tag = ["build"] + undef = True + descr = "true if SOC is DM3730" + + +class IS_AM335X(Boolean): + value = False + tag = ["build"] + undef = True + descr = "true if SOC is AM335X" + + +class CONSOLE_POLLED(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Polled console i/o." + + +class CONSOLE_BAUD(Integer): + value = 115200 + tag = ["network"] + undef = True + descr = "initial baud for console UART" + + +class ENABLE_SYSTEM_DEP(Boolean): + value = False + tag = ["general"] + undef = True + descr = "Enable dependencies on system headers, only useful if you are developing toolchains. This will slow down the build" |