diff options
Diffstat (limited to 'c/src/lib/libbsp/arm')
71 files changed, 0 insertions, 8377 deletions
diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/include/bsp.h b/c/src/lib/libbsp/arm/altera-cyclone-v/include/bsp.h deleted file mode 100644 index 833a63c9c0..0000000000 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/include/bsp.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H -#define LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_ARM_A9MPCORE_SCU_BASE 0xFFFEC000 - -#define BSP_ARM_GIC_CPUIF_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000100 ) - -#define BSP_ARM_A9MPCORE_GT_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00000200 ) - -#define BSP_ARM_GIC_DIST_BASE ( BSP_ARM_A9MPCORE_SCU_BASE + 0x00001000 ) - -#define BSP_ARM_L2C_310_BASE 0xfffef000 - -#define BSP_ARM_L2C_310_ID 0x410000c9 - -/* Forward declaration */ -struct rtems_bsdnet_ifconfig; - -/** @brief Network interface attach detach - * - * Attaches a network interface tp the network stack. - * NOTE: Detaching is not supported! - */ -int altera_cyclone_v_network_if_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching ); - -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH altera_cyclone_v_network_if_attach_detach -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */ diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/include/i2cdrv.h b/c/src/lib/libbsp/arm/altera-cyclone-v/include/i2cdrv.h deleted file mode 100644 index 9a4411d637..0000000000 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/include/i2cdrv.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef I2CDRV_H -#define I2CDRV_H - -#include <rtems.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -rtems_device_driver i2cdrv_initialize( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -rtems_device_driver i2cdrv_open( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -rtems_device_driver i2cdrv_close( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -rtems_device_driver i2cdrv_read( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -rtems_device_driver i2cdrv_write( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -rtems_device_driver i2cdrv_ioctl( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg -); - -#define I2C_DRIVER_TABLE_ENTRY \ - { \ - i2cdrv_initialize, \ - i2cdrv_open, \ - i2cdrv_close, \ - i2cdrv_read, \ - i2cdrv_write, \ - i2cdrv_ioctl \ - } - -#define I2C_IOC_SET_SLAVE_ADDRESS 1 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* I2CDRV_H */ diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/include/irq.h b/c/src/lib/libbsp/arm/altera-cyclone-v/include/irq.h deleted file mode 100644 index c136500415..0000000000 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/include/irq.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H -#define LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H - -#ifndef ASM - -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#include <bsp/arm-a9mpcore-irq.h> -#include <bsp/arm-gic-irq.h> -#include <bsp/alt_interrupt_common.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/* Use interrupt IDs as defined in alt_interrupt_common.h */ -#define BSP_INTERRUPT_VECTOR_MIN ALT_INT_INTERRUPT_SGI0 -#define BSP_INTERRUPT_VECTOR_MAX ALT_INT_INTERRUPT_RAM_ECC_UNCORRECTED_IRQ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H */
\ No newline at end of file diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/include/tm27.h b/c/src/lib/libbsp/arm/altera-cyclone-v/include/tm27.h deleted file mode 100644 index c17c0107b4..0000000000 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/include/tm27.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <bsp/arm-gic-tm27.h> - -#endif /* __tm27_h */ diff --git a/c/src/lib/libbsp/arm/beagle/include/bsp.h b/c/src/lib/libbsp/arm/beagle/include/bsp.h deleted file mode 100644 index d9fd2ae7fb..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/bsp.h +++ /dev/null @@ -1,360 +0,0 @@ -/** - * @file - * - * @ingroup arm_beagle - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * - * Modified by Ben Gras <beng@shrike-systems.com> to add lots - * of beagleboard/beaglebone definitions, delete lpc32xx specific - * ones, and merge with some other header files. - */ - -#ifndef LIBBSP_ARM_BEAGLE_BSP_H -#define LIBBSP_ARM_BEAGLE_BSP_H - -#include <bspopts.h> -#include <stdint.h> -#include <bsp/start.h> -#include <bsp/default-initial-extension.h> -#include <bsp/beagleboneblack.h> - -#include <rtems.h> -#include <rtems/irq-extension.h> - -#include <libcpu/omap3.h> -#include <libcpu/am335x.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -/* UART base clock frequency */ -#define UART_CLOCK 48000000 - -/* Access memory-mapped I/O devices */ -#define mmio_read(a) (*(volatile uint32_t *)(a)) -#define mmio_write(a,v) (*(volatile uint32_t *)(a) = (v)) -#define mmio_set(a,v) mmio_write((a), mmio_read((a)) | (v)) -#define mmio_clear(a,v) mmio_write((a), mmio_read((a)) & ~(v)) - -#define REG16(x)(*((volatile uint16_t *)(x))) -#define REG(x)(*((volatile uint32_t *)(x))) -#define BIT(x)(0x1 << x) - -#define udelay(u) rtems_task_wake_after(1 + ((u)/rtems_configuration_get_microseconds_per_tick())) - -/* Write a uint32_t value to a memory address. */ -static inline void -write32(uint32_t address, uint32_t value) -{ - REG(address) = value; -} - -/* Read an uint32_t from a memory address */ -static inline uint32_t -read32(uint32_t address) -{ - return REG(address); -} - -/* Set a 32 bits value depending on a mask */ -static inline void -set32(uint32_t address, uint32_t mask, uint32_t value) -{ - uint32_t val; - val = read32(address); - /* clear the bits */ - val &= ~(mask); - /* apply the value using the mask */ - val |= (value & mask); - write32(address, val); -} - -/* Write a uint16_t value to a memory address. */ -static inline void -write16(uint32_t address, uint16_t value) -{ - REG16(address) = value; -} - -/* Read an uint16_t from a memory address */ -static inline uint16_t -read16(uint32_t address) -{ - return REG16(address); -} - -/* Data synchronization barrier */ -static inline void dsb(void) -{ - asm volatile("dsb" : : : "memory"); -} - -/* Instruction synchronization barrier */ -static inline void isb(void) -{ - asm volatile("isb" : : : "memory"); -} - -/* flush data cache */ -static inline void flush_data_cache(void) -{ - asm volatile( - "mov r0, #0\n" - "mcr p15, #0, r0, c7, c10, #4\n" - : /* No outputs */ - : /* No inputs */ - : "r0","memory" - ); -} - -#define __arch_getb(a) (*(volatile unsigned char *)(a)) -#define __arch_getw(a) (*(volatile unsigned short *)(a)) -#define __arch_getl(a) (*(volatile unsigned int *)(a)) - -#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v)) -#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v)) -#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) - -#define writeb(v,c) ({ unsigned char __v = v; __arch_putb(__v,c); __v; }) -#define writew(v,c) ({ unsigned short __v = v; __arch_putw(__v,c); __v; }) -#define writel(v,c) ({ unsigned int __v = v; __arch_putl(__v,c); __v; }) - -#define readb(c) ({ unsigned char __v = __arch_getb(c); __v; }) -#define readw(c) ({ unsigned short __v = __arch_getw(c); __v; }) -#define readl(c) ({ unsigned int __v = __arch_getl(c); __v; }) - -#define SYSTEM_CLOCK_12 12000000 -#define SYSTEM_CLOCK_13 13000000 -#define SYSTEM_CLOCK_192 19200000 -#define SYSTEM_CLOCK_96 96000000 - -#if !defined(IS_DM3730) && !defined(IS_AM335X) -#error Unrecognized BSP configured. -#endif - -#if IS_DM3730 -#define BSP_DEVICEMEM_START 0x48000000 -#define BSP_DEVICEMEM_END 0x5F000000 -#endif - -#if IS_AM335X -#define BSP_DEVICEMEM_START 0x44000000 -#define BSP_DEVICEMEM_END 0x57000000 -#endif - -/* per-target uart config */ -#if IS_AM335X -#define BSP_CONSOLE_UART 1 -#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_1 -#define BSP_CONSOLE_UART_IRQ OMAP3_UART1_IRQ -#define BEAGLE_BASE_UART_1 0x44E09000 -#define BEAGLE_BASE_UART_2 0x48022000 -#define BEAGLE_BASE_UART_3 0x48024000 -#endif - -/* per-target uart config */ -#if IS_DM3730 -#define BSP_CONSOLE_UART 3 -#define BSP_CONSOLE_UART_BASE BEAGLE_BASE_UART_3 -#define BSP_CONSOLE_UART_IRQ OMAP3_UART3_IRQ -#define BEAGLE_BASE_UART_1 0x4806A000 -#define BEAGLE_BASE_UART_2 0x4806C000 -#define BEAGLE_BASE_UART_3 0x49020000 -#endif - -/* GPIO pin config */ -#if IS_AM335X -#define BSP_GPIO_PIN_COUNT 128 -#define BSP_GPIO_PINS_PER_BANK 32 -#endif - -#if IS_DM3730 -#define BSP_GPIO_PIN_COUNT 192 -#define BSP_GPIO_PINS_PER_BANK 32 -#endif - -/* i2c stuff */ -typedef struct { - uint32_t rx_or_tx; - uint32_t stat; - uint32_t ctrl; - uint32_t clk_hi; - uint32_t clk_lo; - uint32_t adr; - uint32_t rxfl; - uint32_t txfl; - uint32_t rxb; - uint32_t txb; - uint32_t s_tx; - uint32_t s_txfl; -} beagle_i2c; - -/* sctlr */ -/* Read System Control Register */ -static inline uint32_t read_sctlr() -{ - uint32_t ctl; - - asm volatile("mrc p15, 0, %[ctl], c1, c0, 0 @ Read SCTLR\n\t" - : [ctl] "=r" (ctl)); - return ctl; -} - -/* Write System Control Register */ -static inline void write_sctlr(uint32_t ctl) -{ - asm volatile("mcr p15, 0, %[ctl], c1, c0, 0 @ Write SCTLR\n\t" - : : [ctl] "r" (ctl)); - isb(); -} - -/* Read Auxiliary Control Register */ -static inline uint32_t read_actlr() -{ - uint32_t ctl; - - asm volatile("mrc p15, 0, %[ctl], c1, c0, 1 @ Read ACTLR\n\t" - : [ctl] "=r" (ctl)); - return ctl; -} - -/* Write Auxiliary Control Register */ -static inline void write_actlr(uint32_t ctl) -{ - asm volatile("mcr p15, 0, %[ctl], c1, c0, 1 @ Write ACTLR\n\t" - : : [ctl] "r" (ctl)); - isb(); -} - -/* Write Translation Table Base Control Register */ -static inline void write_ttbcr(uint32_t bcr) -{ - asm volatile("mcr p15, 0, %[bcr], c2, c0, 2 @ Write TTBCR\n\t" - : : [bcr] "r" (bcr)); - - isb(); -} - -/* Read Domain Access Control Register */ -static inline uint32_t read_dacr() -{ - uint32_t dacr; - - asm volatile("mrc p15, 0, %[dacr], c3, c0, 0 @ Read DACR\n\t" - : [dacr] "=r" (dacr)); - - return dacr; -} - - -/* Write Domain Access Control Register */ -static inline void write_dacr(uint32_t dacr) -{ - asm volatile("mcr p15, 0, %[dacr], c3, c0, 0 @ Write DACR\n\t" - : : [dacr] "r" (dacr)); - - isb(); -} - -static inline void refresh_tlb(void) -{ - dsb(); - - /* Invalidate entire unified TLB */ - asm volatile("mcr p15, 0, %[zero], c8, c7, 0 @ TLBIALL\n\t" - : : [zero] "r" (0)); - - /* Invalidate all instruction caches to PoU. - * Also flushes branch target cache. */ - asm volatile("mcr p15, 0, %[zero], c7, c5, 0" - : : [zero] "r" (0)); - - /* Invalidate entire branch predictor array */ - asm volatile("mcr p15, 0, %[zero], c7, c5, 6" - : : [zero] "r" (0)); /* flush BTB */ - - dsb(); - isb(); -} - -/* Read Translation Table Base Register 0 */ -static inline uint32_t read_ttbr0() -{ - uint32_t bar; - - asm volatile("mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t" - : [bar] "=r" (bar)); - - return bar & ARM_TTBR_ADDR_MASK; -} - - -/* Read Translation Table Base Register 0 */ -static inline uint32_t read_ttbr0_unmasked() -{ - uint32_t bar; - - asm volatile("mrc p15, 0, %[bar], c2, c0, 0 @ Read TTBR0\n\t" - : [bar] "=r" (bar)); - - return bar; -} - -/* Write Translation Table Base Register 0 */ -static inline void write_ttbr0(uint32_t bar) -{ - dsb(); - isb(); - /* In our setup TTBR contains the base address *and* the flags - but other pieces of the kernel code expect ttbr to be the - base address of the l1 page table. We therefore add the - flags here and remove them in the read_ttbr0 */ - uint32_t v = (bar & ARM_TTBR_ADDR_MASK ) | ARM_TTBR_FLAGS_CACHED; - asm volatile("mcr p15, 0, %[bar], c2, c0, 0 @ Write TTBR0\n\t" - : : [bar] "r" (v)); - - refresh_tlb(); -} - -/* Behaviour on fatal error; default: test-friendly. - * set breakpoint to bsp_fatal_extension. - */ -/* Enabling BSP_PRESS_KEY_FOR_RESET prevents noninteractive testing */ -/*#define BSP_PRESS_KEY_FOR_RESET 1 */ -#define BSP_PRINT_EXCEPTION_CONTEXT 1 - /* human-readable exception info */ -#define BSP_RESET_BOARD_AT_EXIT 1 - /* causes qemu to exit, signaling end of test */ - - -/** - * @defgroup arm_beagle Beaglebone, Beagleboard Support - * - * @ingroup bsp_arm - * - * @brief Beaglebones and beagleboards support package - * - */ - -/** - * @brief Beagleboard specific set up of the MMU. - * - * Provide in the application to override. - */ -BSP_START_TEXT_SECTION void beagle_setup_mmu_and_cache(void); - -#endif /* LIBBSP_ARM_BEAGLE_BSP_H */
\ No newline at end of file diff --git a/c/src/lib/libbsp/arm/beagle/include/i2c.h b/c/src/lib/libbsp/arm/beagle/include/i2c.h deleted file mode 100644 index e7d17163f4..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/i2c.h +++ /dev/null @@ -1,368 +0,0 @@ -/** - * @file - * - * @ingroup arm_beagle - * - * @brief I2C support API. - */ - -/* - * Copyright (c) 2012 Claas Ziemke. All rights reserved. - * - * Claas Ziemke - * Kernerstrasse 11 - * 70182 Stuttgart - * Germany - * <claas.ziemke@gmx.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_BEAGLE_I2C_H -#define LIBBSP_ARM_BEAGLE_I2C_H - -#include <rtems.h> - -#include <bsp.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - - -/* I2C Configuration Register (I2C_CON): */ - -#define I2C_CON_EN (1 << 15) /* I2C module enable */ -#define I2C_CON_BE (1 << 14) /* Big endian mode */ -#define I2C_CON_STB (1 << 11) /* Start byte mode (master mode only) */ -#define I2C_CON_MST (1 << 10) /* Master/slave mode */ -#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode */ - /* (master mode only) */ -#define I2C_CON_XA (1 << 8) /* Expand address */ -#define I2C_CON_STP (1 << 1) /* Stop condition (master mode only) */ -#define I2C_CON_STT (1 << 0) /* Start condition (master mode only) */ - -/* I2C Status Register (I2C_STAT): */ - -#define I2C_STAT_SBD (1 << 15) /* Single byte data */ -#define I2C_STAT_BB (1 << 12) /* Bus busy */ -#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */ -#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */ -#define I2C_STAT_AAS (1 << 9) /* Address as slave */ -#define I2C_STAT_GC (1 << 5) -#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */ -#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */ -#define I2C_STAT_ARDY (1 << 2) /* Register access ready */ -#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */ - -/* I2C Interrupt Enable Register (I2C_IE): */ -#define I2C_IE_GC_IE (1 << 5) -#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */ -#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */ -#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */ -#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */ -#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */ -/* - * The equation for the low and high time is - * tlow = scll + scll_trim = (sampling clock * tlow_duty) / speed - * thigh = sclh + sclh_trim = (sampling clock * (1 - tlow_duty)) / speed - * - * If the duty cycle is 50% - * - * tlow = scll + scll_trim = sampling clock / (2 * speed) - * thigh = sclh + sclh_trim = sampling clock / (2 * speed) - * - * In TRM - * scll_trim = 7 - * sclh_trim = 5 - * - * The linux 2.6.30 kernel uses - * scll_trim = 6 - * sclh_trim = 6 - * - * These are the trim values for standard and fast speed - */ -#ifndef I2C_FASTSPEED_SCLL_TRIM -#define I2C_FASTSPEED_SCLL_TRIM 6 -#endif -#ifndef I2C_FASTSPEED_SCLH_TRIM -#define I2C_FASTSPEED_SCLH_TRIM 6 -#endif - -/* These are the trim values for high speed */ -#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM -#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM -#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM -#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM -#endif -#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM -#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM -#endif - -#define OMAP_I2C_STANDARD 100000 -#define OMAP_I2C_FAST_MODE 400000 -#define OMAP_I2C_HIGH_SPEED 3400000 - - -/* Use the reference value of 96MHz if not explicitly set by the board */ -#ifndef I2C_IP_CLK -#define I2C_IP_CLK SYSTEM_CLOCK_96 -#endif - -/* - * The reference minimum clock for high speed is 19.2MHz. - * The linux 2.6.30 kernel uses this value. - * The reference minimum clock for fast mode is 9.6MHz - * The reference minimum clock for standard mode is 4MHz - * In TRM, the value of 12MHz is used. - */ -#ifndef I2C_INTERNAL_SAMPLING_CLK -#define I2C_INTERNAL_SAMPLING_CLK 19200000 -#endif - -#define I2C_PSC_MAX 0x0f -#define I2C_PSC_MIN 0x00 - - -#define DISP_LINE_LEN 128 -#define I2C_TIMEOUT 1000 - -#define I2C_BUS_MAX 3 - -#define I2C_BASE1 (OMAP34XX_CORE_L4_IO_BASE + 0x070000) - -#define I2C_DEFAULT_BASE I2C_BASE1 - -#define I2C_SYSS_RDONE (1 << 0) /* Internel reset monitoring */ - -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 1 - -struct i2c { - unsigned short rev; /* 0x00 */ - unsigned short res1; - unsigned short ie; /* 0x04 */ - unsigned short res2; - unsigned short stat; /* 0x08 */ - unsigned short res3; - unsigned short iv; /* 0x0C */ - unsigned short res4; - unsigned short syss; /* 0x10 */ - unsigned short res4a; - unsigned short buf; /* 0x14 */ - unsigned short res5; - unsigned short cnt; /* 0x18 */ - unsigned short res6; - unsigned short data; /* 0x1C */ - unsigned short res7; - unsigned short sysc; /* 0x20 */ - unsigned short res8; - unsigned short con; /* 0x24 */ - unsigned short res9; - unsigned short oa; /* 0x28 */ - unsigned short res10; - unsigned short sa; /* 0x2C */ - unsigned short res11; - unsigned short psc; /* 0x30 */ - unsigned short res12; - unsigned short scll; /* 0x34 */ - unsigned short res13; - unsigned short sclh; /* 0x38 */ - unsigned short res14; - unsigned short systest; /* 0x3c */ - unsigned short res15; -}; - -static unsigned short wait_for_pin( void ); - -static void wait_for_bb( void ); - -static void flush_fifo( void ); - -void i2c_init( int speed, int slaveadd ); - -static int i2c_read_byte( - unsigned char devaddr, - unsigned char regoffset, - unsigned char *value -); - -int i2c_write( - unsigned char chip, - unsigned int addr, - int alen, - unsigned char *buffer, - int len -); - -int i2c_read( - unsigned char chip, - uint addr, - int alen, - unsigned char *buffer, - int len -); - -static int imw ( unsigned char chip, unsigned long addr, unsigned char byte ); - -static int imd( unsigned char chip, unsigned int addr, unsigned int length ); - -/** - * @brief Initializes the I2C module @a i2c. - * - * Valid @a clock_in_hz values are 100000 and 400000. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_ID Invalid @a i2c value. - * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value. - */ -rtems_status_code beagle_i2c_init( - volatile beagle_i2c *i2c, - unsigned clock_in_hz -); - -/** - * @brief Resets the I2C module @a i2c. - */ -void beagle_i2c_reset(volatile beagle_i2c *i2c); - -/** - * @brief Sets the I2C module @a i2c clock. - * - * Valid @a clock_in_hz values are 100000 and 400000. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value. - */ -rtems_status_code beagle_i2c_clock( - volatile beagle_i2c *i2c, - unsigned clock_in_hz -); - -/** - * @brief Starts a write transaction on the I2C module @a i2c. - * - * The address parameter @a addr must not contain the read/write bit. - * - * The error status may be delayed to the next - * beagle_i2c_write_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code beagle_i2c_write_start( - volatile beagle_i2c *i2c, - unsigned addr -); - -/** - * @brief Writes data via the I2C module @a i2c with optional stop. - * - * The error status may be delayed to the next - * beagle_i2c_write_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code beagle_i2c_write_with_optional_stop( - volatile beagle_i2c *i2c, - const uint8_t *out, - size_t n, - bool stop -); - -/** - * @brief Starts a read transaction on the I2C module @a i2c. - * - * The address parameter @a addr must not contain the read/write bit. - * - * The error status may be delayed to the next - * beagle_i2c_read_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code beagle_i2c_read_start( - volatile beagle_i2c *i2c, - unsigned addr -); - -/** - * @brief Reads data via the I2C module @a i2c with optional stop. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - * @retval RTEMS_NOT_IMPLEMENTED Stop is @a false. - */ -rtems_status_code beagle_i2c_read_with_optional_stop( - volatile beagle_i2c *i2c, - uint8_t *in, - size_t n, - bool stop -); - -/** - * @brief Writes and reads data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code beagle_i2c_write_and_read( - volatile beagle_i2c *i2c, - unsigned addr, - const uint8_t *out, - size_t out_size, - uint8_t *in, - size_t in_size -); - -/** - * @brief Writes data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -static inline rtems_status_code beagle_i2c_write( - volatile beagle_i2c *i2c, - unsigned addr, - const uint8_t *out, - size_t out_size -) -{ - return beagle_i2c_write_and_read(i2c, addr, out, out_size, NULL, 0); -} - -/** - * @brief Reads data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -static inline rtems_status_code beagle_i2c_read( - volatile beagle_i2c *i2c, - unsigned addr, - uint8_t *in, - size_t in_size -) -{ - return beagle_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size); -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_BEAGLE_I2C_H */ diff --git a/c/src/lib/libbsp/arm/beagle/include/irq.h b/c/src/lib/libbsp/arm/beagle/include/irq.h deleted file mode 100644 index 4cbf3a271f..0000000000 --- a/c/src/lib/libbsp/arm/beagle/include/irq.h +++ /dev/null @@ -1,23 +0,0 @@ -/** - * @file - * - * @ingroup arm_beagle - * - * @brief Basic BSP IRQ info. - */ - -#ifndef LIBBSP_ARM_BEAGLE_IRQ_H -#define LIBBSP_ARM_BEAGLE_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX 127 - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_BEAGLE_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/csb336/include/bsp.h b/c/src/lib/libbsp/arm/csb336/include/bsp.h deleted file mode 100644 index ec79476963..0000000000 --- a/c/src/lib/libbsp/arm/csb336/include/bsp.h +++ /dev/null @@ -1,71 +0,0 @@ -/** - * @file - * - * @ingroup arm_csb336 - * - * @brief Global BSP definitions. - */ - -/* - * BSP CSB336 header file - * - * Copyright (c) 2004 Cogent Computer Systems - * Written by Jay Monkman <jtm@lopingdog.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. -*/ -#ifndef LIBBSP_ARM_CSB336_BSP_H -#define LIBBSP_ARM_CSB336_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> -#include <mc9328mxl.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup arm_csb336 CSB336 Support - * - * @ingroup bsp_arm - * - * @brief CSB336 support package. - * - * @{ - */ - -#define BSP_FEATURE_IRQ_EXTENSION - -/* What is the input clock freq in hertz? */ -#define BSP_OSC_FREQ 16000000 /* 16 MHz oscillator */ -#define BSP_XTAL_FREQ 32768 /* 32.768 KHz crystal */ - -int get_perclk1_freq(void); - -/** - * @brief Network driver configuration - */ -extern struct rtems_bsdnet_ifconfig *config; - -/* Change these to match your board */ -int rtems_mc9328mxl_enet_attach(struct rtems_bsdnet_ifconfig *config, - void *chip); -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mc9328mxl_enet_attach - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ - diff --git a/c/src/lib/libbsp/arm/csb337/include/bsp.h b/c/src/lib/libbsp/arm/csb337/include/bsp.h deleted file mode 100644 index 7f9d3c60ca..0000000000 --- a/c/src/lib/libbsp/arm/csb337/include/bsp.h +++ /dev/null @@ -1,80 +0,0 @@ -/** - * @file - * - * @ingroup arm_csb337 - * - * @brief Global BSP definitions. - */ - -/* - * CSB337 BSP header file - * - * Copyright (c) 2004 by Cogent Computer Systems - * Writtent by Jay Monkman <jtm@lopingdog.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ -#ifndef LIBBSP_ARM_CSB337_BSP_H -#define LIBBSP_ARM_CSB337_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup arm_csb337 CSB337 Support - * - * @ingroup bsp_arm - * - * @brief CSB337 support package. - * - * @{ - */ - -#define BSP_FEATURE_IRQ_EXTENSION - -/* What is the input clock freq in hertz? */ -#define BSP_MAIN_FREQ 3686400 /* 3.6864 MHz */ -#define BSP_SLCK_FREQ 32768 /* 32.768 KHz */ - -/* What is the last interrupt? */ -#define BSP_MAX_INT AT91RM9200_MAX_INT - -/* - * forward reference the type to avoid conflicts between libchip serial - * and libchip rtc get and set register types. - */ -typedef struct _console_tbl console_tbl; -console_tbl *BSP_get_uart_from_minor(int minor); - -static inline int32_t BSP_get_baud(void) {return 38400;} - -#define ST_PIMR_PIV 33 /* 33 ticks of the 32.768Khz clock ~= 1msec */ - -/** - * @brief Network driver configuration - */ -extern struct rtems_bsdnet_ifconfig *config; - -/* Change these to match your board */ -int rtems_at91rm9200_emac_attach(struct rtems_bsdnet_ifconfig *config, int attaching); -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_at91rm9200_emac_attach - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ - diff --git a/c/src/lib/libbsp/arm/edb7312/include/bsp.h b/c/src/lib/libbsp/arm/edb7312/include/bsp.h deleted file mode 100644 index 47a17559da..0000000000 --- a/c/src/lib/libbsp/arm/edb7312/include/bsp.h +++ /dev/null @@ -1,75 +0,0 @@ -/** - * @file - * @ingroup arm_edb7312 - * @brief Global BSP definitions. - */ - -/* - * Cirrus EP7312 BSP header file - * - * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. -*/ -#ifndef LIBBSP_ARM_EDB7312_BSP_H -#define LIBBSP_ARM_EDB7312_BSP_H - -#ifndef ASM - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define BSP_FEATURE_IRQ_EXTENSION - -/** - * @defgroup arm_edb7312 EDB7312 Support - * @ingroup bsp_arm - * @brief EDB7312 Support Package - * @{ - */ - -/** - * @brief Define the interrupt mechanism for Time Test 27 - * - * NOTE: Following are not defined and are board independent - * - */ -struct rtems_bsdnet_ifconfig; -int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, - int attaching); - -/** - * @name Network driver configuration - * @{ - */ - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach - -/** @} */ - -/* - * Prototypes for methods called from .S but implemented in C - */ -void edb7312_interrupt_dispatch(rtems_vector_number vector); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif /* _BSP_H */ diff --git a/c/src/lib/libbsp/arm/edb7312/irq/irq.h b/c/src/lib/libbsp/arm/edb7312/irq/irq.h deleted file mode 100644 index 04579a7c6f..0000000000 --- a/c/src/lib/libbsp/arm/edb7312/irq/irq.h +++ /dev/null @@ -1,92 +0,0 @@ -/** - * @file - * @ingroup edb7312_interrupt - * @brief Interrupt definitions. - */ - -/* - * Cirrus EP7312 Intererrupt handler - * - * Copyright (c) 2010 embedded brains GmbH. - * - * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com> - * - * Copyright (c) 2002 by Charlie Steader <charlies@poliac.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. -*/ - -#ifndef __IRQ_H__ -#define __IRQ_H__ - -#ifndef __asm__ - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#endif /* __asm__ */ - -/** - * @defgroup edb7312_interrupt Interrupt Support - * @ingroup arm_edb7312 - * @brief Interrupt Support - * @{ - */ - -/** - * @name int interrupt status/mask register 1 - * @{ - */ - -#define BSP_EXTFIQ 0 -#define BSP_BLINT 1 -#define BSP_WEINT 2 -#define BSP_MCINT 3 -#define BSP_CSINT 4 -#define BSP_EINT1 5 -#define BSP_EINT2 6 -#define BSP_EINT3 7 -#define BSP_TC1OI 8 -#define BSP_TC2OI 9 -#define BSP_RTCMI 10 -#define BSP_TINT 11 -#define BSP_UTXINT1 12 -#define BSP_URXINT1 13 -#define BSP_UMSINT 14 -#define BSP_SSEOTI 15 - -/** @} */ - -/** - * @name int interrupt status/mask register 2 - * @{ - */ - -#define BSP_KBDINT 16 -#define BSP_SS2RX 17 -#define BSP_SS2TX 18 -#define BSP_UTXINT2 19 -#define BSP_URXINT2 20 - -/** @} */ - -/** - * @name int interrupt status/mask register 3 - * @{ - */ - -#define BSP_DAIINT 21 -#define BSP_MAX_INT 22 - -/** @} */ - -#define BSP_INTERRUPT_VECTOR_MIN 0 - -#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1) - -/** @} */ - -#endif /* __IRQ_H__ */ diff --git a/c/src/lib/libbsp/arm/gba/include/bsp.h b/c/src/lib/libbsp/arm/gba/include/bsp.h deleted file mode 100644 index fa7df74d5b..0000000000 --- a/c/src/lib/libbsp/arm/gba/include/bsp.h +++ /dev/null @@ -1,61 +0,0 @@ -/** - * @file - * - * @ingroup arm_gba - * - * @brief Global BSP definitions. - */ - -/* - * RTEMS GBA BSP - * - * Copyright (c) 2004 - * Markku Puro <markku.puro@kopteri.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_GBA_H -#define LIBBSP_ARM_GBA_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define BSP_FEATURE_IRQ_EXTENSION - -/** Define operation count for Tests */ -#define OPERATION_COUNT 10 - -/** gba_zero_memory library function in start.S */ -extern void gba_zero_memory(int start, int stop); -/** gba_move_memory library function in start.S */ -extern void gba_move_memory(int from, int toStart, int toEnd); -/** gba_set_memory library function in start.S */ -extern void gba_set_memory(int start, int stop, int data); - - -#ifdef __cplusplus -} -#endif - - -#endif /* __BSP_H_ */ -/** - * @defgroup arm_gba GBA Support - * - * @ingroup bsp_arm - * - * @brief GBA support package. - */ - diff --git a/c/src/lib/libbsp/arm/gba/irq/irq.h b/c/src/lib/libbsp/arm/gba/irq/irq.h deleted file mode 100644 index 37ae527912..0000000000 --- a/c/src/lib/libbsp/arm/gba/irq/irq.h +++ /dev/null @@ -1,74 +0,0 @@ -/** - * @file - * - * @ingroup gba_interrupt - * - * @brief Interrupt definitions. - */ - -/* - * RTEMS GBA BSP - * - * Copyright (c) 2010 embedded brains GmbH. - * - * Copyright (c) 2004 Markku Puro <markku.puro@kopteri.net> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef __asm__ - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#endif /* __asm__ */ - -#ifndef _IRQ_H_ -#define _IRQ_H_ - -/** - * @defgroup gba_interrupt Interrupt Support - * - * @ingroup arm_gba - * - * @brief Interrupt support. - */ - -/*---------------------------------------------------------------------------* - * MACROS * - *---------------------------------------------------------------------------*/ - -#define ENABLE_IRQ() GBA_REG_IME = 1; -#define DISABLE_IRQ() GBA_REG_IME = 0; - - -/*-------------------------------------------------------------------------+ -| Constants -+--------------------------------------------------------------------------*/ - -#define BSP_IRQ_VBLANK 0 -#define BSP_IRQ_HBLANK 1 -#define BSP_IRQ_VCOUNTER 2 -#define BSP_IRQ_TIMER0 3 -#define BSP_IRQ_TIMER1 4 -#define BSP_IRQ_TIMER2 5 -#define BSP_IRQ_TIMER3 6 -#define BSP_IRQ_SERIAL 7 -#define BSP_IRQ_DMA0 8 -#define BSP_IRQ_DMA1 9 -#define BSP_IRQ_DMA2 10 -#define BSP_IRQ_DMA3 11 -#define BSP_IRQ_KEY 12 -#define BSP_IRQ_CART 13 -#define BSP_IRQ_NA14 14 -#define BSP_IRQ_NA15 15 -#define BSP_MAX_INT 16 - -#define BSP_INTERRUPT_VECTOR_MIN 0 - -#define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1) - -#endif /* _IRQ_H_ */ diff --git a/c/src/lib/libbsp/arm/gdbarmsim/include/bsp.h b/c/src/lib/libbsp/arm/gdbarmsim/include/bsp.h deleted file mode 100644 index be69b6cd46..0000000000 --- a/c/src/lib/libbsp/arm/gdbarmsim/include/bsp.h +++ /dev/null @@ -1,85 +0,0 @@ -/** - * @file - * - * @ingroup arm_gdbarmsim - * - * @brief Global BSP definitions. - */ - -/* - * COPYRIGHT (c) 1989-2009. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_GDBARMSIM_BSP_H -#define LIBBSP_ARM_GDBARMSIM_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup arm_gdbarmsim GDBARMSIM Support - * - * @ingroup bsp_arm - * - * @brief GDBARMSIM support package. - * - * @{ - */ - -//#define BSP_GET_WORK_AREA_DEBUG 1 - -/** - * @brief Support for simulated clock tick - */ -Thread clock_driver_sim_idle_body(uintptr_t); -#define BSP_IDLE_TASK_BODY clock_driver_sim_idle_body - -/* - * Access to the GDB simulator. - */ -int gdbarmsim_system(const char *); -int gdbarmsim_rename(const char *, const char *); -int gdbarmsim__isatty(int); -clock_t gdbarmsim_times(struct tms *); -int gdbarmsim_gettimeofday(struct timeval *, void *); -int gdbarmsim_unlink(const char *); -int gdbarmsim_link(void); -int gdbarmsim_stat(const char *, struct stat *); -int gdbarmsim_fstat(int, struct stat *); -int gdbarmsim_swistat(int fd, struct stat * st); -int gdbarmsim_close(int); -clock_t gdbarmsim_clock(void); -int gdbarmsim_swiclose(int); -int gdbarmsim_open(const char *, int, ...); -int gdbarmsim_swiopen(const char *, int); -int gdbarmsim_writec(const char c); -int gdbarmsim_write(int, char *, int); -int gdbarmsim_swiwrite(int, char *, int); -int gdbarmsim_lseek(int, int, int); -int gdbarmsim_swilseek(int, int, int); -int gdbarmsim_read(int, char *, int); -int gdbarmsim_swiread(int, char *, int); -void initialise_monitor_handles(void); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ - diff --git a/c/src/lib/libbsp/arm/gdbarmsim/include/irq.h b/c/src/lib/libbsp/arm/gdbarmsim/include/irq.h deleted file mode 100644 index 3c86d22797..0000000000 --- a/c/src/lib/libbsp/arm/gdbarmsim/include/irq.h +++ /dev/null @@ -1,95 +0,0 @@ -/** - * @file - * - * @ingroup bsp_interrupt - * - * @brief Dummy interrupt definitions. - */ - -/* - * Copyright (c) 2008 - * Embedded Brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * rtems@embedded-brains.de - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_DUMMY_IRQ_H -#define LIBBSP_ARM_DUMMY_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -/** - * @addtogroup bsp_interrupt - * - * @{ - */ - -#define DUMMY_IRQ_WDT 0 -#define DUMMY_IRQ_SOFTWARE 1 -#define DUMMY_IRQ_ARM_CORE_0 2 -#define DUMMY_IRQ_ARM_CORE_1 3 -#define DUMMY_IRQ_TIMER_0 4 -#define DUMMY_IRQ_TIMER_1 5 -#define DUMMY_IRQ_UART_0 6 -#define DUMMY_IRQ_UART_1 7 -#define DUMMY_IRQ_PWM 8 -#define DUMMY_IRQ_I2C_0 9 -#define DUMMY_IRQ_SPI_SSP_0 10 -#define DUMMY_IRQ_SSP_1 11 -#define DUMMY_IRQ_PLL 12 -#define DUMMY_IRQ_RTC 13 -#define DUMMY_IRQ_EINT_0 14 -#define DUMMY_IRQ_EINT_1 15 -#define DUMMY_IRQ_EINT_2 16 -#define DUMMY_IRQ_EINT_3 17 -#define DUMMY_IRQ_ADC_0 18 -#define DUMMY_IRQ_I2C_1 19 -#define DUMMY_IRQ_BOD 20 -#define DUMMY_IRQ_ETHERNET 21 -#define DUMMY_IRQ_USB 22 -#define DUMMY_IRQ_CAN 23 -#define DUMMY_IRQ_SD_MMC 24 -#define DUMMY_IRQ_DMA 25 -#define DUMMY_IRQ_TIMER_2 26 -#define DUMMY_IRQ_TIMER_3 27 -#define DUMMY_IRQ_UART_2 28 -#define DUMMY_IRQ_UART_3 29 -#define DUMMY_IRQ_I2C_2 30 -#define DUMMY_IRQ_I2S 31 - -#define DUMMY_IRQ_PRIORITY_VALUE_MIN 0U -#define DUMMY_IRQ_PRIORITY_VALUE_MAX 15U - -/** - * @brief Minimum vector number. - */ -#define BSP_INTERRUPT_VECTOR_MIN DUMMY_IRQ_WDT - -/** - * @brief Maximum vector number. - */ -#define BSP_INTERRUPT_VECTOR_MAX DUMMY_IRQ_I2S - -void bsp_interrupt_dispatch(void); - -#if 0 -void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority); - -unsigned lpc24xx_irq_priority( rtems_vector_number vector); -#endif - -/** @} */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_DUMMY_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/gp32/include/bsp.h b/c/src/lib/libbsp/arm/gp32/include/bsp.h deleted file mode 100644 index 7c8903f6e7..0000000000 --- a/c/src/lib/libbsp/arm/gp32/include/bsp.h +++ /dev/null @@ -1,96 +0,0 @@ -/** - * @file - * @ingroup arm_gp32 - * @brief Global BSP definitons. - */ - -/* - * Copyright (c) Canon Research France SA.] - * Emmanuel Raguet, mailto:raguet@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_GP32_BSP_H -#define LIBBSP_ARM_GP32_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> -#include <s3c24xx.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define BSP_FEATURE_IRQ_EXTENSION - -#define gp32_initButtons() {rPBCON=0x0;} -#define gp32_getButtons() \ - ( (((~rPEDAT >> 6) & 0x3 )<<8) | (((~rPBDAT >> 8) & 0xFF)<<0) ) - -/** - * @defgroup arm_gp32 GP32 Support - * @ingroup bsp_arm - * @brief GP32 Support Pacakge - * @{ - */ - -/** - * @brief functions to get the differents s3c2400 clks - * @{ - */ - -uint32_t get_FCLK(void); -uint32_t get_HCLK(void); -uint32_t get_PCLK(void); -uint32_t get_UCLK(void); - -/** @} */ - -void gp32_setPalette( unsigned char pos, uint16_t color); - -/* What is the input clock freq in hertz? */ -/** @brief 12 MHz oscillator */ -#define BSP_OSC_FREQ 12000000 -/** @brief FCLK=133Mhz */ -#define M_MDIV 81 -#define M_PDIV 2 -#define M_SDIV 1 -/** @brief HCLK=FCLK/2, PCLK=FCLK/2 */ -#define M_CLKDIVN 2 -/** @brief enable refresh */ -#define REFEN 0x1 -/** @brief CBR(CAS before RAS)/auto refresh */ -#define TREFMD 0x0 -/** @brief 2 clk */ -#define Trp 0x0 -/** @brief 7 clk */ -#define Trc 0x3 -/** @brief 3 clk */ -#define Tchr 0x2 - -/** - * @brief This BSP provides its own IDLE thread to override the RTEMS one. - * - * So we prototype it and define the constant confdefs.h expects - * to configure a BSP specific one. - */ -void *bsp_idle_thread(uintptr_t ignored); - -/** @} */ - -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ - diff --git a/c/src/lib/libbsp/arm/gumstix/include/bsp.h b/c/src/lib/libbsp/arm/gumstix/include/bsp.h deleted file mode 100644 index fb21e13e92..0000000000 --- a/c/src/lib/libbsp/arm/gumstix/include/bsp.h +++ /dev/null @@ -1,86 +0,0 @@ -/** - * @file - * @ingroup arm_gumstix - * @brief Global BSP definitions. - */ - -/* - * By Yang Xi <hiyangxi@gmail.com>. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_GUMSTIX_BSP_H -#define LIBBSP_ARM_GUMSTIX_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @defgroup arm_gumstix Gumstix Support - * @ingroup bsp_arm - * @brief Gumstix support package - * @{ - */ - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_HAS_FRAME_BUFFER 1 - -/** @brief What is the input clock freq in hertz */ -#define BSP_MAIN_FREQ 3686400 /* 3.6864 MHz */ -#define BSP_SLCK_FREQ 32768 /* 32.768 KHz */ - -/** @brief What is the last interrupt */ -#define BSP_MAX_INT AT91RM9200_MAX_INT - -/* - * forward reference the type to avoid conflicts between libchip serial - * and libchip rtc get and set register types. - */ -typedef struct _console_tbl console_tbl; -console_tbl *BSP_get_uart_from_minor(int minor); - -static inline int32_t BSP_get_baud(void) {return 115200;} - -/** @brief How big should the interrupt stack be? */ -#define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) - -#define ST_PIMR_PIV 33 /* 33 ticks of the 32.768Khz clock ~= 1msec */ - -#define outport_byte(port,val) *((unsigned char volatile*)(port)) = (val) -#define inport_byte(port,val) (val) = *((unsigned char volatile*)(port)) -#define outport_word(port,val) *((unsigned short volatile*)(port)) = (val) -#define inport_word(port,val) (val) = *((unsigned short volatile*)(port)) - -struct rtems_bsdnet_ifconfig; -extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int); -#define BSP_NE2000_NETWORK_DRIVER_NAME "ne1" -#define BSP_NE2000_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach - -#ifndef RTEMS_BSP_NETWORK_DRIVER_NAME -#define RTEMS_BSP_NETWORK_DRIVER_NAME BSP_NE2000_NETWORK_DRIVER_NAME -#endif - -#ifndef RTEMS_BSP_NETWORK_DRIVER_ATTACH -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH BSP_NE2000_NETWORK_DRIVER_ATTACH -#endif - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ - diff --git a/c/src/lib/libbsp/arm/gumstix/include/tm27.h b/c/src/lib/libbsp/arm/gumstix/include/tm27.h deleted file mode 100644 index ed8d73e113..0000000000 --- a/c/src/lib/libbsp/arm/gumstix/include/tm27.h +++ /dev/null @@ -1,48 +0,0 @@ -/** - * @file - * @ingroup gumstix_tm27 - * @brief tm27 timing test support - */ - -/* - * tm27.h - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -/** - * @defgroup gumstix_tm27 tm27 Support - * @ingroup arm_gumstix - * @brief tm27 Timing Test Support - * @{ - */ - -/** - * @name Interrupt mechanisms for Time Test 27 - * @{ - */ - -#define MUST_WAIT_FOR_INTERRUPT 0 - -#define Install_tm27_vector( handler ) /* empty */ - -#define Cause_tm27_intr() /* empty */ - -#define Clear_tm27_intr() /* empty */ - -#define Lower_tm27_intr() /* empty */ - -/** @} */ - -/** @} */ - -#endif diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/bsp.h b/c/src/lib/libbsp/arm/lm3s69xx/include/bsp.h deleted file mode 100644 index 8b94f9754d..0000000000 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/bsp.h +++ /dev/null @@ -1,54 +0,0 @@ -/** - * @file - * - * @ingroup arm_lm3s69xx - * - * @brief Global BSP Definitions - */ - -/* - * Copyright (c) 2011-2012 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LM3S69XX_BSP_H -#define LIBBSP_ARM_LM3S69XX_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (5 << 5) - -#define BSP_ARMV7M_SYSTICK_PRIORITY (6 << 5) - -#define BSP_ARMV7M_SYSTICK_FREQUENCY LM3S69XX_SYSTEM_CLOCK - -#ifndef ASM - -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_LM3S69XX_BSP_H */ - -/** - * @defgroup arm_lm3s69xx LM3S69XX Support - * - * @ingroup bsp_arm - * - * @brief LM3S69XX Support Package - */ diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/io.h b/c/src/lib/libbsp/arm/lm3s69xx/include/io.h deleted file mode 100644 index f9ddf4c8ee..0000000000 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/io.h +++ /dev/null @@ -1,191 +0,0 @@ -/** - * @file - * - * @ingroup lm3s69xx_io - * - * @brief IO definitions. - */ - -/* - * Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LM3S69XX_IO_H -#define LIBBSP_ARM_LM3S69XX_IO_H -#include <bspopts.h> -#include <stdbool.h> - -/** - * @defgroup lm3s69xx_io IO Support - * - * @ingroup arm_lm3s69xx - * - * @brief IO support. - */ - -typedef enum { - LM3S69XX_GPIO_DIRECTION_INPUT, - LM3S69XX_GPIO_DIRECTION_OUTPUT -} lm3s69xx_gpio_direction; - -typedef enum { - LM3S69XX_GPIO_OTYPE_PUSH_PULL, - LM3S69XX_GPIO_OTYPE_OPEN_DRAIN -} lm3s69xx_gpio_otype; - -typedef enum { - LM3S69XX_GPIO_DRIVE_2MA, - LM3S69XX_GPIO_DRIVE_4MA, - LM3S69XX_GPIO_DRIVE_8MA -} lm3s69xx_gpio_drive; - -typedef enum { - LM3S69XX_GPIO_NO_PULL, - LM3S69XX_GPIO_PULL_UP, - LM3S69XX_GPIO_PULL_DOWN -} lm3s69xx_gpio_pull; - -typedef enum { - LM3S69XX_GPIO_DIGITAL_DISABLE, - LM3S69XX_GPIO_DIGITAL_ENABLE, -} lm3s69xx_gpio_digital; - -typedef enum { - LM3S69XX_GPIO_AF_DISABLE, - LM3S69XX_GPIO_AF_ENABLE -} lm3s69xx_gpio_af; - -typedef enum { - LM3S69XX_GPIO_ANALOG_DISABLE, - LM3S69XX_GPIO_ANALOG_ENABLE -} lm3s69xx_gpio_analog; - -typedef enum { - LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL, - LM3S69XX_GPIO_SLEW_RATE_CONTROL -} lm3s69xx_gpio_slew_rate_control; - -typedef struct { - unsigned int pin_first : 8; - unsigned int pin_last : 8; - unsigned int digital : 1; - unsigned int alternate : 1; - unsigned int analog : 1; - unsigned int dir : 1; - unsigned int otype : 1; - unsigned int drive : 2; - unsigned int pull : 2; - unsigned int slr : 1; -} lm3s69xx_gpio_config; - -typedef enum { - LM3S69XX_PORT_A, - LM3S69XX_PORT_B, - LM3S69XX_PORT_C, - LM3S69XX_PORT_D, - LM3S69XX_PORT_E, - LM3S69XX_PORT_F, - LM3S69XX_PORT_G, -#if LM3S69XX_NUM_GPIO_BLOCKS > 7 - LM3S69XX_PORT_H -#endif -} lm3s69xx_gpio_port; - -#define LM3S69XX_GPIO_PIN(port, idx) (((port) << 3) | (idx)) -#define LM3S69XX_GPIO_PORT_OF_PIN(pin) (((pin) >> 3) & 0xf) -#define LM3S69XX_GPIO_INDEX_OF_PIN(pin) ((pin) & 0x7) - -#define LM3S69XX_PIN_UART_TX(port, idx) \ - { \ - .pin_first = LM3S69XX_GPIO_PIN(port, idx), \ - .pin_last = LM3S69XX_GPIO_PIN(port, idx), \ - .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \ - .alternate = LM3S69XX_GPIO_AF_ENABLE, \ - .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \ - .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \ - .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \ - .drive = LM3S69XX_GPIO_DRIVE_2MA, \ - .pull = LM3S69XX_GPIO_NO_PULL, \ - .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \ - } - -#define LM3S69XX_PIN_UART_RX(port, idx) \ - { \ - .pin_first = LM3S69XX_GPIO_PIN(port, idx), \ - .pin_last = LM3S69XX_GPIO_PIN(port, idx), \ - .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \ - .alternate = LM3S69XX_GPIO_AF_ENABLE, \ - .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \ - .dir = LM3S69XX_GPIO_DIRECTION_INPUT, \ - .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \ - .drive = LM3S69XX_GPIO_DRIVE_2MA, \ - .pull = LM3S69XX_GPIO_PULL_UP, \ - .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \ - } - -#define LM3S69XX_PIN_UART_RTS(port, idx) \ - { \ - .pin_first = LM3S69XX_GPIO_PIN(port, idx), \ - .pin_last = LM3S69XX_GPIO_PIN(port, idx), \ - .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \ - .alternate = LM3S69XX_GPIO_AF_ENABLE, \ - .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \ - .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \ - .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \ - .drive = LM3S69XX_GPIO_DRIVE_2MA, \ - .pull = LM3S69XX_GPIO_NO_PULL, \ - .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \ - } - -#define LM3S69XX_PIN_UART_CTS(port, idx) \ - { \ - .pin_first = LM3S69XX_GPIO_PIN(port, idx), \ - .pin_last = LM3S69XX_GPIO_PIN(port, idx), \ - .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \ - .alternate = LM3S69XX_GPIO_AF_ENABLE, \ - .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \ - .dir = LM3S69XX_GPIO_DIRECTION_INPUT, \ - .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \ - .drive = LM3S69XX_GPIO_DRIVE_2MA, \ - .pull = LM3S69XX_GPIO_PULL_UP, \ - .slr = LM3S69XX_GPIO_NO_SLEW_RATE_CONTROL \ - } - -#define LM3S69XX_PIN_LED(port, idx) \ - { \ - .pin_first = LM3S69XX_GPIO_PIN(port, idx), \ - .pin_last = LM3S69XX_GPIO_PIN(port, idx), \ - .digital = LM3S69XX_GPIO_DIGITAL_ENABLE, \ - .alternate = LM3S69XX_GPIO_AF_DISABLE, \ - .analog = LM3S69XX_GPIO_ANALOG_DISABLE, \ - .dir = LM3S69XX_GPIO_DIRECTION_OUTPUT, \ - .otype = LM3S69XX_GPIO_OTYPE_PUSH_PULL, \ - .drive = LM3S69XX_GPIO_DRIVE_8MA, \ - .pull = LM3S69XX_GPIO_NO_PULL, \ - .slr = LM3S69XX_GPIO_SLEW_RATE_CONTROL \ - } - -#define LM3S69XX_PIN_SSI_TX(port, idx) LM3S69XX_PIN_UART_TX(port, idx) -#define LM3S69XX_PIN_SSI_RX(port, idx) LM3S69XX_PIN_UART_RX(port, idx) - -#ifdef __cplusplus -extern "C" { -#endif - -void lm3s69xx_gpio_set_config(const lm3s69xx_gpio_config *config); -void lm3s69xx_gpio_set_config_array(const lm3s69xx_gpio_config *configs, unsigned int count); -void lm3s69xx_gpio_digital_enable(unsigned int pin, bool enable); -void lm3s69xx_gpio_analog_mode_select(unsigned int pin, bool enable); - -void lm3s69xx_gpio_set_pin(unsigned int pin, bool set); -bool lm3s69xx_gpio_get_pin(unsigned int pin); - -#ifdef __cplusplus -} -#endif - -#endif /* LIBBSP_ARM_LM3S69XX_IO_H */ diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/irq.h b/c/src/lib/libbsp/arm/lm3s69xx/include/irq.h deleted file mode 100644 index 0b380c2ce2..0000000000 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/irq.h +++ /dev/null @@ -1,107 +0,0 @@ -/** - * @file - * - * @ingroup lm3s69xx_interrupt - * - * @brief Interrupt definitions. - */ - -/* - * Copyright © 2013 Eugeniy Meshcheryakov <eugen@debian.org> - * - * Copyright (c) 2011 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LM3S69XX_IRQ_H -#define LIBBSP_ARM_LM3S69XX_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#include <bspopts.h> - -/** - * @defgroup lm3s69xx_interrupt Interrupt Support - * - * @ingroup arm_lm3s69xx - * - * @brief Interrupt support. - */ - -#endif /* ASM */ - -#define LM3S69XX_IRQ_GPIO_PORT_A 0 -#define LM3S69XX_IRQ_GPIO_PORT_B 1 -#define LM3S69XX_IRQ_GPIO_PORT_C 2 -#define LM3S69XX_IRQ_GPIO_PORT_D 3 -#define LM3S69XX_IRQ_GPIO_PORT_E 4 -#define LM3S69XX_IRQ_UART_0 5 -#define LM3S69XX_IRQ_UART_1 6 -#define LM3S69XX_IRQ_SSI_0 7 -#define LM3S69XX_IRQ_I2C_0 8 -#define LM3S69XX_IRQ_PWM_FAULT 9 -#define LM3S69XX_IRQ_PWM_GENERATOR_0 10 -#define LM3S69XX_IRQ_PWM_GENERATOR_1 11 -#define LM3S69XX_IRQ_PWM_GENERATOR_2 12 -#define LM3S69XX_IRQ_QEI_0 13 -#define LM3S69XX_IRQ_ADC0_SEQUENCE_0 14 -#define LM3S69XX_IRQ_ADC0_SEQUENCE_1 15 -#define LM3S69XX_IRQ_ADC0_SEQUENCE_2 16 -#define LM3S69XX_IRQ_ADC0_SEQUENCE_3 17 -#define LM3S69XX_IRQ_WATCHDOG_TIMER_0 18 -#define LM3S69XX_IRQ_TIMER_0_A 19 -#define LM3S69XX_IRQ_TIMER_0_B 20 -#define LM3S69XX_IRQ_TIMER_1_A 21 -#define LM3S69XX_IRQ_TIMER_1_B 22 -#define LM3S69XX_IRQ_TIMER_2_A 23 -#define LM3S69XX_IRQ_TIMER_2_B 24 -#define LM3S69XX_IRQ_ANALOG_COMPARATOR_0 25 -#define LM3S69XX_IRQ_ANALOG_COMPARATOR_1 26 -#define LM3S69XX_IRQ_SYSTEM_CONTROL 28 -#define LM3S69XX_IRQ_FLASH_MEMORY_CONTROL 29 -#define LM3S69XX_IRQ_GPIO_PORT_F 30 -#define LM3S69XX_IRQ_GPIO_PORT_G 31 -/* NOTE: lm3s3749 */ -#define LM3S69XX_IRQ_GPIO_PORT_H 32 -#define LM3S69XX_IRQ_UART_2 33 -/* NOTE: lm3s3749 */ -#define LM3S69XX_IRQ_SSI_1 34 -#define LM3S69XX_IRQ_TIMER_3_A 35 -#define LM3S69XX_IRQ_TIMER_3_B 36 -#define LM3S69XX_IRQ_I2C_1 37 - -/* NOTE: lm3s6965 */ -#define LM3S69XX_IRQ_QEI_1 38 -#define LM3S69XX_IRQ_ETHERNET_CONTROLLER 42 - -#define LM3S69XX_IRQ_HIBERNATION_MODULE 43 - -/* NOTE: lm3s3749 */ -#define LM3S69XX_IRQ_USB 44 -#define LM3S69XX_IRQ_PWM_GENERATOR_3 45 -#define LM3S69XX_IRQ_UDMA_SOFTWARE 46 -#define LM3S69XX_IRQ_UDMA_ERROR 47 - -#define LM3S69XX_IRQ_PRIORITY_VALUE_MIN 0 -#define LM3S69XX_IRQ_PRIORITY_VALUE_MAX 7 -#define LM3S69XX_IRQ_PRIORITY_COUNT (LM3S69XX_IRQ_PRIORITY_VALUE_MAX + 1) -#define LM3S69XX_IRQ_PRIORITY_HIGHEST LM3S69XX_IRQ_PRIORITY_VALUE_MIN -#define LM3S69XX_IRQ_PRIORITY_LOWEST LM3S69XX_IRQ_PRIORITY_VALUE_MAX - -#define BSP_INTERRUPT_VECTOR_MIN 0 -/* NOTE: for lm3s6965 - 43 */ -#define BSP_INTERRUPT_VECTOR_MAX 47 - -#endif /* LIBBSP_ARM_LM3S69XX_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/uart.h b/c/src/lib/libbsp/arm/lm3s69xx/include/uart.h deleted file mode 100644 index 544fed55eb..0000000000 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/uart.h +++ /dev/null @@ -1,46 +0,0 @@ -/** - * @file - * - * @ingroup lm3s69xx_uart - * - * brief UART support. - */ - -/* - * Copyright (c) 2011 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LM3S69XX_UART_H -#define LIBBSP_ARM_LM3S69XX_UART_H - -#include <libchip/serial.h> - -/** - * defgroup lm3s69xx_uart UART Support - * - * @ingroup arm_lm3s69xx - * - * @brief UART support. - */ - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -extern const console_fns lm3s69xx_uart_fns; - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LM3S69XX_UART_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/bsp.h b/c/src/lib/libbsp/arm/lpc176x/include/bsp.h deleted file mode 100644 index 6fb7c7cc57..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/bsp.h +++ /dev/null @@ -1,100 +0,0 @@ -/** - * @file - * - * @ingroup lpc176x - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_BSP_H -#define LIBBSP_ARM_LPC176X_BSP_H - -#include <bspopts.h> - -#define LPC176X_PCLK ( LPC176X_CCLK / LPC176X_PCLKDIV ) -#define LPC176X_MPU_REGION_COUNT 8u - -#define BSP_FEATURE_IRQ_EXTENSION -#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT ( 29u << 3u ) -#define BSP_ARMV7M_SYSTICK_PRIORITY ( 30u << 3u ) -#define BSP_ARMV7M_SYSTICK_FREQUENCY LPC176X_CCLK - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> -#include <bsp/default-initial-extension.h> - -/** Define operation count for Tests */ -#define OPERATION_COUNT 4 - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -struct rtems_bsdnet_ifconfig; - -/** - * @defgroup lpc176x LPC176X Support - * - * @ingroup bsp_arm - * - * @brief LPC176X support package. - * - * @{ - */ - -/** - * @brief Optimized idle task. - * - * This idle task sets the power mode to idle. This causes the processor - * clock to be stopped, while on-chip peripherals remain active. - * Any enabled interrupt from a peripheral or an external interrupt source - * will cause the processor to resume execution. - * - * To enable the idle task use the following in the system configuration: - * - * @code - * #include <bsp.h> - * - * #define CONFIGURE_INIT - * - * #define CONFIGURE_IDLE_TASK_BODY bsp_idle_thread - * - * #include <confdefs.h> - * @endcode - */ -void*bsp_idle_thread( uintptr_t ignored ); - -#define BSP_CONSOLE_UART_BASE 0x4000C000U - -/** - * @brief Restarts the bsp with "addr" address - * @param addr Address used to restart the bsp - */ -void bsp_restart( const void *addr ); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_LPC176X_BSP_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/dma.h b/c/src/lib/libbsp/arm/lpc176x/include/dma.h deleted file mode 100644 index 65edfc4e30..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/dma.h +++ /dev/null @@ -1,98 +0,0 @@ -/** - * @file - * - * @ingroup lpc176x_dma - * - * @brief Direct memory access (DMA) support. - */ - -/* - * Copyright (c) 2008, 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_DMA_H -#define LIBBSP_ARM_LPC176X_DMA_H - -#include <rtems.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc176x_dma DMA Support - * - * @ingroup lpc176x - * - * @brief Direct memory access (DMA) support. - * - * @{ - */ - -/** - * @brief Initializes the general purpose DMA. - */ -void lpc176x_dma_initialize( void ); - -/** - * @brief Tries to obtain the DMA channel @a channel. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_ID Invalid channel number. - * @retval RTEMS_RESOURCE_IN_USE Channel already occupied. - */ -rtems_status_code lpc176x_dma_channel_obtain( unsigned channel ); - -/** - * @brief Releases the DMA channel @a channel. - * - * You must have obtained this channel with lpc176x_dma_channel_obtain() - * previously. - * - * If the channel number @a channel is out of range nothing will happen. - */ -void lpc176x_dma_channel_release( unsigned channel ); - -/** - * @brief Disables the DMA channel @a channel. - * - * If @a force is @c false the channel will be halted and disabled when the - * channel is inactive otherwise it will be disabled immediately. - * - * If the channel number @a channel is out of range nothing will happen. - */ -void lpc176x_dma_channel_disable( - unsigned channel, - bool force -); - -rtems_status_code lpc176x_dma_copy_initialize( void ); - -rtems_status_code lpc176x_dma_copy_release( void ); - -rtems_status_code lpc176x_dma_copy( - unsigned channel, - const void *dest, - const void *src, - size_t n, - size_t width -); - -rtems_status_code lpc176x_dma_copy_wait( unsigned channel ); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC176X_DMA_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/io.h b/c/src/lib/libbsp/arm/lpc176x/include/io.h deleted file mode 100644 index 4a8510479c..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/io.h +++ /dev/null @@ -1,88 +0,0 @@ -/** - * @file io.h - * - * @ingroup lpc176x - * - * @brief Input/output module methods definitions. - */ - -/* - * Copyright (c) 2014 Taller Technologies. - * - * @author Boretto Martin (martin.boretto@tallertechnologies.com) - * @author Diaz Marcos (marcos.diaz@tallertechnologies.com) - * @author Lenarduzzi Federico (federico.lenarduzzi@tallertechnologies.com) - * @author Daniel Chicco (daniel.chicco@tallertechnologies.com) - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_IO_H -#define LIBBSP_ARM_LPC176X_IO_H - -#include <assert.h> -#include <rtems.h> -#include <bsp/io-defs.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @brief Sets pin to the selected function. - * - * @param pin The pin to set. - * @param function Defines the function to set. - */ -void lpc176x_pin_select( - uint32_t pin, - lpc176x_pin_function function -); - -/** - * @brief Sets pin to the selected mode. - * - * @param pin The pin to set. - * @param mode Defines the mode to set. - */ -void lpc176x_pin_set_mode( - const uint32_t pin, - const lpc176x_pin_mode mode -); - -/** - * @brief Enables the module power and clock. - * - * @param module Represents the module to be enabled. - * @param clock Represents the clock to set for this module. - * @return RTEMS_SUCCESFULL if the module was enabled succesfully. - */ -rtems_status_code lpc176x_module_enable( - lpc176x_module module, - lpc176x_module_clock clock -); - -/** - * @brief Checks if the current module is turned off and disables a module. - * - * @param module Represents the module to be disabled. - * @return RTEMS_SUCCESFULL if the module was disabled succesfully. - */ -rtems_status_code lpc176x_module_disable( lpc176x_module module ); - -/** - * @brief Checks if the current module is enabled or not. - * - * @param module Represents the module to be checked. - * @return TRUE if the module is enabled. - * FALSE otherwise. - */ -bool lpc176x_module_is_enabled( lpc176x_module module ); - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC176X_IO_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/irq.h b/c/src/lib/libbsp/arm/lpc176x/include/irq.h deleted file mode 100644 index 719608c8f7..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/irq.h +++ /dev/null @@ -1,108 +0,0 @@ -/** - * @file - * - * @ingroup bsp_interrupt - * - * @brief LPC176X interrupt definitions. - */ - -/* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_IRQ_H -#define LIBBSP_ARM_LPC176X_IRQ_H - -#ifndef ASM -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#endif - -/** - * @addtogroup bsp_interrupt - * - * @{ - */ - -#define BSP_INTERRUPT_VECTOR_MIN 0U - -#define LPC176X_IRQ_WDT 0U -#define LPC176X_IRQ_TIMER_0 1U -#define LPC176X_IRQ_TIMER_1 2U -#define LPC176X_IRQ_TIMER_2 3U -#define LPC176X_IRQ_TIMER_3 4U -#define LPC176X_IRQ_UART_0 5U -#define LPC176X_IRQ_UART_1 6U -#define LPC176X_IRQ_UART_2 7U -#define LPC176X_IRQ_UART_3 8U -#define LPC176X_IRQ_PWM_1 9U -#define LPC176X_IRQ_PLL 16U -#define LPC176X_IRQ_RTC 17U -#define LPC176X_IRQ_EINT_0 18U -#define LPC176X_IRQ_EINT_1 19U -#define LPC176X_IRQ_EINT_2 20U -#define LPC176X_IRQ_EINT_3 21U -#define LPC176X_IRQ_ADC_0 22U -#define LPC176X_IRQ_BOD 23U -#define LPC176X_IRQ_USB 24U -#define LPC176X_IRQ_CAN 25U -#define LPC176X_IRQ_DMA 26U -#define LPC176X_IRQ_I2S 27U -#define LPC176X_IRQ_SD_MMC 29U -#define LPC176X_IRQ_MCPWM 30U -#define LPC176X_IRQ_QEI 31U -#define LPC176X_IRQ_PLL_ALT 32U -#define LPC176X_IRQ_USB_ACTIVITY 33U -#define LPC176X_IRQ_CAN_ACTIVITY 34U -#define LPC176X_IRQ_UART_4 35U -#define LPC176X_IRQ_GPIO 38U -#define LPC176X_IRQ_PWM 39U -#define LPC176X_IRQ_EEPROM 40U - -#define BSP_INTERRUPT_VECTOR_MAX 40 - -#define LPC176X_IRQ_PRIORITY_VALUE_MIN 0U - -#define LPC176X_IRQ_PRIORITY_VALUE_MAX 31U - -#define LPC176X_IRQ_PRIORITY_COUNT ( LPC176X_IRQ_PRIORITY_VALUE_MAX + 1U ) -#define LPC176X_IRQ_PRIORITY_HIGHEST LPC176X_IRQ_PRIORITY_VALUE_MIN -#define LPC176X_IRQ_PRIORITY_LOWEST LPC176X_IRQ_PRIORITY_VALUE_MAX - -#ifndef ASM - -/** - * @brief Sets the priority according to the current interruption. - * - * @param vector Interrupt to be attended. - * @param priority Interrupts priority. - */ -void lpc176x_irq_set_priority( - rtems_vector_number vector, - unsigned priority -); - -/** - * @brief Gets the priority number according to the current interruption. - * - * @param vector Interrupts to be attended. - * @return The priority number according to the current interruption. - */ -unsigned lpc176x_irq_get_priority( rtems_vector_number vector ); - -#endif /* ASM */ - -/** @} */ - -#endif /* LIBBSP_ARM_LPC176X_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/lpc-clock-config.h b/c/src/lib/libbsp/arm/lpc176x/include/lpc-clock-config.h deleted file mode 100644 index 3eef02152e..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/lpc-clock-config.h +++ /dev/null @@ -1,45 +0,0 @@ -/** - * @file - * - * @ingroup lpc176x - * - * @brief Clock driver configuration. - */ - -/* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H -#define LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H - -#include <bsp.h> -#include <bsp/irq.h> -#include <bsp/lpc176x.h> -#include <bsp/io.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define LPC_CLOCK_INTERRUPT LPC176X_IRQ_TIMER_0 -#define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR -#define LPC_CLOCK_TIMECOUNTER_BASE TMR1_BASE_ADDR -#define LPC_CLOCK_REFERENCE LPC176X_PCLK -#define LPC_CLOCK_MODULE_ENABLE() \ - lpc176x_module_enable( LPC176X_MODULE_TIMER_0, LPC176X_MODULE_PCLK_DEFAULT ) - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC176X_LPC_CLOCK_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/system-clocks.h b/c/src/lib/libbsp/arm/lpc176x/include/system-clocks.h deleted file mode 100644 index 26087ff3e9..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/system-clocks.h +++ /dev/null @@ -1,91 +0,0 @@ -/** - * @file - * - * @ingroup lpc176x_clocks - * - * @brief System clocks. - */ - -/* - * Copyright (c) 2008, 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_SYSTEM_CLOCKS_H -#define LIBBSP_ARM_LPC176X_SYSTEM_CLOCKS_H - -#include <bsp/lpc176x.h> -#include <bsp/timer-defs.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc176x_clock System Clocks - * - * @ingroup lpc176x - * - * @brief System clocks. - * - * @{ - */ - -/** - * @brief Initializes the standard timer. - * - * This function uses Timer 1. - */ -void lpc176x_timer_initialize( void ); - -/** - * @brief Returns current standard timer value in CPU clocks. - * - * @return This function uses Timer 1. - */ -static inline unsigned lpc176x_get_timer1( void ) -{ - return LPC176X_T1TC; -} - -/** - * @brief Delay for @a us micro seconds. - * - * This function uses the standard timer and assumes that the CPU - * frequency is in whole MHz numbers. The delay value @a us will be - * converted to CPU ticks and there is no protection against integer - * overflows. - * - * This function uses Timer 1. - */ -void lpc176x_micro_seconds_delay( unsigned us ); - -/** - * @brief Returns the PLL output clock frequency in [Hz]. - * - * @return Returns zero in case of an unexpected PLL input frequency. - */ -unsigned lpc176x_pllclk( void ); - -/** - * @brief Returns the CPU clock frequency in [Hz]. - * - * @return Returns zero in case of an unexpected PLL input frequency. - */ -unsigned lpc176x_cclk( void ); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC176X_SYSTEM_CLOCKS_H */ diff --git a/c/src/lib/libbsp/arm/lpc176x/include/watchdog.h b/c/src/lib/libbsp/arm/lpc176x/include/watchdog.h deleted file mode 100644 index 8b5f033605..0000000000 --- a/c/src/lib/libbsp/arm/lpc176x/include/watchdog.h +++ /dev/null @@ -1,70 +0,0 @@ -/** - * @file watchdog.h - * - * @ingroup lpc176x - * - * @brief API of the Watchdog driver for the lpc176x bsp in RTEMS. - */ - -/* - * Copyright (c) 2014 Taller Technologies. - * - * @author Boretto Martin (martin.boretto@tallertechnologies.com) - * @author Diaz Marcos (marcos.diaz@tallertechnologies.com) - * @author Lenarduzzi Federico (federico.lenarduzzi@tallertechnologies.com) - * @author Daniel Chicco (daniel.chicco@tallertechnologies.com) - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC176X_WATCHDOG_H -#define LIBBSP_ARM_LPC176X_WATCHDOG_H - -#include <bsp/watchdog-defs.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @brief Checks if the watchdog was executed by software or not. Set when - * the watchdog timer times out, cleared by software. - * - * @return TRUE if the watchdog was executed. - * FALSE otherwise. - */ -bool lpc176x_been_reset_by_watchdog( void ); - -/** - * @brief Resets the watchdog timer. - */ -void lpc176x_watchdog_reset( void ); - -/** - * @brief Configures the watchdog's timer. - * - * @param tcount Timer's out value. - * @return RTEMS_SUCCESSFUL if the watchdog was configured successfully. - */ -rtems_status_code lpc176x_watchdog_config( lpc176x_microseconds tcount ); - -/** - * @brief Configures the timer watchdog using interrupt. - * - * @param tcount Timer's out value. - * @param interrupt Interrupt to register. - * @return RTEMS_SUCCESSFUL if the watchdog was configured successfully - * with interrupts. - */ -rtems_status_code lpc176x_watchdog_config_with_interrupt( - lpc176x_wd_isr_funct interrupt, - lpc176x_microseconds tcount -); - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC176X_WATCHDOG_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h deleted file mode 100644 index e8c5d9ac12..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/bsp.h +++ /dev/null @@ -1,130 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2008-2014 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_BSP_H -#define LIBBSP_ARM_LPC24XX_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#define LPC24XX_PCLK (LPC24XX_CCLK / LPC24XX_PCLKDIV) - -#define LPC24XX_EMCCLK (LPC24XX_CCLK / LPC24XX_EMCCLKDIV) - -#define LPC24XX_MPU_REGION_COUNT 8 - -#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (29 << 3) - -#define BSP_ARMV7M_SYSTICK_PRIORITY (30 << 3) - -#define BSP_ARMV7M_SYSTICK_FREQUENCY LPC24XX_CCLK - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -struct rtems_bsdnet_ifconfig; - -struct rtems_termios_device_context; - -/** - * @defgroup lpc24xx LPC24XX Support - * - * @ingroup bsp_arm - * - * @brief LPC24XX support package. - * - * @{ - */ - -/** - * @brief Network driver attach and detach function. - */ -int lpc_eth_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); - -/** - * @brief Standard network driver attach and detach function. - */ -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach - -/** - * @brief Standard network driver name. - */ -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" - -/** - * @brief Optimized idle task. - * - * This idle task sets the power mode to idle. This causes the processor clock - * to be stopped, while on-chip peripherals remain active. Any enabled - * interrupt from a peripheral or an external interrupt source will cause the - * processor to resume execution. - * - * To enable the idle task use the following in the system configuration: - * - * @code - * #include <bsp.h> - * - * #define CONFIGURE_INIT - * - * #define CONFIGURE_IDLE_TASK_BODY bsp_idle_thread - * - * #include <confdefs.h> - * @endcode - */ -void *bsp_idle_thread(uintptr_t ignored); - -#ifdef ARM_MULTILIB_ARCH_V4 - #define BSP_CONSOLE_UART_BASE 0xe000c000 -#else - #define BSP_CONSOLE_UART_BASE 0x4000c000 -#endif - -void bsp_restart(void *addr); - -bool lpc24xx_uart_probe_1(struct rtems_termios_device_context *context); - -bool lpc24xx_uart_probe_2(struct rtems_termios_device_context *context); - -bool lpc24xx_uart_probe_3(struct rtems_termios_device_context *context); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_LPC24XX_BSP_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/dma.h b/c/src/lib/libbsp/arm/lpc24xx/include/dma.h deleted file mode 100644 index b2e6c3e665..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/dma.h +++ /dev/null @@ -1,95 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx_dma - * - * @brief Direct memory access (DMA) support. - */ - -/* - * Copyright (c) 2008, 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_DMA_H -#define LIBBSP_ARM_LPC24XX_DMA_H - -#include <rtems.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc24xx_dma DMA Support - * - * @ingroup lpc24xx - * - * @brief Direct memory access (DMA) support. - * - * @{ - */ - -/** - * @brief Initializes the general purpose DMA. - */ -void lpc24xx_dma_initialize(void); - -/** - * @brief Tries to obtain the DMA channel @a channel. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_ID Invalid channel number. - * @retval RTEMS_RESOURCE_IN_USE Channel already occupied. - */ -rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel); - -/** - * @brief Releases the DMA channel @a channel. - * - * You must have obtained this channel with lpc24xx_dma_channel_obtain() - * previously. - * - * If the channel number @a channel is out of range nothing will happen. - */ -void lpc24xx_dma_channel_release(unsigned channel); - -/** - * @brief Disables the DMA channel @a channel. - * - * If @a force is @c false the channel will be halted and disabled when the - * channel is inactive otherwise it will be disabled immediately. - * - * If the channel number @a channel is out of range nothing will happen. - */ -void lpc24xx_dma_channel_disable(unsigned channel, bool force); - -rtems_status_code lpc24xx_dma_copy_initialize(void); - -rtems_status_code lpc24xx_dma_copy_release(void); - -rtems_status_code lpc24xx_dma_copy( - unsigned channel, - void *dest, - const void *src, - size_t n, - size_t width -); - -rtems_status_code lpc24xx_dma_copy_wait(unsigned channel); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_DMA_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h b/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h deleted file mode 100644 index 42836ddfa8..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/i2c.h +++ /dev/null @@ -1,71 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx_libi2c - * - * @brief LibI2C bus driver for the I2C modules. - */ - -/* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_I2C_H -#define LIBBSP_ARM_LPC24XX_I2C_H - -#include <rtems.h> -#include <rtems/libi2c.h> - -#include <bsp/io.h> -#include <bsp/lpc24xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc24xx_libi2c LPC24XX Bus Drivers - * - * @ingroup libi2c - * - * @brief LibI2C bus drivers for LPC24XX. - * - * @{ - */ - -typedef struct { - rtems_libi2c_bus_t bus; - volatile lpc24xx_i2c *regs; - size_t index; - const lpc24xx_pin_range *pins; - rtems_vector_number vector; - rtems_id state_update; - uint8_t *volatile data; - uint8_t *volatile end; -} lpc24xx_i2c_bus_entry; - -extern const rtems_libi2c_bus_ops_t lpc24xx_i2c_ops; - -extern rtems_libi2c_bus_t *const lpc24xx_i2c_0; - -extern rtems_libi2c_bus_t *const lpc24xx_i2c_1; - -extern rtems_libi2c_bus_t *const lpc24xx_i2c_2; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_I2C_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/io.h b/c/src/lib/libbsp/arm/lpc24xx/include/io.h deleted file mode 100644 index 9f58ee8efb..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/io.h +++ /dev/null @@ -1,1154 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx_io - * - * @brief Input and output module. - */ - -/* - * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_IO_H -#define LIBBSP_ARM_LPC24XX_IO_H - -#include <rtems.h> - -#include <bsp/lpc24xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc24xx_io IO Support and Configuration - * - * @ingroup lpc24xx - * - * @brief Input and output module. - * - * @{ - */ - -#define LPC24XX_IO_PORT_COUNT 5U - -#define LPC24XX_IO_INDEX_MAX (LPC24XX_IO_PORT_COUNT * 32U) - -#define LPC24XX_IO_INDEX_BY_PORT(port, bit) (((port) << 5U) + (bit)) - -#define LPC24XX_IO_PORT(index) ((index) >> 5U) - -#define LPC24XX_IO_PORT_BIT(index) ((index) & 0x1fU) - -typedef enum { - #ifdef ARM_MULTILIB_ARCH_V4 - LPC24XX_MODULE_ACF, - #endif - LPC24XX_MODULE_ADC, - #ifdef ARM_MULTILIB_ARCH_V4 - LPC24XX_MODULE_BAT_RAM, - #endif - LPC24XX_MODULE_CAN_0, - LPC24XX_MODULE_CAN_1, - LPC24XX_MODULE_DAC, - LPC24XX_MODULE_EMC, - LPC24XX_MODULE_ETHERNET, - LPC24XX_MODULE_GPDMA, - LPC24XX_MODULE_GPIO, - LPC24XX_MODULE_I2C_0, - LPC24XX_MODULE_I2C_1, - LPC24XX_MODULE_I2C_2, - LPC24XX_MODULE_I2S, - LPC24XX_MODULE_LCD, - LPC24XX_MODULE_MCI, - #ifdef ARM_MULTILIB_ARCH_V7M - LPC24XX_MODULE_MCPWM, - #endif - LPC24XX_MODULE_PCB, - LPC24XX_MODULE_PWM_0, - LPC24XX_MODULE_PWM_1, - #ifdef ARM_MULTILIB_ARCH_V7M - LPC24XX_MODULE_QEI, - #endif - LPC24XX_MODULE_RTC, - #ifdef ARM_MULTILIB_ARCH_V4 - LPC24XX_MODULE_SPI, - #endif - LPC24XX_MODULE_SSP_0, - LPC24XX_MODULE_SSP_1, - #ifdef ARM_MULTILIB_ARCH_V7M - LPC24XX_MODULE_SSP_2, - #endif - LPC24XX_MODULE_SYSCON, - LPC24XX_MODULE_TIMER_0, - LPC24XX_MODULE_TIMER_1, - LPC24XX_MODULE_TIMER_2, - LPC24XX_MODULE_TIMER_3, - LPC24XX_MODULE_UART_0, - LPC24XX_MODULE_UART_1, - LPC24XX_MODULE_UART_2, - LPC24XX_MODULE_UART_3, - #ifdef ARM_MULTILIB_ARCH_V7M - LPC24XX_MODULE_UART_4, - #endif - #ifdef ARM_MULTILIB_ARCH_V4 - LPC24XX_MODULE_WDT, - #endif - LPC24XX_MODULE_USB -} lpc24xx_module; - -#define LPC24XX_MODULE_COUNT (LPC24XX_MODULE_USB + 1) - -typedef enum { - LPC24XX_MODULE_PCLK_DEFAULT = 0x4U, - LPC24XX_MODULE_CCLK = 0x1U, - LPC24XX_MODULE_CCLK_2 = 0x2U, - LPC24XX_MODULE_CCLK_4 = 0x0U, - LPC24XX_MODULE_CCLK_6 = 0x3U, - LPC24XX_MODULE_CCLK_8 = 0x3U -} lpc24xx_module_clock; - -#define LPC24XX_MODULE_CLOCK_MASK 0x3U - -typedef enum { - LPC24XX_GPIO_DEFAULT = 0x0U, - LPC24XX_GPIO_RESISTOR_PULL_UP = 0x0U, - LPC24XX_GPIO_RESISTOR_NONE = 0x1U, - LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x2U, - LPC24XX_GPIO_INPUT = 0x0U, - #ifdef ARM_MULTILIB_ARCH_V7M - LPC17XX_GPIO_REPEATER = 0x3U, - LPC17XX_GPIO_HYSTERESIS = IOCON_HYS, - LPC17XX_GPIO_INPUT_INVERT = IOCON_INV, - LPC17XX_GPIO_FAST_MODE = IOCON_SLEW, - LPC17XX_GPIO_OPEN_DRAIN = IOCON_OD, - LPC17XX_GPIO_INPUT_FILTER = IOCON_FILTER, - #endif - LPC24XX_GPIO_OUTPUT = 0x8000U -} lpc24xx_gpio_settings; - -rtems_status_code lpc24xx_module_enable( - lpc24xx_module module, - lpc24xx_module_clock clock -); - -rtems_status_code lpc24xx_module_disable( - lpc24xx_module module -); - -bool lpc24xx_module_is_enabled(lpc24xx_module module); - -rtems_status_code lpc24xx_gpio_config( - unsigned index, - lpc24xx_gpio_settings settings -); - -static inline void lpc24xx_gpio_set(unsigned index) -{ - if (index <= LPC24XX_IO_INDEX_MAX) { - unsigned port = LPC24XX_IO_PORT(index); - unsigned bit = LPC24XX_IO_PORT_BIT(index); - - LPC24XX_FIO [port].set = 1U << bit; - } -} - -static inline void lpc24xx_gpio_clear(unsigned index) -{ - if (index <= LPC24XX_IO_INDEX_MAX) { - unsigned port = LPC24XX_IO_PORT(index); - unsigned bit = LPC24XX_IO_PORT_BIT(index); - - LPC24XX_FIO [port].clr = 1U << bit; - } -} - -static inline void lpc24xx_gpio_write(unsigned index, bool value) -{ - if (value) { - lpc24xx_gpio_set(index); - } else { - lpc24xx_gpio_clear(index); - } -} - -static inline bool lpc24xx_gpio_get(unsigned index) -{ - if (index <= LPC24XX_IO_INDEX_MAX) { - unsigned port = LPC24XX_IO_PORT(index); - unsigned bit = LPC24XX_IO_PORT_BIT(index); - - return (LPC24XX_FIO [port].pin & (1U << bit)) != 0; - } else { - return false; - } -} - -typedef enum { - /** - * @brief Sets the pin function. - */ - LPC24XX_PIN_SET_FUNCTION, - - /** - * @brief Checks if all pins are configured with the specified function. - */ - LPC24XX_PIN_CHECK_FUNCTION, - - /** - * @brief Configures the pins as input. - */ - LPC24XX_PIN_SET_INPUT, - - /** - * @brief Checks if all pins are configured as input. - */ - LPC24XX_PIN_CHECK_INPUT -} lpc24xx_pin_action; - -typedef union { - struct { - uint16_t port : 3; - uint16_t port_bit : 5; - uint16_t function : 3; - uint16_t type : 4; - uint16_t range : 1; - } fields; - uint16_t value; -} lpc24xx_pin_range; - -typedef enum { - LPC24XX_PIN_FUNCTION_00, - LPC24XX_PIN_FUNCTION_01, - LPC24XX_PIN_FUNCTION_10, - LPC24XX_PIN_FUNCTION_11 -} lpc24xx_pin_function; - -typedef enum { - LPC17XX_PIN_TYPE_DEFAULT, - LPC17XX_PIN_TYPE_ADC, - LPC17XX_PIN_TYPE_DAC, - LPC17XX_PIN_TYPE_I2C, - LPC17XX_PIN_TYPE_I2C_FAST_PLUS, - LPC17XX_PIN_TYPE_OPEN_DRAIN -} lpc17xx_pin_type; - -#ifdef ARM_MULTILIB_ARCH_V4 - #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f0, 0, 0 } } - #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f0, t, 0 } } - #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \ - { { p, i, f0, 0, 0 } }, { { p, j, f0, 0, 1 } } -#else - #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f1, 0, 0 } } - #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f1, t, 0 } } - #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \ - { { p, i, f1, 0, 0 } }, { { p, j, f1, 0, 1 } } -#endif - -#define LPC24XX_PIN_TERMINAL { { 0x7, 0x1f, 0x7, 0xf, 0x1 } } - -/** - * @brief Performs the @a action with the @a pins - * - * @code - * #include <assert.h> - * #include <bsp/io.h> - * - * void example(void) - * { - * static const lpc24xx_pin_range pins [] = { - * LPC24XX_PIN_I2S_RX_CLK_P0_4, - * LPC24XX_PIN_I2S_RX_WS_P0_5, - * LPC24XX_PIN_I2S_RX_SDA_P0_6, - * LPC24XX_PIN_I2S_TX_CLK_P0_7, - * LPC24XX_PIN_I2S_TX_WS_P0_8, - * LPC24XX_PIN_I2S_TX_SDA_P0_9, - * LPC24XX_PIN_TERMINAL - * }; - * rtems_status_code sc = RTEMS_SUCCESSFUL; - * - * sc = lpc24xx_module_enable(LPC24XX_MODULE_I2S, LPC24XX_MODULE_CCLK_8); - * assert(sc == RTEMS_SUCCESSFUL); - * sc = lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); - * assert(sc == RTEMS_SUCCESSFUL); - * } - * @endcode - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Check failed. - * @retval RTEMS_NOT_DEFINED Invalid action. - */ -rtems_status_code lpc24xx_pin_config( - const lpc24xx_pin_range *pins, - lpc24xx_pin_action action -); - -/** - * @brief Returns the first pin index of a pin range. - */ -static inline unsigned lpc24xx_pin_get_first_index( - const lpc24xx_pin_range *range -) -{ - return LPC24XX_IO_INDEX_BY_PORT(range->fields.port, range->fields.port_bit); -} - -/** - * @name ADC Pins - * - * @{ - */ - -#define LPC24XX_PIN_ADC_CHANNEL_0 \ - LPC24XX_PIN_WITH_TYPE(0, 23, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_1 \ - LPC24XX_PIN_WITH_TYPE(0, 24, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_2 \ - LPC24XX_PIN_WITH_TYPE(0, 25, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_3 \ - LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_4 \ - LPC24XX_PIN_WITH_TYPE(1, 30, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_5 \ - LPC24XX_PIN_WITH_TYPE(1, 31, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_6 \ - LPC24XX_PIN_WITH_TYPE(0, 12, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC) -#define LPC24XX_PIN_ADC_CHANNEL_7 \ - LPC24XX_PIN_WITH_TYPE(0, 13, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC) - -/** @} */ - -/** - * @name CAN 0 Pins - * - * @{ - */ - -#define LPC24XX_PIN_CAN_0_RD_P0_0 \ - LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_CAN_0_RD_P0_21 \ - LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_11, 4) - -#define LPC24XX_PIN_CAN_0_TD_P0_1 \ - LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_CAN_0_TD_P0_22 \ - LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_11, 4) - -/** @} */ - -/** - * @name CAN 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_CAN_1_RD_P0_4 \ - LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_CAN_1_RD_P2_7 \ - LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_CAN_1_TD_P0_5 \ - LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_CAN_1_TD_P2_8 \ - LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name DAC Pins - * - * @{ - */ - -#define LPC24XX_PIN_DAC \ - LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_DAC) - -/** @} */ - -/** - * @name Ethernet Pins - * - * @{ - */ - -#define LPC24XX_PIN_ETHERNET_MII \ - LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_ETHERNET_RMII_0 \ - LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_ETHERNET_RMII_1 \ - LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_ETHERNET_RMII_2 \ - LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_ETHERNET_RMII_3 \ - LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name External Interrupt Pins - * - * @{ - */ - -#define LPC24XX_PIN_EINT_0 \ - LPC24XX_PIN(2, 10, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EINT_1 \ - LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EINT_2 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EINT_3 \ - LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name External Memory Controller (EMC) Pins - * - * @{ - */ - -#define LPC24XX_PIN_EMC_CS_0 \ - LPC24XX_PIN(4, 30, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CS_1 \ - LPC24XX_PIN(4, 31, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CS_2 \ - LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CS_3 \ - LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_DYCS_0 \ - LPC24XX_PIN(2, 20, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DYCS_1 \ - LPC24XX_PIN(2, 21, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DYCS_2 \ - LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DYCS_3 \ - LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_OE \ - LPC24XX_PIN(4, 24, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_WE \ - LPC24XX_PIN(4, 25, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CAS \ - LPC24XX_PIN(2, 16, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_RAS \ - LPC24XX_PIN(2, 17, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_CLK_0 \ - LPC24XX_PIN(2, 18, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CLK_1 \ - LPC24XX_PIN(2, 19, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_CKE_0 \ - LPC24XX_PIN(2, 24, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CKE_1 \ - LPC24XX_PIN(2, 25, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CKE_2 \ - LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_CKE_3 \ - LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_DQM_0 \ - LPC24XX_PIN(2, 28, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DQM_1 \ - LPC24XX_PIN(2, 29, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DQM_2 \ - LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_DQM_3 \ - LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_BLS0 \ - LPC24XX_PIN(4, 26, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_BLS1 \ - LPC24XX_PIN(4, 27, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_BLS2 \ - LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_BLS3 \ - LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_D_0_15 \ - LPC24XX_PIN_RANGE(3, 0, 15, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_D_15_31 \ - LPC24XX_PIN_RANGE(3, 15, 31, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_D_0_31 \ - LPC24XX_PIN_RANGE(3, 0, 31, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_EMC_A_0_12 \ - LPC24XX_PIN_RANGE(4, 0, 12, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_13 \ - LPC24XX_PIN_RANGE(4, 0, 13, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_14 \ - LPC24XX_PIN_RANGE(4, 0, 14, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_15 \ - LPC24XX_PIN_RANGE(4, 0, 15, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_16 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN(4, 16, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_17 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 17, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_18 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 18, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_19 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 19, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_20 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 20, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_21 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 21, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_22 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 22, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_23 \ - LPC24XX_PIN_EMC_A_0_15, \ - LPC24XX_PIN_RANGE(4, 16, 23, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_24 \ - LPC24XX_PIN_EMC_A_0_23, \ - LPC24XX_PIN(5, 24, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_EMC_A_0_25 \ - LPC24XX_PIN_EMC_A_0_23, \ - LPC24XX_PIN_RANGE(5, 24, 25, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name I2C 0 Pins - * - * @{ - */ - -#define LPC24XX_PIN_I2C_0_SDA \ - LPC24XX_PIN_WITH_TYPE(0, 27, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_0_SCL \ - LPC24XX_PIN_WITH_TYPE(0, 28, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C) - -/** @} */ - -/** - * @name I2C 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_I2C_1_SDA_P0_0 \ - LPC24XX_PIN_WITH_TYPE(0, 0, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_1_SDA_P0_19 \ - LPC24XX_PIN_WITH_TYPE(0, 19, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_1_SDA_P2_14 \ - LPC24XX_PIN_WITH_TYPE(2, 14, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C) - -#define LPC24XX_PIN_I2C_1_SCL_P0_1 \ - LPC24XX_PIN_WITH_TYPE(0, 1, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_1_SCL_P0_20 \ - LPC24XX_PIN_WITH_TYPE(0, 20, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_1_SCL_P2_15 \ - LPC24XX_PIN_WITH_TYPE(2, 15, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C) - -/** @} */ - -/** - * @name I2C 2 Pins - * - * @{ - */ - -#define LPC24XX_PIN_I2C_2_SDA_P0_10 \ - LPC24XX_PIN_WITH_TYPE(0, 10, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_2_SDA_P2_30 \ - LPC24XX_PIN_WITH_TYPE(2, 30, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_2_SDA_P4_20 \ - LPC24XX_PIN_WITH_TYPE(4, 20, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C) - -#define LPC24XX_PIN_I2C_2_SCL_P0_11 \ - LPC24XX_PIN_WITH_TYPE(0, 11, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_2_SCL_P2_31 \ - LPC24XX_PIN_WITH_TYPE(2, 31, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C) -#define LPC24XX_PIN_I2C_2_SCL_P4_21 \ - LPC24XX_PIN_WITH_TYPE(4, 21, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C) - -/** @} */ - -/** - * @name I2S Pins - * - * @{ - */ - -#define LPC24XX_PIN_I2S_RX_CLK_P0_4 \ - LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_RX_CLK_P0_23 \ - LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_I2S_RX_WS_P0_5 \ - LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_RX_WS_P0_24 \ - LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_I2S_RX_SDA_P0_6 \ - LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_RX_SDA_P0_25 \ - LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_I2S_TX_CLK_P0_7 \ - LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_TX_CLK_P2_11 \ - LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_I2S_TX_WS_P0_8 \ - LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_TX_WS_P2_12 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_I2S_TX_SDA_P0_9 \ - LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_I2S_TX_SDA_P2_13 \ - LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11, 3) - -/** @} */ - -/** - * @name LCD Pins - * - * @{ - */ - -#define LPC24XX_PIN_LCD_PWR \ - LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_LE \ - LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_DCLK \ - LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_FP \ - LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_ENAB_M \ - LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_LP \ - LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_CLKIN \ - LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 7) - -#define LPC24XX_PIN_LCD_VD_0_P0_4 \ - LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_0_P2_6 \ - LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 6) -#define LPC24XX_PIN_LCD_VD_1_P0_5 \ - LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_1_P2_7 \ - LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 6) -#define LPC24XX_PIN_LCD_VD_2_P2_8 \ - LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 6) -#define LPC24XX_PIN_LCD_VD_2_P4_28 \ - LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 7) -#define LPC24XX_PIN_LCD_VD_3_P2_9 \ - LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 6) -#define LPC24XX_PIN_LCD_VD_3_P2_12 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 5) -#define LPC24XX_PIN_LCD_VD_3_P4_29 \ - LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 7) -#define LPC24XX_PIN_LCD_VD_4_P2_6 \ - LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_VD_4_P2_12 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 4) -#define LPC24XX_PIN_LCD_VD_5_P2_7 \ - LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_VD_5_P2_13 \ - LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 5) -#define LPC24XX_PIN_LCD_VD_6_P1_20 \ - LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_6_P2_8 \ - LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_VD_6_P4_28 \ - LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 5) -#define LPC24XX_PIN_LCD_VD_7_P1_21 \ - LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_7_P2_9 \ - LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 7) -#define LPC24XX_PIN_LCD_VD_7_P4_29 \ - LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 5) -#define LPC24XX_PIN_LCD_VD_8_P0_6 \ - LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_8_P1_22 \ - LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_8_P2_12 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_9_P0_7 \ - LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_9_P1_23 \ - LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_9_P2_13 \ - LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_10_P1_20 \ - LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_10_P1_24 \ - LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_10_P4_28 \ - LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 6) -#define LPC24XX_PIN_LCD_VD_11_P1_21 \ - LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_11_P1_25 \ - LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_11_P4_29 \ - LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 6) -#define LPC24XX_PIN_LCD_VD_12_P1_22 \ - LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_12_P1_26 \ - LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_13_P1_23 \ - LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_13_P1_27 \ - LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_14_P1_24 \ - LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_14_P1_28 \ - LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_15_P1_25 \ - LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_15_P1_29 \ - LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 6) -#define LPC24XX_PIN_LCD_VD_16_P0_8 \ - LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_17_P0_9 \ - LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_18_P2_12 \ - LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_19_P2_13 \ - LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_20_P1_26 \ - LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_21_P1_27 \ - LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_22_P1_28 \ - LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 7) -#define LPC24XX_PIN_LCD_VD_23_P1_29 \ - LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 7) - -/** @} */ - -/** - * @name PWM 0 Pins - * - * @{ - */ - -#define LPC24XX_PIN_PWM_0_CHANNEL_1_P1_2 \ - LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_1_P3_16 \ - LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CHANNEL_2_P1_3 \ - LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_2_P3_17 \ - LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CHANNEL_3_P1_5 \ - LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_3_P3_18 \ - LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CHANNEL_4_P1_6 \ - LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_4_P3_19 \ - LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CHANNEL_5_P1_7 \ - LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_5_P3_20 \ - LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CHANNEL_6_P1_11 \ - LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CHANNEL_6_P3_21 \ - LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_PWM_0_CAPTURE_0_P1_12 \ - LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_PWM_0_CAPTURE_0_P3_22 \ - LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10, 2) - -/** @} */ - -/** - * @name PWM 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_PWM_1_CHANNEL_1_P1_18 \ - LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_1_P2_0 \ - LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_1_P3_24 \ - LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CHANNEL_2_P1_20 \ - LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_2_P2_1 \ - LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_2_P3_25 \ - LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CHANNEL_3_P1_21 \ - LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_3_P2_2 \ - LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_3_P3_26 \ - LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CHANNEL_4_P1_23 \ - LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_4_P2_3 \ - LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_4_P3_27 \ - LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CHANNEL_5_P1_24 \ - LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_5_P2_4 \ - LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_5_P3_28 \ - LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CHANNEL_6_P1_26 \ - LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CHANNEL_6_P2_5 \ - LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CHANNEL_6_P3_29 \ - LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11, 2) - -#define LPC24XX_PIN_PWM_1_CAPTURE_0_P1_28 \ - LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_PWM_1_CAPTURE_0_P2_7 \ - LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_PWM_1_CAPTURE_0_P3_23 \ - LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_PWM_1_CAPTURE_1_P1_29 \ - LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10, 2) - -/** @} */ - -#ifdef ARM_MULTILIB_ARCH_V4 - -/** - * @name SPI Pins - * - * @{ - */ - -#define LPC24XX_PIN_SPI_SCK \ - LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11) -#define LPC24XX_PIN_SPI_SSEL \ - LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11) -#define LPC24XX_PIN_SPI_MISO \ - LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11) -#define LPC24XX_PIN_SPI_MOSI \ - LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11) - -/** @} */ - -#endif /* ARM_MULTILIB_ARCH_V4 */ - -/** - * @name SSP 0 Pins - * - * @{ - */ - -#define LPC24XX_PIN_SSP_0_SCK_P0_15 \ - LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_0_SCK_P1_20 \ - LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11, 5) -#define LPC24XX_PIN_SSP_0_SCK_P2_22 \ - LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_SSP_0_SSEL_P0_16 \ - LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_0_SSEL_P1_21 \ - LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_SSP_0_SSEL_P2_23 \ - LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_SSP_0_MISO_P0_17 \ - LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_0_MISO_P1_23 \ - LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11, 5) -#define LPC24XX_PIN_SSP_0_MISO_P2_26 \ - LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_SSP_0_MOSI_P0_18 \ - LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_0_MOSI_P1_24 \ - LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11, 5) -#define LPC24XX_PIN_SSP_0_MOSI_P2_27 \ - LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11, 2) - -/** @} */ - -/** - * @name SSP 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_SSP_1_SCK_P0_6 \ - LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_SCK_P0_12 \ - LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_SCK_P4_20 \ - LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_SSP_1_SSEL_P0_7 \ - LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_SSEL_P0_13 \ - LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11, 2) -#define LPC24XX_PIN_SSP_1_SSEL_P4_21 \ - LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_SSP_1_MISO_P0_8 \ - LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_MISO_P0_14 \ - LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_MISO_P4_22 \ - LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_SSP_1_MOSI_P0_9 \ - LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_MOSI_P1_31 \ - LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_SSP_1_MOSI_P4_23 \ - LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11, 3) - -/** @} */ - -#ifdef ARM_MULTILIB_ARCH_V7M - -/** - * @name SSP 2 Pins - * - * @{ - */ - -#define LPC24XX_PIN_SSP_2_SCK_P1_0 \ - LPC24XX_PIN(1, 0, LPC24XX_PIN_FUNCTION_00, 4) - -#define LPC24XX_PIN_SSP_2_SSEL_P1_8 \ - LPC24XX_PIN(1, 8, LPC24XX_PIN_FUNCTION_00, 4) - -#define LPC24XX_PIN_SSP_2_MISO_P1_4 \ - LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_00, 4) - -#define LPC24XX_PIN_SSP_2_MOSI_P1_1 \ - LPC24XX_PIN(1, 1, LPC24XX_PIN_FUNCTION_00, 4) - -/** @} */ - -#endif /* ARM_MULTILIB_ARCH_V7M */ - -/** - * @name UART 0 Pins - * - * @{ - */ - -#define LPC24XX_PIN_UART_0_TXD \ - LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01, 1) - -#define LPC24XX_PIN_UART_0_RXD \ - LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name UART 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_UART_1_TXD_P0_15 \ - LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_UART_1_TXD_P2_0 \ - LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_1_TXD_P3_16 \ - LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11, 3) - -#define LPC24XX_PIN_UART_1_RXD_P0_16 \ - LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_UART_1_RXD_P2_1 \ - LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_1_RXD_P3_17 \ - LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11, 3) - -/** @} */ - -/** - * @name UART 2 Pins - * - * @{ - */ - -#define LPC24XX_PIN_UART_2_TXD_P0_10 \ - LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_UART_2_TXD_P2_8 \ - LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_2_TXD_P4_22 \ - LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10, 2) - -#define LPC24XX_PIN_UART_2_RXD_P0_11 \ - LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_UART_2_RXD_P2_9 \ - LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_2_RXD_P4_23 \ - LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10, 2) - -/** @} */ - -/** - * @name UART 3 Pins - * - * @{ - */ - -#define LPC24XX_PIN_UART_3_TXD_P0_0 \ - LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_3_TXD_P0_25 \ - LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_UART_3_TXD_P4_28 \ - LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11, 2) - -#define LPC24XX_PIN_UART_3_RXD_P0_1 \ - LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_UART_3_RXD_P0_26 \ - LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11, 3) -#define LPC24XX_PIN_UART_3_RXD_P4_29 \ - LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11, 2) - -/** @} */ - -#ifdef ARM_MULTILIB_ARCH_V7M - -/** - * @name UART 4 Pins - * - * @{ - */ - -#define LPC24XX_PIN_UART_4_TXD_P0_22 \ - LPC24XX_PIN(0, 22, LPC24XX_PIN_FUNCTION_00, 3) -#define LPC24XX_PIN_UART_4_TXD_P1_29 \ - LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_00, 5) -#define LPC24XX_PIN_UART_4_TXD_P5_4 \ - LPC24XX_PIN(5, 4, LPC24XX_PIN_FUNCTION_00, 4) - -#define LPC24XX_PIN_UART_4_RXD_P2_9 \ - LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_00, 3) -#define LPC24XX_PIN_UART_4_RXD_P5_3 \ - LPC24XX_PIN(5, 3, LPC24XX_PIN_FUNCTION_00, 4) - -#define LPC24XX_PIN_UART_4_OE_P0_21 \ - LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 3) - -#define LPC24XX_PIN_UART_4_SCLK_P0_21 \ - LPC24XX_PIN(0, 21, LPC24XX_PIN_FUNCTION_00, 5) - -#endif /* ARM_MULTILIB_ARCH_V7M */ - -/** @} */ - -/** - * @name USB Port 1 Pins - * - * @{ - */ - -#define LPC24XX_PIN_USB_D_PLUS_1\ - LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_D_MINUS_1\ - LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_UP_LED_1\ - LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_TX_E_1\ - LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_PPWR_1\ - LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_USB_TX_DP_1\ - LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_TX_DM_1\ - LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_RCV_1\ - LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_PWRD_1\ - LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_USB_RX_DP_1\ - LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_RX_DM_1\ - LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_LS_1\ - LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_HSTEN_1\ - LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_USB_SSPND_1\ - LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_INT_1\ - LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_OVRCR_1\ - LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10, 2) -#define LPC24XX_PIN_USB_SCL_1\ - LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_SDA_1 \ - LPC24XX_PIN_WITH_TYPE( \ - 1, 29, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_OPEN_DRAIN \ - ) -#define LPC24XX_PIN_USB_CONNECT_1\ - LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** - * @name USB Port 2 Pins - * - * @{ - */ - -#define LPC24XX_PIN_USB_PPWR_2\ - LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_UP_LED_2\ - LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_HSTEN_2\ - LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_CONNECT_2\ - LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 3) -#define LPC24XX_PIN_USB_D_PLUS_2\ - LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_PWRD_2\ - LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01, 1) -#define LPC24XX_PIN_USB_OVRCR_2\ - LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01, 1) - -/** @} */ - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_IO_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h b/c/src/lib/libbsp/arm/lpc24xx/include/irq.h deleted file mode 100644 index 0f0e473a0c..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/irq.h +++ /dev/null @@ -1,140 +0,0 @@ -/** - * @file - * - * @ingroup bsp_interrupt - * - * @brief LPC24XX interrupt definitions. - */ - -/* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_IRQ_H -#define LIBBSP_ARM_LPC24XX_IRQ_H - -#ifndef ASM - #include <rtems.h> - #include <rtems/irq.h> - #include <rtems/irq-extension.h> -#endif - -/** - * @addtogroup bsp_interrupt - * - * @{ - */ - -#define BSP_INTERRUPT_VECTOR_MIN 0 - -#ifdef ARM_MULTILIB_ARCH_V4 - #define LPC24XX_IRQ_WDT 0 - #define LPC24XX_IRQ_SOFTWARE 1 - #define LPC24XX_IRQ_ARM_CORE_0 2 - #define LPC24XX_IRQ_ARM_CORE_1 3 - #define LPC24XX_IRQ_TIMER_0 4 - #define LPC24XX_IRQ_TIMER_1 5 - #define LPC24XX_IRQ_UART_0 6 - #define LPC24XX_IRQ_UART_1 7 - #define LPC24XX_IRQ_PWM 8 - #define LPC24XX_IRQ_I2C_0 9 - #define LPC24XX_IRQ_SPI_SSP_0 10 - #define LPC24XX_IRQ_SSP_1 11 - #define LPC24XX_IRQ_PLL 12 - #define LPC24XX_IRQ_RTC 13 - #define LPC24XX_IRQ_EINT_0 14 - #define LPC24XX_IRQ_EINT_1 15 - #define LPC24XX_IRQ_EINT_2 16 - #define LPC24XX_IRQ_EINT_3 17 - #define LPC24XX_IRQ_ADC_0 18 - #define LPC24XX_IRQ_I2C_1 19 - #define LPC24XX_IRQ_BOD 20 - #define LPC24XX_IRQ_ETHERNET 21 - #define LPC24XX_IRQ_USB 22 - #define LPC24XX_IRQ_CAN 23 - #define LPC24XX_IRQ_SD_MMC 24 - #define LPC24XX_IRQ_DMA 25 - #define LPC24XX_IRQ_TIMER_2 26 - #define LPC24XX_IRQ_TIMER_3 27 - #define LPC24XX_IRQ_UART_2 28 - #define LPC24XX_IRQ_UART_3 29 - #define LPC24XX_IRQ_I2C_2 30 - #define LPC24XX_IRQ_I2S 31 - - #define BSP_INTERRUPT_VECTOR_MAX 31 -#else - #define LPC24XX_IRQ_WDT 0 - #define LPC24XX_IRQ_TIMER_0 1 - #define LPC24XX_IRQ_TIMER_1 2 - #define LPC24XX_IRQ_TIMER_2 3 - #define LPC24XX_IRQ_TIMER_3 4 - #define LPC24XX_IRQ_UART_0 5 - #define LPC24XX_IRQ_UART_1 6 - #define LPC24XX_IRQ_UART_2 7 - #define LPC24XX_IRQ_UART_3 8 - #define LPC24XX_IRQ_PWM_1 9 - #define LPC24XX_IRQ_I2C_0 10 - #define LPC24XX_IRQ_I2C_1 11 - #define LPC24XX_IRQ_I2C_2 12 - #define LPC24XX_IRQ_SPI_SSP_0 14 - #define LPC24XX_IRQ_SSP_1 15 - #define LPC24XX_IRQ_PLL 16 - #define LPC24XX_IRQ_RTC 17 - #define LPC24XX_IRQ_EINT_0 18 - #define LPC24XX_IRQ_EINT_1 19 - #define LPC24XX_IRQ_EINT_2 20 - #define LPC24XX_IRQ_EINT_3 21 - #define LPC24XX_IRQ_ADC_0 22 - #define LPC24XX_IRQ_BOD 23 - #define LPC24XX_IRQ_USB 24 - #define LPC24XX_IRQ_CAN 25 - #define LPC24XX_IRQ_DMA 26 - #define LPC24XX_IRQ_I2S 27 - #define LPC24XX_IRQ_ETHERNET 28 - #define LPC24XX_IRQ_SD_MMC 29 - #define LPC24XX_IRQ_MCPWM 30 - #define LPC24XX_IRQ_QEI 31 - #define LPC24XX_IRQ_PLL_ALT 32 - #define LPC24XX_IRQ_USB_ACTIVITY 33 - #define LPC24XX_IRQ_CAN_ACTIVITY 34 - #define LPC24XX_IRQ_UART_4 35 - #define LPC24XX_IRQ_SSP_2 36 - #define LPC24XX_IRQ_LCD 37 - #define LPC24XX_IRQ_GPIO 38 - #define LPC24XX_IRQ_PWM 39 - #define LPC24XX_IRQ_EEPROM 40 - - #define BSP_INTERRUPT_VECTOR_MAX 40 -#endif - -#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0 -#ifdef ARM_MULTILIB_ARCH_V4 - #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15 -#else - #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 31 -#endif -#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1) -#define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN -#define LPC24XX_IRQ_PRIORITY_LOWEST LPC24XX_IRQ_PRIORITY_VALUE_MAX - -#ifndef ASM - -void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority); - -unsigned lpc24xx_irq_get_priority(rtems_vector_number vector); - -#endif /* ASM */ - -/** @} */ - -#endif /* LIBBSP_ARM_LPC24XX_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-clock-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc-clock-config.h deleted file mode 100644 index 5e6b469e0f..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-clock-config.h +++ /dev/null @@ -1,49 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx - * - * @brief Clock driver configuration. - */ - -/* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H -#define LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H - -#include <bsp.h> -#include <bsp/irq.h> -#include <bsp/lpc24xx.h> -#include <bsp/io.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define LPC_CLOCK_INTERRUPT LPC24XX_IRQ_TIMER_0 - -#define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR - -#define LPC_CLOCK_TIMECOUNTER_BASE TMR1_BASE_ADDR - -#define LPC_CLOCK_REFERENCE LPC24XX_PCLK - -#define LPC_CLOCK_MODULE_ENABLE() \ - lpc24xx_module_enable(LPC24XX_MODULE_TIMER_0, LPC24XX_MODULE_PCLK_DEFAULT) - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_LPC_CLOCK_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h b/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h deleted file mode 100644 index d24f132567..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/lpc-ethernet-config.h +++ /dev/null @@ -1,130 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx - * - * @brief Ethernet driver configuration. - */ - -/* - * Copyright (c) 2009-2012 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H -#define LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H - -#include <bsp.h> -#include <bsp/io.h> -#include <bsp/lpc24xx.h> - -#include <limits.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define LPC_ETH_CONFIG_INTERRUPT LPC24XX_IRQ_ETHERNET - -#define LPC_ETH_CONFIG_REG_BASE MAC_BASE_ADDR - -#ifdef ARM_MULTILIB_ARCH_V4 - #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16 - #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX 54 - - #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 10 - #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX 10 - - #define LPC_ETH_CONFIG_UNIT_MULTIPLE 1U - - #define LPC24XX_ETH_RAM_BEGIN 0x7fe00000U - #define LPC24XX_ETH_RAM_SIZE (16U * 1024U) -#else - #define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16 - #define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX - - #define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32 - #define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX - - #define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U - - #define LPC_ETH_CONFIG_USE_TRANSMIT_DMA - - #define LPC24XX_ETH_RAM_BEGIN 0x20000000U - #define LPC24XX_ETH_RAM_SIZE (32U * 1024U) -#endif - -#ifdef LPC24XX_ETHERNET_RMII - #define LPC_ETH_CONFIG_RMII - - static void lpc_eth_config_module_enable(void) - { - static const lpc24xx_pin_range pins [] = { - #ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN - LPC24XX_PIN_ETHERNET_POWER_DOWN, - #endif - LPC24XX_PIN_ETHERNET_RMII_0, - LPC24XX_PIN_ETHERNET_RMII_1, - LPC24XX_PIN_ETHERNET_RMII_2, - LPC24XX_PIN_ETHERNET_RMII_3, - LPC24XX_PIN_TERMINAL - }; - - lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT); - lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); - - #ifdef LPC24XX_PIN_ETHERNET_POWER_DOWN - { - unsigned pin = lpc24xx_pin_get_first_index(&pins[0]); - - lpc24xx_gpio_config(pin, LPC24XX_GPIO_OUTPUT); - lpc24xx_gpio_set(pin); - } - #endif - } -#else - static void lpc_eth_config_module_enable(void) - { - static const lpc24xx_pin_range pins [] = { - LPC24XX_PIN_ETHERNET_MII, - LPC24XX_PIN_TERMINAL - }; - - lpc24xx_module_enable(LPC24XX_MODULE_ETHERNET, LPC24XX_MODULE_PCLK_DEFAULT); - lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); - } -#endif - -static void lpc_eth_config_module_disable(void) -{ - lpc24xx_module_disable(LPC24XX_MODULE_ETHERNET); -} - -static char *lpc_eth_config_alloc_table_area(size_t size) -{ - if (size < LPC24XX_ETH_RAM_SIZE) { - return (char *) LPC24XX_ETH_RAM_BEGIN; - } else { - return NULL; - } -} - -static void lpc_eth_config_free_table_area(char *table_area) -{ - /* Do nothing */ -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_LPC_ETHERNET_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h b/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h deleted file mode 100644 index 564d12ec10..0000000000 --- a/c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h +++ /dev/null @@ -1,89 +0,0 @@ -/** - * @file - * - * @ingroup lpc24xx_clocks - * - * @brief System clocks. - */ - -/* - * Copyright (c) 2008, 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H -#define LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H - -#include <bsp/lpc24xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc24xx_clock System Clocks - * - * @ingroup lpc24xx - * - * @brief System clocks. - * - * @{ - */ - -/** - * @brief Initializes the standard timer. - * - * This function uses Timer 1. - */ -void lpc24xx_timer_initialize(void); - -/** - * @brief Returns current standard timer value in CPU clocks. - * - * This function uses Timer 1. - */ -static inline unsigned lpc24xx_timer(void) -{ - return T1TC; -} - -/** - * @brief Delay for @a us micro seconds. - * - * This function uses the standard timer and assumes that the CPU frequency is - * in whole MHz numbers. The delay value @a us will be converted to CPU ticks - * and there is no protection against integer overflows. - * - * This function uses Timer 1. - */ -void lpc24xx_micro_seconds_delay(unsigned us); - -/** - * @brief Returns the PLL output clock frequency in [Hz]. - * - * Returns zero in case of an unexpected PLL input frequency. - */ -unsigned lpc24xx_pllclk(void); - -/** - * @brief Returns the CPU clock frequency in [Hz]. - * - * Returns zero in case of an unexpected PLL input frequency. - */ -unsigned lpc24xx_cclk(void); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC24XX_SYSTEM_CLOCKS_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h b/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h deleted file mode 100644 index c36dafd43d..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/bsp.h +++ /dev/null @@ -1,261 +0,0 @@ -/** - * @file - * - * @ingroup arm_lpc32xx - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_BSP_H -#define LIBBSP_ARM_LPC32XX_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#include <bsp/lpc32xx.h> -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -struct rtems_bsdnet_ifconfig; - -/** - * @defgroup arm_lpc32xx LPC32XX Support - * - * @ingroup bsp_arm - * - * @brief LPC32XX support package. - * - * @{ - */ - -/** - * @brief Network driver attach and detach function. - */ -int lpc_eth_attach_detach( - struct rtems_bsdnet_ifconfig *config, - int attaching -); - -/** - * @brief Standard network driver attach and detach function. - */ -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach - -/** - * @brief Standard network driver name. - */ -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" - -/** - * @brief Optimized idle task. - * - * This idle task sets the power mode to idle. This causes the processor clock - * to be stopped, while on-chip peripherals remain active. Any enabled - * interrupt from a peripheral or an external interrupt source will cause the - * processor to resume execution. - * - * To enable the idle task use the following in the system configuration: - * - * @code - * #include <bsp.h> - * - * #define CONFIGURE_INIT - * - * #define CONFIGURE_IDLE_TASK_BODY lpc32xx_idle - * - * #include <confdefs.h> - * @endcode - */ -void *lpc32xx_idle(uintptr_t ignored); - -#define LPC32XX_STANDARD_TIMER (&lpc32xx.timer_1) - -static inline unsigned lpc32xx_timer(void) -{ - volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER; - - return timer->tc; -} - -static inline void lpc32xx_micro_seconds_delay(unsigned us) -{ - unsigned start = lpc32xx_timer(); - unsigned delay = us * (LPC32XX_PERIPH_CLK / 1000000); - unsigned elapsed = 0; - - do { - elapsed = lpc32xx_timer() - start; - } while (elapsed < delay); -} - -#if LPC32XX_OSCILLATOR_MAIN == 13000000U - #define LPC32XX_HCLKPLL_CTRL_INIT_VALUE \ - (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1)) - #define LPC32XX_HCLKDIV_CTRL_INIT_VALUE \ - (HCLK_DIV_HCLK(2 - 1) | HCLK_DIV_PERIPH_CLK(16 - 1) | HCLK_DIV_DDRAM_CLK(0)) -#else - #error "unexpected main oscillator frequency" -#endif - -bool lpc32xx_start_pll_setup( - uint32_t hclkpll_ctrl, - uint32_t hclkdiv_ctrl, - bool force -); - -uint32_t lpc32xx_sysclk(void); - -uint32_t lpc32xx_hclkpll_clk(void); - -uint32_t lpc32xx_periph_clk(void); - -uint32_t lpc32xx_hclk(void); - -uint32_t lpc32xx_arm_clk(void); - -uint32_t lpc32xx_ddram_clk(void); - -typedef enum { - LPC32XX_NAND_CONTROLLER_NONE, - LPC32XX_NAND_CONTROLLER_MLC, - LPC32XX_NAND_CONTROLLER_SLC -} lpc32xx_nand_controller; - -void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller); - -void bsp_restart(void *addr); - -void *bsp_idle_thread(uintptr_t arg); - -#define BSP_IDLE_TASK_BODY bsp_idle_thread - -#define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5 - -/** - * @brief Begin of magic zero area. - * - * A read from this area returns zero. Writes have no effect. - */ -extern uint32_t lpc32xx_magic_zero_begin []; - -/** - * @brief End of magic zero area. - * - * A read from this area returns zero. Writes have no effect. - */ -extern uint32_t lpc32xx_magic_zero_end []; - -/** - * @brief Size of magic zero area. - * - * A read from this area returns zero. Writes have no effect. - */ -extern uint32_t lpc32xx_magic_zero_size []; - -#ifdef LPC32XX_SCRATCH_AREA_SIZE - /** - * @rief Scratch area. - * - * The usage is application specific. - */ - extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE] - __attribute__((aligned(32))); -#endif - -#define LPC32XX_DO_STOP_GPDMA \ - do { \ - if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \ - if ((lpc32xx.dma.cfg & DMA_CFG_E) != 0) { \ - int i = 0; \ - for (i = 0; i < 8; ++i) { \ - lpc32xx.dma.channels [i].cfg = 0; \ - } \ - lpc32xx.dma.cfg &= ~DMA_CFG_E; \ - } \ - LPC32XX_DMACLK_CTRL = 0; \ - } \ - } while (0) - -#define LPC32XX_DO_STOP_ETHERNET \ - do { \ - if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \ - lpc32xx.eth.command = 0x38; \ - lpc32xx.eth.mac1 = 0xcf00; \ - lpc32xx.eth.mac1 = 0; \ - LPC32XX_MAC_CLK_CTRL = 0; \ - } \ - } while (0) - -#define LPC32XX_DO_STOP_USB \ - do { \ - if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \ - LPC32XX_OTG_CLK_CTRL = 0; \ - LPC32XX_USB_CTRL = 0x80000; \ - } \ - } while (0) - -#define LPC32XX_DO_RESTART(addr) \ - do { \ - ARM_SWITCH_REGISTERS; \ - rtems_interrupt_level level; \ - uint32_t ctrl = 0; \ - \ - rtems_interrupt_disable(level); \ - \ - arm_cp15_data_cache_test_and_clean(); \ - arm_cp15_instruction_cache_invalidate(); \ - \ - ctrl = arm_cp15_get_control(); \ - ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \ - arm_cp15_set_control(ctrl); \ - \ - __asm__ volatile ( \ - ARM_SWITCH_TO_ARM \ - "mov pc, %[addr]\n" \ - ARM_SWITCH_BACK \ - : ARM_SWITCH_OUTPUT \ - : [addr] "r" (addr) \ - ); \ - } while (0) - -/** @} */ - -/** - * @defgroup lpc LPC Support - * - * @ingroup arm_lpc32xx - * - * @brief LPC support package. - */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_LPC32XX_BSP_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h b/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h deleted file mode 100644 index e0bf8349ac..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/i2c.h +++ /dev/null @@ -1,269 +0,0 @@ -/** - * @file - * - * @ingroup lpc32xx_i2c - * - * @brief I2C support API. - */ - -/* - * Copyright (c) 2010 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_I2C_H -#define LIBBSP_ARM_LPC32XX_I2C_H - -#include <rtems.h> - -#include <bsp/lpc32xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc32xx_i2c I2C Support - * - * @ingroup arm_lpc32xx - * - * @brief I2C Support - * - * All writes and reads will be performed in master mode. Exclusive bus access - * will be assumed. - * - * @{ - */ - -/** - * @name I2C Clock Control Register (I2CCLK_CTRL) - * - * @{ - */ - -#define I2CCLK_1_EN BSP_BIT32(0) -#define I2CCLK_2_EN BSP_BIT32(1) -#define I2CCLK_1_HIGH_DRIVE BSP_BIT32(2) -#define I2CCLK_2_HIGH_DRIVE BSP_BIT32(3) -#define I2CCLK_USB_HIGH_DRIVE BSP_BIT32(4) - -/** @} */ - -/** - * @name I2C TX Data FIFO Register (I2Cn_TX) - * - * @{ - */ - -#define I2C_TX_READ BSP_BIT32(0) -#define I2C_TX_ADDR(val) BSP_FLD32(val, 1, 7) -#define I2C_TX_START BSP_BIT32(8) -#define I2C_TX_STOP BSP_BIT32(9) - -/** @} */ - -/** - * @name I2C Status Register (I2Cn_STAT) - * - * @{ - */ - -#define I2C_STAT_TDI BSP_BIT32(0) -#define I2C_STAT_AFI BSP_BIT32(1) -#define I2C_STAT_NAI BSP_BIT32(2) -#define I2C_STAT_DRMI BSP_BIT32(3) -#define I2C_STAT_DRSI BSP_BIT32(4) -#define I2C_STAT_ACTIVE BSP_BIT32(5) -#define I2C_STAT_SCL BSP_BIT32(6) -#define I2C_STAT_SDA BSP_BIT32(7) -#define I2C_STAT_RFF BSP_BIT32(8) -#define I2C_STAT_RFE BSP_BIT32(9) -#define I2C_STAT_TFF BSP_BIT32(10) -#define I2C_STAT_TFE BSP_BIT32(11) -#define I2C_STAT_TFFS BSP_BIT32(12) -#define I2C_STAT_TFES BSP_BIT32(13) - -/** @} */ - -/** - * @name I2C Control Register (I2Cn_CTRL) - * - * @{ - */ - -#define I2C_CTRL_TDIE BSP_BIT32(0) -#define I2C_CTRL_AFIE BSP_BIT32(1) -#define I2C_CTRL_NAIE BSP_BIT32(2) -#define I2C_CTRL_DRMIE BSP_BIT32(3) -#define I2C_CTRL_DRSIE BSP_BIT32(4) -#define I2C_CTRL_RFFIE BSP_BIT32(5) -#define I2C_CTRL_RFDAIE BSP_BIT32(6) -#define I2C_CTRL_TFFIO BSP_BIT32(7) -#define I2C_CTRL_RESET BSP_BIT32(8) -#define I2C_CTRL_SEVEN BSP_BIT32(9) -#define I2C_CTRL_TFFSIE BSP_BIT32(10) - -/** @} */ - -/** - * @brief Initializes the I2C module @a i2c. - * - * Valid @a clock_in_hz values are 100000 and 400000. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_ID Invalid @a i2c value. - * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value. - */ -rtems_status_code lpc32xx_i2c_init( - volatile lpc32xx_i2c *i2c, - unsigned clock_in_hz -); - -/** - * @brief Resets the I2C module @a i2c. - */ -void lpc32xx_i2c_reset(volatile lpc32xx_i2c *i2c); - -/** - * @brief Sets the I2C module @a i2c clock. - * - * Valid @a clock_in_hz values are 100000 and 400000. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_INVALID_CLOCK Invalid @a clock_in_hz value. - */ -rtems_status_code lpc32xx_i2c_clock( - volatile lpc32xx_i2c *i2c, - unsigned clock_in_hz -); - -/** - * @brief Starts a write transaction on the I2C module @a i2c. - * - * The address parameter @a addr must not contain the read/write bit. - * - * The error status may be delayed to the next - * lpc32xx_i2c_write_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code lpc32xx_i2c_write_start( - volatile lpc32xx_i2c *i2c, - unsigned addr -); - -/** - * @brief Writes data via the I2C module @a i2c with optional stop. - * - * The error status may be delayed to the next - * lpc32xx_i2c_write_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code lpc32xx_i2c_write_with_optional_stop( - volatile lpc32xx_i2c *i2c, - const uint8_t *out, - size_t n, - bool stop -); - -/** - * @brief Starts a read transaction on the I2C module @a i2c. - * - * The address parameter @a addr must not contain the read/write bit. - * - * The error status may be delayed to the next - * lpc32xx_i2c_read_with_optional_stop() due to controller flaws. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code lpc32xx_i2c_read_start( - volatile lpc32xx_i2c *i2c, - unsigned addr -); - -/** - * @brief Reads data via the I2C module @a i2c with optional stop. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - * @retval RTEMS_NOT_IMPLEMENTED Stop is @a false. - */ -rtems_status_code lpc32xx_i2c_read_with_optional_stop( - volatile lpc32xx_i2c *i2c, - uint8_t *in, - size_t n, - bool stop -); - -/** - * @brief Writes and reads data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -rtems_status_code lpc32xx_i2c_write_and_read( - volatile lpc32xx_i2c *i2c, - unsigned addr, - const uint8_t *out, - size_t out_size, - uint8_t *in, - size_t in_size -); - -/** - * @brief Writes data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -static inline rtems_status_code lpc32xx_i2c_write( - volatile lpc32xx_i2c *i2c, - unsigned addr, - const uint8_t *out, - size_t out_size -) -{ - return lpc32xx_i2c_write_and_read(i2c, addr, out, out_size, NULL, 0); -} - -/** - * @brief Reads data via the I2C module @a i2c. - * - * This will be one bus transaction. - * - * @retval RTEMS_SUCCESSFUL Successful operation. - * @retval RTEMS_IO_ERROR Received a NACK from the slave. - */ -static inline rtems_status_code lpc32xx_i2c_read( - volatile lpc32xx_i2c *i2c, - unsigned addr, - uint8_t *in, - size_t in_size -) -{ - return lpc32xx_i2c_write_and_read(i2c, addr, NULL, 0, in, in_size); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC32XX_I2C_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/irq.h b/c/src/lib/libbsp/arm/lpc32xx/include/irq.h deleted file mode 100644 index fbb13b5262..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/irq.h +++ /dev/null @@ -1,179 +0,0 @@ -/** - * @file - * - * @ingroup lpc32xx_interrupt - * - * @brief Interrupt definitions. - */ - -/* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_IRQ_H -#define LIBBSP_ARM_LPC32XX_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc32xx_interrupt Interrupt Support - * - * @ingroup arm_lpc32xx - * - * @ingroup bsp_interrupt - * - * @{ - */ - -#define LPC32XX_IRQ_INDEX(module, subindex) ((module) + (subindex)) - -#define LPC32XX_IRQ_MODULE_MIC 0U -#define LPC32XX_IRQ_MODULE_SIC_1 32U -#define LPC32XX_IRQ_MODULE_SIC_2 64U -#define LPC32XX_IRQ_MODULE_COUNT 3U - -/* MIC interrupts */ -#define LPC32XX_IRQ_SIC_1_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 0) -#define LPC32XX_IRQ_SIC_2_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 1) -#define LPC32XX_IRQ_TIMER_4_OR_MCPWM LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 3) -#define LPC32XX_IRQ_TIMER_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 4) -#define LPC32XX_IRQ_TIMER_HS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 5) -#define LPC32XX_IRQ_WDG LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 6) -#define LPC32XX_IRQ_UART_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 7) -#define LPC32XX_IRQ_UART_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 8) -#define LPC32XX_IRQ_UART_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 9) -#define LPC32XX_IRQ_UART_6 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 10) -#define LPC32XX_IRQ_NAND_FLASH LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 11) -#define LPC32XX_IRQ_SDCARD_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 13) -#define LPC32XX_IRQ_LCD LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 14) -#define LPC32XX_IRQ_SDCARD_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 15) -#define LPC32XX_IRQ_TIMER_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 16) -#define LPC32XX_IRQ_TIMER_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 17) -#define LPC32XX_IRQ_TIMER_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 18) -#define LPC32XX_IRQ_TIMER_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 19) -#define LPC32XX_IRQ_SSP_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 20) -#define LPC32XX_IRQ_SSP_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 21) -#define LPC32XX_IRQ_I2S_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 22) -#define LPC32XX_IRQ_I2S_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 23) -#define LPC32XX_IRQ_UART_7 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 24) -#define LPC32XX_IRQ_UART_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 25) -#define LPC32XX_IRQ_UART_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 26) -#define LPC32XX_IRQ_TIMER_MS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 27) -#define LPC32XX_IRQ_DMA LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 28) -#define LPC32XX_IRQ_ETHERNET LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 29) -#define LPC32XX_IRQ_SIC_1_FIQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 30) -#define LPC32XX_IRQ_SIC_2_FIQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_MIC, 31) - -/* SIC 1 interrupts */ -#define LPC32XX_IRQ_JTAG_COMM_TX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 1) -#define LPC32XX_IRQ_JTAG_COMM_RX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 2) -#define LPC32XX_IRQ_GPI_28 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 4) -#define LPC32XX_IRQ_TS_P LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 6) -#define LPC32XX_IRQ_TS_IRQ_OR_ADC LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 7) -#define LPC32XX_IRQ_TS_AUX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 8) -#define LPC32XX_IRQ_SPI_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 12) -#define LPC32XX_IRQ_PLL_USB LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 13) -#define LPC32XX_IRQ_PLL_HCLK LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 14) -#define LPC32XX_IRQ_PLL_397 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 17) -#define LPC32XX_IRQ_I2C_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 18) -#define LPC32XX_IRQ_I2C_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 19) -#define LPC32XX_IRQ_RTC LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 20) -#define LPC32XX_IRQ_KEYSCAN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 22) -#define LPC32XX_IRQ_SPI_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 23) -#define LPC32XX_IRQ_SW LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 24) -#define LPC32XX_IRQ_USB_OTG_TIMER LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 25) -#define LPC32XX_IRQ_USB_OTG_ATX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 26) -#define LPC32XX_IRQ_USB_HOST LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 27) -#define LPC32XX_IRQ_USB_DEV_DMA LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 28) -#define LPC32XX_IRQ_USB_DEV_LP LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 29) -#define LPC32XX_IRQ_USB_DEV_HP LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 30) -#define LPC32XX_IRQ_USB_I2C LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_1, 31) - -/* SIC 2 interrupts */ -#define LPC32XX_IRQ_GPIO_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 0) -#define LPC32XX_IRQ_GPIO_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 1) -#define LPC32XX_IRQ_GPIO_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 2) -#define LPC32XX_IRQ_GPIO_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 3) -#define LPC32XX_IRQ_GPIO_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 4) -#define LPC32XX_IRQ_GPIO_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 5) -#define LPC32XX_IRQ_SPI_2_DATAIN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 6) -#define LPC32XX_IRQ_UART_2_HCTS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 7) -#define LPC32XX_IRQ_GPIO_P0_P1_IRQ LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 8) -#define LPC32XX_IRQ_GPI_8 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 9) -#define LPC32XX_IRQ_GPI_9 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 10) -#define LPC32XX_IRQ_GPI_19 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 11) -#define LPC32XX_IRQ_UART_7_HCTS LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 12) -#define LPC32XX_IRQ_GPI_7 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 15) -#define LPC32XX_IRQ_SDIO LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 18) -#define LPC32XX_IRQ_UART_5_RX LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 19) -#define LPC32XX_IRQ_SPI_1_DATAIN LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 20) -#define LPC32XX_IRQ_GPI_0 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 22) -#define LPC32XX_IRQ_GPI_1 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 23) -#define LPC32XX_IRQ_GPI_2 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 24) -#define LPC32XX_IRQ_GPI_3 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 25) -#define LPC32XX_IRQ_GPI_4 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 26) -#define LPC32XX_IRQ_GPI_5 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 27) -#define LPC32XX_IRQ_GPI_6 LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 28) -#define LPC32XX_IRQ_SYSCLK LPC32XX_IRQ_INDEX(LPC32XX_IRQ_MODULE_SIC_2, 31) - -#define LPC32XX_IRQ_PRIORITY_VALUE_MIN 0U -#define LPC32XX_IRQ_PRIORITY_VALUE_MAX 15U -#define LPC32XX_IRQ_PRIORITY_COUNT (LPC32XX_IRQ_PRIORITY_VALUE_MAX + 1U) -#define LPC32XX_IRQ_PRIORITY_HIGHEST LPC32XX_IRQ_PRIORITY_VALUE_MIN -#define LPC32XX_IRQ_PRIORITY_LOWEST LPC32XX_IRQ_PRIORITY_VALUE_MAX - -#define BSP_INTERRUPT_VECTOR_MIN LPC32XX_IRQ_SIC_1_IRQ -#define BSP_INTERRUPT_VECTOR_MAX LPC32XX_IRQ_SYSCLK - -#define LPC32XX_IRQ_COUNT (BSP_INTERRUPT_VECTOR_MAX + 1) - -void lpc32xx_irq_set_priority(rtems_vector_number vector, unsigned priority); - -unsigned lpc32xx_irq_get_priority(rtems_vector_number vector); - -typedef enum { - LPC32XX_IRQ_ACTIVE_LOW_OR_FALLING_EDGE, - LPC32XX_IRQ_ACTIVE_HIGH_OR_RISING_EDGE -} lpc32xx_irq_activation_polarity; - -void lpc32xx_irq_set_activation_polarity(rtems_vector_number vector, lpc32xx_irq_activation_polarity activation_polarity); - -lpc32xx_irq_activation_polarity lpc32xx_irq_get_activation_polarity(rtems_vector_number vector); - -typedef enum { - LPC32XX_IRQ_LEVEL_SENSITIVE, - LPC32XX_IRQ_EDGE_SENSITIVE -} lpc32xx_irq_activation_type; - -void lpc32xx_irq_set_activation_type(rtems_vector_number vector, lpc32xx_irq_activation_type activation_type); - -lpc32xx_irq_activation_type lpc32xx_irq_get_activation_type(rtems_vector_number vector); - -void lpc32xx_set_exception_handler(Arm_symbolic_exception_name exception, void (*handler)(void)); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_LPC32XX_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h deleted file mode 100644 index 2b676b433f..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-clock-config.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * @file - * - * @ingroup lpc_clock - * - * @brief Clock driver configuration. - */ - -/* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H -#define LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H - -#include <bsp.h> -#include <bsp/irq.h> -#include <bsp/lpc32xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc_clock Clock Support - * - * @ingroup lpc - * - * @brief Clock support. - * - * @{ - */ - -#define LPC_CLOCK_INTERRUPT LPC32XX_IRQ_TIMER_0 - -#define LPC_CLOCK_TIMER_BASE LPC32XX_BASE_TIMER_0 - -#define LPC_CLOCK_TIMECOUNTER_BASE LPC32XX_BASE_TIMER_1 - -#define LPC_CLOCK_REFERENCE LPC32XX_PERIPH_CLK - -#define LPC_CLOCK_MODULE_ENABLE() - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC32XX_LPC_CLOCK_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h b/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h deleted file mode 100644 index 53e9e8415d..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/lpc-ethernet-config.h +++ /dev/null @@ -1,98 +0,0 @@ -/** - * @file - * - * @ingroup lpc_eth - * - * @brief Ethernet driver configuration. - */ - -/* - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H -#define LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H - -#include <stdlib.h> -#include <limits.h> - -#include <rtems.h> -#include <rtems/malloc.h> - -#include <bsp.h> -#include <bsp/lpc32xx.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc_eth Ethernet Support - * - * @ingroup lpc - * - * @brief Ethernet support. - * - * @{ - */ - -#define LPC_ETH_CONFIG_INTERRUPT LPC32XX_IRQ_ETHERNET - -#define LPC_ETH_CONFIG_REG_BASE LPC32XX_BASE_ETHERNET - -#define LPC_ETH_CONFIG_RX_UNIT_COUNT_DEFAULT 16 -#define LPC_ETH_CONFIG_RX_UNIT_COUNT_MAX INT_MAX - -#define LPC_ETH_CONFIG_TX_UNIT_COUNT_DEFAULT 32 -#define LPC_ETH_CONFIG_TX_UNIT_COUNT_MAX INT_MAX - -#define LPC_ETH_CONFIG_UNIT_MULTIPLE 8U - -#ifdef LPC32XX_ETHERNET_RMII - #define LPC_ETH_CONFIG_RMII - - static void lpc_eth_config_module_enable(void) - { - LPC32XX_MAC_CLK_CTRL = 0x1f; - } -#else - static void lpc_eth_config_module_enable(void) - { - LPC32XX_MAC_CLK_CTRL = 0x0f; - } -#endif - -static void lpc_eth_config_module_disable(void) -{ - LPC32XX_MAC_CLK_CTRL = 0; -} - -#define LPC_ETH_CONFIG_USE_TRANSMIT_DMA - -static char *lpc_eth_config_alloc_table_area(size_t size) -{ - return rtems_heap_allocate_aligned_with_boundary(size, 32, 0); -} - -static void lpc_eth_config_free_table_area(char *table_area) -{ - /* FIXME: Type */ - free(table_area, (int) 0xdeadbeef); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC32XX_LPC_ETHERNET_CONFIG_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h b/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h deleted file mode 100644 index 32352b5ed9..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/mmu.h +++ /dev/null @@ -1,79 +0,0 @@ -/** - * @file - * - * @ingroup lpc32xx_mmu - * - * @brief MMU support API. - */ - -/* - * Copyright (c) 2009-2011 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_LPC32XX_MMU_H -#define LIBBSP_ARM_LPC32XX_MMU_H - -#include <libcpu/arm-cp15.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup lpc32xx_mmu MMU Support - * - * @ingroup arm_lpc32xx - * - * @brief MMU support. - * - * @{ - */ - -#define LPC32XX_MMU_CLIENT_DOMAIN 15U - -#define LPC32XX_MMU_READ_ONLY \ - ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ - | ARM_MMU_SECT_DEFAULT) - -#define LPC32XX_MMU_READ_ONLY_CACHED \ - (LPC32XX_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B) - -#define LPC32XX_MMU_READ_WRITE \ - ((LPC32XX_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ - | ARM_MMU_SECT_AP_0 \ - | ARM_MMU_SECT_DEFAULT) - -#define LPC32XX_MMU_READ_WRITE_CACHED \ - (LPC32XX_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) - -/** - * @brief Sets the @a section_flags for the address range [@a begin, @a end). - * - * @return Previous section flags of the first modified entry. - */ -static inline uint32_t lpc32xx_set_translation_table_entries( - const void *begin, - const void *end, - uint32_t section_flags -) -{ - return arm_cp15_set_translation_table_entries(begin, end, section_flags); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_LPC32XX_MMU_H */ diff --git a/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h b/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h deleted file mode 100644 index 4cbc17a085..0000000000 --- a/c/src/lib/libbsp/arm/lpc32xx/include/tm27.h +++ /dev/null @@ -1,72 +0,0 @@ -/* @file - * - * @ingroup arm_lpc32xx - * - * @brief Implementations of interrupt mechanisms for Time Test 27 - */ - -/* - * Copyright (c) 2010 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <assert.h> - -#include <rtems.h> - -#include <bsp/lpc32xx.h> -#include <bsp/irq.h> -#include <bsp/irq-generic.h> - -#define MUST_WAIT_FOR_INTERRUPT 1 - -static void Install_tm27_vector(void (*handler)(rtems_vector_number)) -{ - rtems_status_code sc = RTEMS_SUCCESSFUL; - - LPC32XX_SW_INT = 0; - - sc = rtems_interrupt_handler_install( - LPC32XX_IRQ_SW, - "SW", - RTEMS_INTERRUPT_UNIQUE, - (rtems_interrupt_handler) handler, - NULL - ); - assert(sc == RTEMS_SUCCESSFUL); -} - -static void Cause_tm27_intr(void) -{ - LPC32XX_SW_INT = 0x1; -} - -static void Clear_tm27_intr(void) -{ - LPC32XX_SW_INT = 0; - lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_LOWEST); -} - -static void Lower_tm27_intr(void) -{ - bsp_interrupt_vector_enable(LPC32XX_IRQ_SW); - lpc32xx_irq_set_priority(LPC32XX_IRQ_SW, LPC32XX_IRQ_PRIORITY_HIGHEST); -} - -#endif /* __tm27_h */ diff --git a/c/src/lib/libbsp/arm/nds/include/bsp.h b/c/src/lib/libbsp/arm/nds/include/bsp.h deleted file mode 100644 index 8b795e288f..0000000000 --- a/c/src/lib/libbsp/arm/nds/include/bsp.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (c) 2008 by Matthieu Bucchianeri <mbucchia@gmail.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE - */ - -#ifndef LIBBSP_ARM_NDS_H -#define LIBBSP_ARM_NDS_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/bspIo.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -struct rtems_bsdnet_ifconfig; - -int rtems_wifi_driver_attach (struct rtems_bsdnet_ifconfig *config, - int attach); - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "dswifi0" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_wifi_driver_attach - -#define RTC_DRIVER_TABLE_ENTRY \ - { rtc_initialize, NULL, NULL, NULL, NULL, NULL } -extern rtems_device_driver rtc_initialize (rtems_device_major_number major, - rtems_device_minor_number minor, - void *arg); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/arm/nds/irq/irq.h b/c/src/lib/libbsp/arm/nds/irq/irq.h deleted file mode 100644 index aeaccef298..0000000000 --- a/c/src/lib/libbsp/arm/nds/irq/irq.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE - */ - -#ifndef __BSP_IRQ_H_ -#define __BSP_IRQ_H_ - -#ifdef __cplusplus -extern "C" -{ -#endif - -extern void BSP_rtems_irq_mngt_init (void); - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h b/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h deleted file mode 100644 index 5379b13511..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/bsp.h +++ /dev/null @@ -1,53 +0,0 @@ -/** - * @file - * - * @ingroup arm_raspberrypi - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2013 Alan Cudmore - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE - * - */ - -#ifndef LIBBSP_ARM_RASPBERRYPI_BSP_H -#define LIBBSP_ARM_RASPBERRYPI_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> -#include <bsp/raspberrypi.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_GPIO_PIN_COUNT 32 -#define BSP_GPIO_PINS_PER_BANK 32 -#define BSP_GPIO_PINS_PER_SELECT_BANK 10 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_RASPBERRYPI_BSP_H */ - -/** - * @defgroup arm_raspberrypi Raspberry Pi Support - * - * @ingroup bsp_arm - * - * @brief Raspberry Pi support package - * - */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/i2c.h b/c/src/lib/libbsp/arm/raspberrypi/include/i2c.h deleted file mode 100644 index 4a8dbbf2ac..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/i2c.h +++ /dev/null @@ -1,95 +0,0 @@ -/** - * @file i2c.h - * - * @ingroup raspberrypi_i2c - * - * @brief Raspberry Pi specific I2C definitions. - */ - -/* - * Copyright (c) 2014-2015 Andre Marques <andre.lousa.marques at gmail.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_RASPBERRYPI_I2C_H -#define LIBBSP_ARM_RASPBERRYPI_I2C_H - -#include <dev/i2c/i2c.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @name I2C constants. - * - * @{ - */ - -/** - * @brief BSC controller core clock rate in Hz. - * - * This is set to 150 MHz as per the BCM2835 datasheet. - */ -#define BSC_CORE_CLK_HZ 150000000 - -/** - * @brief Default bus clock. - * - * This sets the bus with a 100 kHz clock speed. - */ -#define DEFAULT_BUS_CLOCK 100000 - -/** @} */ - -/** - * @name I2C directives. - * - * @{ - */ - -/** - * @brief Setups the Raspberry Pi GPIO header to activate the BSC I2C bus. - */ -extern void rpi_i2c_init(void); - -/** - * @brief Registers the Raspberry Pi BSC I2C bus with the - * Linux I2C User-Space API. - * - * @param[in] bus_path Path to the bus device file. - * @param[in] bus_clock Bus clock in Hz. - * - * @retval 0 Bus registered successfully. - * @retval <0 Could not register the bus. The return value is a negative - * errno code. - */ -extern int rpi_i2c_register_bus( - const char *bus_path, - uint32_t bus_clock -); - -/** - * @brief Setups the Raspberry Pi BSC I2C bus (located on the GPIO header) - * on the "/dev/i2c" device file, using the default bus clock. - * - * @retval 0 Bus configured and registered successfully. - * @retval <0 See @see rpi_i2c_register_bus(). - */ -static inline int rpi_setup_i2c_bus(void) -{ - rpi_i2c_init(); - - return rpi_i2c_register_bus("/dev/i2c", DEFAULT_BUS_CLOCK); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_RASPBERRYPI_I2C_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h b/c/src/lib/libbsp/arm/raspberrypi/include/irq.h deleted file mode 100644 index 8436c2dfc6..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/irq.h +++ /dev/null @@ -1,70 +0,0 @@ -/** - * @file - * - * @ingroup raspberrypi_interrupt - * - * @brief Interrupt definitions. - */ - -/** - * Copyright (c) 2013 Alan Cudmore - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE - * - */ - -#ifndef LIBBSP_ARM_RASBPERRYPI_IRQ_H -#define LIBBSP_ARM_RASPBERRYPI_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -/** - * @defgroup raspberrypi_interrupt Interrrupt Support - * - * @ingroup arm_raspberrypi - * - * @brief Interrupt support. - */ - -#define BCM2835_INTC_TOTAL_IRQ 64 + 8 - - -#define BCM2835_IRQ_ID_AUX 29 -#define BCM2835_IRQ_ID_SPI_SLAVE 43 -#define BCM2835_IRQ_ID_PWA0 45 -#define BCM2835_IRQ_ID_PWA1 46 -#define BCM2835_IRQ_ID_SMI 48 -#define BCM2835_IRQ_ID_GPIO_0 49 -#define BCM2835_IRQ_ID_GPIO_1 50 -#define BCM2835_IRQ_ID_GPIO_2 51 -#define BCM2835_IRQ_ID_GPIO_3 52 -#define BCM2835_IRQ_ID_I2C 53 -#define BCM2835_IRQ_ID_SPI 54 -#define BCM2835_IRQ_ID_PCM 55 -#define BCM2835_IRQ_ID_UART 57 - - -#define BCM2835_IRQ_ID_TIMER_0 64 -#define BCM2835_IRQ_ID_MAILBOX_0 65 -#define BCM2835_IRQ_ID_DOORBELL_0 66 -#define BCM2835_IRQ_ID_DOORBELL_1 67 -#define BCM2835_IRQ_ID_GPU0_HALTED 68 - -#define BSP_INTERRUPT_VECTOR_MIN (0) -#define BSP_INTERRUPT_VECTOR_MAX (BCM2835_INTC_TOTAL_IRQ - 1) - -#define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ) - - -void raspberrypi_set_exception_handler(Arm_symbolic_exception_name exception, - void (*handler)(void)); - -#endif /* ASM */ -#endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h b/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h deleted file mode 100644 index 45ecc5a2a4..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/mmu.h +++ /dev/null @@ -1,68 +0,0 @@ -/** - * @file - * - * @ingroup rapberrypi_mmu - * - * @brief MMU API. - */ - -/* - * Copyright (c) 2013 Alan Cudmore. - * based on work by: - * Copyright (c) 2009 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * - * http://www.rtems.org/license/LICENSE - * - */ - -#ifndef LIBBSP_ARM_RASPBERRYPI_MMU_H -#define LIBBSP_ARM_RASPBERRYPI_MMU_H - -#include <libcpu/arm-cp15.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup raspberrypi_mmu MMU Support - * - * @ingroup arm_raspberrypi - * - * @brief MMU support. - * - * @{ - */ - -#define RASPBERRYPI_MMU_CLIENT_DOMAIN 15U - -#define RASPBERRYPI_MMU_READ_ONLY \ - ((RASPBERRYPI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ - | ARM_MMU_SECT_DEFAULT) - -#define RASPBERRYPI_MMU_READ_ONLY_CACHED \ - (RASPBERRYPI_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B) - -#define RASPBERRYPI_MMU_READ_WRITE \ - ((RASPBERRYPI_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ - | ARM_MMU_SECT_AP_0 \ - | ARM_MMU_SECT_DEFAULT) - -#define RASPBERRYPI_MMU_READ_WRITE_CACHED \ - (RASPBERRYPI_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_RASPBERRYPI_MMU_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/spi.h b/c/src/lib/libbsp/arm/raspberrypi/include/spi.h deleted file mode 100644 index 1bbbc6d2a4..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/spi.h +++ /dev/null @@ -1,77 +0,0 @@ -/** - * @file spi.h - * - * @ingroup raspberrypi_spi - * - * @brief Raspberry Pi specific SPI definitions. - */ - -/* - * Copyright (c) 2014-2015 Andre Marques <andre.lousa.marques at gmail.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_RASPBERRYPI_SPI_H -#define LIBBSP_ARM_RASPBERRYPI_SPI_H - -#include <rtems/libi2c.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @name SPI constants. - * - * @{ - */ - -/** - * @brief GPU processor core clock rate in Hz. - * - * Unless configured otherwise on a "config.txt" file present on the SD card - * the GPU defaults to 250 MHz. Currently only 250 MHz is supported. - */ - -/* TODO: It would be nice if this value could be probed at startup, probably - * using the Mailbox interface since the usual way of setting this on - * the hardware is through a "config.txt" text file on the SD card. - * Having this setup on the configure.ac script would require changing - * the same setting on two different places. */ -#define GPU_CORE_CLOCK_RATE 250000000 - -/** @} */ - -/** - * @name SPI directives. - * - * @{ - */ - -/** - * @brief Setups the Raspberry Pi SPI bus (located on the GPIO header) - * on the "/dev/spi" device file, and registers the bus on the - * libi2c API. - * - * @param[in] bidirectional_mode If TRUE sets the SPI bus to use 2-wire SPI, - * where the MOSI data line doubles as the - * slave out (SO) and slave in (SI) data lines. - * If FALSE the bus defaults to the usual - * 3-wire SPI, with 2 separate data lines - * (MOSI and MISO). - * - * @retval Returns libi2c bus number. - * @retval <0 Could not register the bus. See @see rtems_libi2c_register_bus(). - */ -extern int rpi_spi_init(bool bidirectional_mode); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_RASPBERRYPI_SPI_H */ diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/usart.h b/c/src/lib/libbsp/arm/raspberrypi/include/usart.h deleted file mode 100644 index 491392b1f7..0000000000 --- a/c/src/lib/libbsp/arm/raspberrypi/include/usart.h +++ /dev/null @@ -1,43 +0,0 @@ -/** - * @file - * - * @ingroup raspberrypi_usart - * - * @brief USART support. - */ - - -/** - * @defgroup raspberrypi_usart USART Support - * - * @ingroup arm_raspberrypi - * - * @brief Universal Synchronous/Asynchronous Receiver/Transmitter (USART) Support - */ - -/* - * Copyright (c) 2013 Alan Cudmore. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE - */ - -#ifndef LIBBSP_ARM_RASPBERRYPI_USART_H -#define LIBBSP_ARM_RASPBERRYPI_USART_H - -#include <libchip/serial.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define USART0_DEFAULT_BAUD 115000 - -extern const console_fns bcm2835_usart_fns; - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_RASPBERRYPI_USART_H */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h deleted file mode 100644 index b670b1174d..0000000000 --- a/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h +++ /dev/null @@ -1,69 +0,0 @@ -/** - * @file - * - * @ingroup arm_realview-pbx-a9 - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H -#define LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_HAS_FRAME_BUFFER 1 - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#include <bsp/default-initial-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_ARM_A9MPCORE_SCU_BASE 0x1f000000 - -#define BSP_ARM_GIC_CPUIF_BASE 0x1f000100 - -#define BSP_ARM_A9MPCORE_GT_BASE 0x1f000200 - -#define BSP_ARM_A9MPCORE_PT_BASE 0x1f000600 - -#define BSP_ARM_GIC_DIST_BASE 0x1f001000 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H */ - -/** - * @defgroup arm_realview-pbx-a9 Realview PBX-A9 - * - * @ingroup bsp_arm - * - * @brief Realview PBX-A9 support package - * - */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h deleted file mode 100644 index 3c9790e9ef..0000000000 --- a/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h +++ /dev/null @@ -1,102 +0,0 @@ -/** - * @file - * - * @ingroup realview-pbx-a9_interrupt - * - * @brief Interrupt definitions. - */ - -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H -#define LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H - -#ifndef ASM - -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#include <bsp/arm-a9mpcore-irq.h> -#include <bsp/arm-gic-irq.h> - -/** - * @defgroup realview-pbx-a9_interrupt Interrrupt Support - * - * @ingroup arm_realview-pbx-a9 - * - * @brief Interrupt support. - */ - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define RVPBXA9_IRQ_WATCHDOG_0 32 -#define RVPBXA9_IRQ_SW_IRQ 33 -#define RVPBXA9_IRQ_TIMER_0_1 36 -#define RVPBXA9_IRQ_TIMER_2_3 37 -#define RVPBXA9_IRQ_GPIO_0 38 -#define RVPBXA9_IRQ_GPIO_1 39 -#define RVPBXA9_IRQ_GPIO_2 40 -#define RVPBXA9_IRQ_RTC 42 -#define RVPBXA9_IRQ_SSP 43 -#define RVPBXA9_IRQ_UART_0 44 -#define RVPBXA9_IRQ_UART_1 45 -#define RVPBXA9_IRQ_UART_2 46 -#define RVPBXA9_IRQ_UART_3 47 -#define RVPBXA9_IRQ_SCI 48 -#define RVPBXA9_IRQ_MCI_A 49 -#define RVPBXA9_IRQ_MCI_B 50 -#define RVPBXA9_IRQ_AACI 51 -#define RVPBXA9_IRQ_KMI0 52 -#define RVPBXA9_IRQ_KMI1 53 -#define RVPBXA9_IRQ_CLCD 55 -#define RVPBXA9_IRQ_DMAC 56 -#define RVPBXA9_IRQ_PWRFAIL 57 -#define RVPBXA9_IRQ_CF_INT 59 -#define RVPBXA9_IRQ_ETHERNET 60 -#define RVPBXA9_IRQ_USB 61 -#define RVPBXA9_IRQ_T1_INT_0 64 -#define RVPBXA9_IRQ_T1_INT_1 65 -#define RVPBXA9_IRQ_T1_INT_2 66 -#define RVPBXA9_IRQ_T1_INT_3 67 -#define RVPBXA9_IRQ_T1_INT_4 68 -#define RVPBXA9_IRQ_T1_INT_5 69 -#define RVPBXA9_IRQ_T1_INT_6 70 -#define RVPBXA9_IRQ_T1_INT_7 71 -#define RVPBXA9_IRQ_WATCHDOG_1 72 -#define RVPBXA9_IRQ_TIMER_4_5 73 -#define RVPBXA9_IRQ_TIMER_6_7 74 -#define RVPBXA9_IRQ_PCI_INTR 80 -#define RVPBXA9_IRQ_P_NMI 81 -#define RVPBXA9_IRQ_P_NINT_0 82 -#define RVPBXA9_IRQ_P_NINT_1 83 -#define RVPBXA9_IRQ_P_NINT_2 84 -#define RVPBXA9_IRQ_P_NINT_3 85 -#define RVPBXA9_IRQ_P_NINT_4 86 -#define RVPBXA9_IRQ_P_NINT_5 87 -#define RVPBXA9_IRQ_P_NINT_6 88 -#define RVPBXA9_IRQ_P_NINT_7 89 - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX 89 - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h deleted file mode 100644 index c336d8d310..0000000000 --- a/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h +++ /dev/null @@ -1,41 +0,0 @@ -/** - * @file - * - * @ingroup realview-pbx-a9_tm27 - * - * @brief GIC tmtests/tm27 support. - */ - - -/** - * @defgroup realview-pbx-a9_tm27 GIC tmtests/tm27 - * - * @ingroup arm_realview-pbx-a9 - * - * @brief GIC tmtests/tm27 support. - */ - -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -#include <bsp/arm-gic-tm27.h> - -#endif /* __tm27_h */ diff --git a/c/src/lib/libbsp/arm/rtl22xx/include/bsp.h b/c/src/lib/libbsp/arm/rtl22xx/include/bsp.h deleted file mode 100644 index 51ed025c6f..0000000000 --- a/c/src/lib/libbsp/arm/rtl22xx/include/bsp.h +++ /dev/null @@ -1,229 +0,0 @@ -/** - * @file - * @ingroup arm_rtl22xx - * @brief Global BSP definitions. - */ - -/* - * Philips LPC22XX/LPC21xx BSP header file - * - * by Ray,Xu <Rayx.cn@gmail.com> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. -*/ -#ifndef LIBBSP_ARM_RTL22XX_BSP_H -#define LIBBSP_ARM_RTL22XX_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -/** - * @defgroup arm_rtl22xx RTL22XX Support - * @ingroup bsp_arm - * @brief RTL22XX Support Package - * @{ - */ - -#include <rtems.h> -#include <rtems/iosupp.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif - -#define BSP_FEATURE_IRQ_EXTENSION - -#define CONFIG_ARM_CLK 60000000L -/* cclk=cco/(2*P) */ -/* cco = cclk*2*P */ - -/** @brief system clk frequecy,<=60Mhz, defined in system configuration */ -#define LPC22xx_Fcclk CONFIG_ARM_CLK - -/* Fcco 156M~320Mhz*/ -/** @brief system clk frequecy,<=60Mhz, defined in system configuration */ -#define LPC22xx_Fcclk CONFIG_ARM_CLK -#define LPC22xx_Fcco LPC22xx_Fcclk * 4 -/** @brief VPB clk frequency,1,1/2,1/4 times of Fcclk */ -#define LPC22xx_Fpclk (LPC22xx_Fcclk /4) *1 - - - -/** - * @name Fcclk range: 10MHz ~ MCU allowed frequency - * @{ - */ - -#define Fcclk_MIN 10000000L -#define Fcclk_MAX 60000000L - -/** @} */ - -/** - * @name Fcco range: 156MHz ~ 320MHz - * @{ - */ - -#define Fcco_MIN 156000000L -#define Fcco_MAX 320000000L - -/** @} */ - -#define PLLFEED_DATA1 0xAA -#define PLLFEED_DATA2 0x55 - -/** - * @name PLL PLLCON register bit descriptions - * @{ - */ - -#define PLLCON_ENABLE_BIT 0 -#define PLLCON_CONNECT_BIT 1 - -/** @} */ - -/** - * @name PLL PLLSTAT register bit descriptions - * @{ - */ - -#define PLLSTAT_ENABLE_BIT 8 -#define PLLSTAT_CONNECT_BIT 9 -#define PLLSTAT_LOCK_BIT 10 - -/** @} */ - -/** - * @name PM Peripheral Type - * @{ - */ - -#define PC_TIMER0 0x2 -#define PC_TIMER1 0x4 -#define PC_UART0 0x8 -#define PC_UART1 0x10 -#define PC_PWM0 0x20 -#define PC_I2C 0x80 -#define PC_SPI0 0x100 -#define PC_RTC 0x200 - -/** @} */ - -/** @brief OSC [Hz] */ -#define FOSC 11059200 -/** @brief Core clk [Hz] */ -#define FCCLK FOSC<<2 - -/** - * @name System Configure - * @{ - */ - -/** @brief osc freq,10MHz~25MHz, change to a real one if needed */ -#define Fosc 11059200 -/** @brief system freq 2^n time of Fosc(1~32) <=60MHZ */ -#define Fcclk (Fosc << 2) -/** @brief CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz */ -#define Fcco (Fcclk <<2) -/** @brief VPB freq only(Fcclk / 4) 1~4 */ -#define Fpclk (Fcclk >>2) * 1 -/* This was M. That is a BAD BAD public constant. I renamed it to - * JOEL_M so it wouldn't conflict with user code. If you can find - * a better name, fix this. But nothing I found uses it. - */ - -/** @} */ - -#define JOEL_M Fcclk / Fosc -#define P_min Fcco_MIN / (2*Fcclk) + 1; -#define P_max Fcco_MAX / (2*Fcclk); - -#define UART_BPS 115200 - -/** @brief Time Precision time [us] */ -#define TIMER_PRECISION 10 - -/** @brief I2C Speed [bit/s] */ -#define I2CSPEED 20000 // 20 Kbit/s - -/** - * @name Uarts buffers size - * @{ - */ - -#define RXBUFSIZE 32 -#define TXBUFSIZE 32 - -/** @} */ - -/** @brief SPI Speed [bit/s] */ -#define SPISPEED 1500000 // 1.5 Mbit/s -/** @brief SPI EEPROM CS pin - * - * (SSEL is not suitable for CS, because is used by SPI module for multi master SPI interface) - */ -#define SPI_CS_PIN P0_13 -#define SPI_CS_PIN_FUNC PINSEL0_bit.SPI_CS_PIN - -/** - * @name Flash definition - * @{ - */ - -//#define RTL22XX_FLASH_SIZE (0x200000-RTL22XX_FLASH_BOOT) // Total area of Flash region in words 8 bit -/** @brief Total area of Flash region in words 8 bit */ -#define RTL22XX_FLASH_SIZE (0x80000-RTL22XX_FLASH_BOOT) -//#define RTL22XX_FLASH_SIZE (0x80000-RTL22XX_FLASH_BOOT) // Total area of Flash region in words 8 bit -#define RTL22XX_FLASH_BEGIN 0x80000000 -/** @brief First 0x8000 bytes reserved for boot loader etc. */ -#define RTL22XX_FLASH_BASE (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT) - -/** @} */ - -/** - * @name SRAM definition - * @{ - */ - -/** @brief Total area of Flash region in words 8 bit */ -#define SRAM_SIZE 0x100000 -/** @brief First 0x8000 bytes reserved for boot loader etc. */ -#define SRAM_BASE 0x81000000 - -/** @} */ - -/** @brief CS8900A definition */ -#define CS8900A_BASE 0x82000000 -/** @brief RTL8019AS definition */ -#define RTL8019AS_BASE 0x82000000 - -struct rtems_bsdnet_ifconfig; -int cs8900_driver_attach (struct rtems_bsdnet_ifconfig *config, - int attaching); - -/** - * @name Network driver configuration - * @{ - */ - -#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0" -#define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach - -/** @} */ - -/* - * Prototypes for methods used across file boundaries in the BSP. - */ -extern void UART0_Ini(void); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* _BSP_H */ diff --git a/c/src/lib/libbsp/arm/shared/comm/uart.h b/c/src/lib/libbsp/arm/shared/comm/uart.h deleted file mode 100644 index 2f69d57a74..0000000000 --- a/c/src/lib/libbsp/arm/shared/comm/uart.h +++ /dev/null @@ -1,161 +0,0 @@ -/** - * @file - * - * @ingroup arm_comm - * - * @brief UART Support - */ - -/* - * This software is Copyright (C) 1998 by T.sqware - all rights limited - * It is provided in to the public domain "as is", can be freely modified - * as far as this copyight notice is kept unchanged, but does not imply - * an endorsement by T.sqware of the product in which it is included. - * - * Copyright (c) Canon Research France SA.] - * Emmanuel Raguet, mailto:raguet@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _BSPUART_H -#define _BSPUART_H - -void BSP_uart_init(int uart, int baud, int hwFlow); -void BSP_uart_set_baud(int aurt, int baud); -void BSP_uart_intr_ctrl(int uart, int cmd); -void BSP_uart_throttle(int uart); -void BSP_uart_unthrottle(int uart); -int BSP_uart_polled_status(int uart); -void BSP_uart_polled_write(int uart, int val); -int BSP_uart_polled_read(int uart); -void BSP_uart_termios_set(int uart, void *ttyp); -int BSP_uart_termios_write_com1(int minor, const char *buf, int len); -int BSP_uart_termios_write_com2(int minor, const char *buf, int len); -void BSP_uart_termios_isr_com1(); -void BSP_uart_termios_isr_com2(); -void BSP_uart_dbgisr_com1(void); -void BSP_uart_dbgisr_com2(void); -extern unsigned BSP_poll_char_via_serial(void); -extern void BSP_output_char_via_serial(int val); -extern int BSPConsolePort; -extern int BSPBaseBaud; -/* - * Command values for BSP_uart_intr_ctrl(), - * values are strange in order to catch errors - * with assert - */ -#define BSP_UART_INTR_CTRL_DISABLE (0) -#define BSP_UART_INTR_CTRL_GDB (0xaa) /* RX only */ -#define BSP_UART_INTR_CTRL_ENABLE (0xbb) /* Normal operations */ -#define BSP_UART_INTR_CTRL_TERMIOS (0xcc) /* RX & line status */ - -/* Return values for uart_polled_status() */ -#define BSP_UART_STATUS_ERROR (-1) /* No character */ -#define BSP_UART_STATUS_NOCHAR (0) /* No character */ -#define BSP_UART_STATUS_CHAR (1) /* Character present */ -#define BSP_UART_STATUS_BREAK (2) /* Break point is detected */ - -/* PC UART definitions */ -#define BSP_UART_COM1 (0) -#define BSP_UART_COM2 (1) - -/* - * Base IO for UART - */ - -#define COM1_BASE_IO 0x3F8 -#define COM2_BASE_IO 0x2F8 - -/* - * Offsets from base - */ - -/* DLAB 0 */ -#define RBR RSRBR /* Rx Buffer Register (read) */ -#define THR RSTHR /* Tx Buffer Register (write) */ -#define IER RSIER /* Interrupt Enable Register */ - -/* DLAB X */ -#define IIR RSIIR /* Interrupt Ident Register (read) */ -#define FCR RSFCR /* FIFO Control Register (write) */ -#define LCR RSLCR /* Line Control Register */ -#define LSR RSLSR /* Line Status Register */ - -/* DLAB 1 */ -#define DLL RSDLL /* Divisor Latch, LSB */ -#define DLM RSDLH /* Divisor Latch, MSB */ - -/* Uart control */ -#define CNT RSCNT /* General Control register */ - -/* - * define bit for CNT - */ -#define UART_ENABLE 1 -#define PAD_ENABLE 2 - -/* - * Interrupt source definition via IIR - */ -#define NO_MORE_INTR 1 -#define TRANSMITTER_HODING_REGISTER_EMPTY 2 -#define RECEIVER_DATA_AVAIL 4 -#define RECEIVER_ERROR 6 -#define CHARACTER_TIMEOUT_INDICATION 12 - -/* - * Bits definition of IER - */ -#define RECEIVE_ENABLE 0x1 -#define TRANSMIT_ENABLE 0x2 -#define RECEIVER_LINE_ST_ENABLE 0x4 -#define INTERRUPT_DISABLE 0x0 - -/* - * Bits definition of the Line Status Register (LSR) - */ -#define DR 0x01 /* Data Ready */ -#define OE 0x02 /* Overrun Error */ -#define PE 0x04 /* Parity Error */ -#define FE 0x08 /* Framing Error */ -#define BI 0x10 /* Break Interrupt */ -#define THRE 0x20 /* Transmitter Holding Register Empty */ -#define TEMT 0x40 /* Transmitter Empty */ -#define ERFIFO 0x80 /* Error receive Fifo */ - -/* - * Bits definition of the Line Control Register (LCR) - */ -#define CHR_5_BITS 0 -#define CHR_6_BITS 1 -#define CHR_7_BITS 2 -#define CHR_8_BITS 3 - -#define WL 0x03 /* Word length mask */ -#define STB 0x04 /* 1 Stop Bit, otherwise 2 Stop Bits */ -#define PEN 0x08 /* Parity Enabled */ -#define EPS 0x10 /* Even Parity Select, otherwise Odd */ -#define SP 0x20 /* Stick Parity */ -#define BCB 0x40 /* Break Control Bit */ -#define DLAB 0x80 /* Enable Divisor Latch Access */ - -/* - * Bits definition of the FIFO Control Register : WD16C552 or NS16550 - */ - -#define FIFO_CTRL 0x01 /* Set to 1 permit access to other bits */ -#define FIFO_EN 0x01 /* Enable the FIFO */ -#define XMIT_RESET 0x04 /* Transmit FIFO Reset */ -#define RCV_RESET 0x02 /* Receive FIFO Reset */ -#define FCR3 0x08 /* do not understand manual! */ - -#define RECEIVE_FIFO_TRIGGER1 0x0 /* trigger recieve interrupt after 1 byte */ -#define RECEIVE_FIFO_TRIGGER4 0x40 /* trigger recieve interrupt after 4 byte */ -#define RECEIVE_FIFO_TRIGGER8 0x80 /* trigger recieve interrupt after 8 byte */ -#define RECEIVE_FIFO_TRIGGER12 0xc0 /* trigger recieve interrupt after 14 byte */ -#define TRIG_LEVEL 0xc0 /* Mask for the trigger level */ - -#endif /* _BSPUART_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/linker-symbols.h b/c/src/lib/libbsp/arm/shared/include/linker-symbols.h deleted file mode 100644 index a4df81ab71..0000000000 --- a/c/src/lib/libbsp/arm/shared/include/linker-symbols.h +++ /dev/null @@ -1,157 +0,0 @@ -/** - * @file - * - * @ingroup arm_linker - * - * @brief Symbols defined in linker command base file. - */ - -/* - * Copyright (c) 2008-2015 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H -#define LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup arm_linker Linker Support - * - * @ingroup arm_shared - * - * @brief Linker support. - * - * @{ - */ - -#ifndef ASM - #define LINKER_SYMBOL(sym) extern char sym []; -#else - #define LINKER_SYMBOL(sym) .extern sym -#endif - -LINKER_SYMBOL(bsp_stack_irq_begin) -LINKER_SYMBOL(bsp_stack_irq_end) -LINKER_SYMBOL(bsp_stack_irq_size) - -LINKER_SYMBOL(bsp_stack_fiq_begin) -LINKER_SYMBOL(bsp_stack_fiq_end) -LINKER_SYMBOL(bsp_stack_irq_size) - -LINKER_SYMBOL(bsp_stack_abt_begin) -LINKER_SYMBOL(bsp_stack_abt_end) -LINKER_SYMBOL(bsp_stack_abt_size) - -LINKER_SYMBOL(bsp_stack_und_begin) -LINKER_SYMBOL(bsp_stack_und_end) -LINKER_SYMBOL(bsp_stack_und_size) - -LINKER_SYMBOL(bsp_stack_svc_begin) -LINKER_SYMBOL(bsp_stack_svc_end) -LINKER_SYMBOL(bsp_stack_svc_size) - -LINKER_SYMBOL(bsp_section_start_begin) -LINKER_SYMBOL(bsp_section_start_end) -LINKER_SYMBOL(bsp_section_start_size) - -LINKER_SYMBOL(bsp_section_vector_begin) -LINKER_SYMBOL(bsp_section_vector_end) -LINKER_SYMBOL(bsp_section_vector_size) - -LINKER_SYMBOL(bsp_section_text_begin) -LINKER_SYMBOL(bsp_section_text_end) -LINKER_SYMBOL(bsp_section_text_size) -LINKER_SYMBOL(bsp_section_text_load_begin) -LINKER_SYMBOL(bsp_section_text_load_end) - -LINKER_SYMBOL(bsp_section_rodata_begin) -LINKER_SYMBOL(bsp_section_rodata_end) -LINKER_SYMBOL(bsp_section_rodata_size) -LINKER_SYMBOL(bsp_section_rodata_load_begin) -LINKER_SYMBOL(bsp_section_rodata_load_end) - -LINKER_SYMBOL(bsp_section_data_begin) -LINKER_SYMBOL(bsp_section_data_end) -LINKER_SYMBOL(bsp_section_data_size) -LINKER_SYMBOL(bsp_section_data_load_begin) -LINKER_SYMBOL(bsp_section_data_load_end) - -LINKER_SYMBOL(bsp_section_fast_text_begin) -LINKER_SYMBOL(bsp_section_fast_text_end) -LINKER_SYMBOL(bsp_section_fast_text_size) -LINKER_SYMBOL(bsp_section_fast_text_load_begin) -LINKER_SYMBOL(bsp_section_fast_text_load_end) - -LINKER_SYMBOL(bsp_section_fast_data_begin) -LINKER_SYMBOL(bsp_section_fast_data_end) -LINKER_SYMBOL(bsp_section_fast_data_size) -LINKER_SYMBOL(bsp_section_fast_data_load_begin) -LINKER_SYMBOL(bsp_section_fast_data_load_end) - -LINKER_SYMBOL(bsp_section_bss_begin) -LINKER_SYMBOL(bsp_section_bss_end) -LINKER_SYMBOL(bsp_section_bss_size) - -LINKER_SYMBOL(bsp_section_work_begin) -LINKER_SYMBOL(bsp_section_work_end) -LINKER_SYMBOL(bsp_section_work_size) - -LINKER_SYMBOL(bsp_section_stack_begin) -LINKER_SYMBOL(bsp_section_stack_end) -LINKER_SYMBOL(bsp_section_stack_size) - -LINKER_SYMBOL(bsp_section_nocache_begin) -LINKER_SYMBOL(bsp_section_nocache_end) -LINKER_SYMBOL(bsp_section_nocache_size) -LINKER_SYMBOL(bsp_section_nocache_load_begin) -LINKER_SYMBOL(bsp_section_nocache_load_end) - -LINKER_SYMBOL(bsp_section_nocachenoload_begin) -LINKER_SYMBOL(bsp_section_nocachenoload_end) -LINKER_SYMBOL(bsp_section_nocachenoload_size) - -LINKER_SYMBOL(bsp_section_nocacheheap_begin) -LINKER_SYMBOL(bsp_section_nocacheheap_end) -LINKER_SYMBOL(bsp_section_nocacheheap_size) - -LINKER_SYMBOL(bsp_vector_table_begin) -LINKER_SYMBOL(bsp_vector_table_end) -LINKER_SYMBOL(bsp_vector_table_size) - -LINKER_SYMBOL(bsp_start_vector_table_begin) -LINKER_SYMBOL(bsp_start_vector_table_end) -LINKER_SYMBOL(bsp_start_vector_table_size) - -LINKER_SYMBOL(bsp_translation_table_base) -LINKER_SYMBOL(bsp_translation_table_end) - -#define BSP_FAST_TEXT_SECTION __attribute__((section(".bsp_fast_text"))) - -#define BSP_FAST_DATA_SECTION __attribute__((section(".bsp_fast_data"))) - -#define BSP_NOCACHE_SECTION __attribute__((section(".bsp_nocache"))) - -#define BSP_NOCACHENOLOAD_SECTION __attribute__((section(".bsp_noload_nocache"))) - -LINKER_SYMBOL(bsp_processor_count) - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/start.h b/c/src/lib/libbsp/arm/shared/include/start.h deleted file mode 100644 index 9df6df4f3f..0000000000 --- a/c/src/lib/libbsp/arm/shared/include/start.h +++ /dev/null @@ -1,135 +0,0 @@ -/** - * @file - * - * @ingroup arm_start - * - * @brief ARM system low level start. - */ - -/* - * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_SHARED_START_H -#define LIBBSP_ARM_SHARED_START_H - -#include <string.h> - -#include <bsp/linker-symbols.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup arm_start System Start - * - * @ingroup arm_shared - * - * @brief ARM system low level start. - * - * @{ - */ - -#define BSP_START_TEXT_SECTION __attribute__((section(".bsp_start_text"))) - -#define BSP_START_DATA_SECTION __attribute__((section(".bsp_start_data"))) - -/** -* @brief System start entry. -*/ -void _start(void); - -/** -* @brief Start entry hook 0. -* -* This hook will be called from the start entry code after all modes and -* stack pointers are initialized but before the copying of the exception -* vectors. -*/ -void bsp_start_hook_0(void); - -/** -* @brief Start entry hook 1. -* -* This hook will be called from the start entry code after copying of the -* exception vectors but before the call to boot_card(). -*/ -void bsp_start_hook_1(void); - -/** - * @brief Similar to standard memcpy(). - * - * The memory areas must be word aligned. Copy code will be executed from the - * stack. If @a dest equals @a src nothing will be copied. - */ -void bsp_start_memcpy(int *dest, const int *src, size_t n); - -/** - * @brief ARM entry point to bsp_start_memcpy(). - */ -void bsp_start_memcpy_arm(int *dest, const int *src, size_t n); - -/** - * @brief Copies all standard sections from the load to the runtime area. - */ -BSP_START_TEXT_SECTION static inline void bsp_start_copy_sections(void) -{ - /* Copy .text section */ - bsp_start_memcpy( - (int *) bsp_section_text_begin, - (const int *) bsp_section_text_load_begin, - (size_t) bsp_section_text_size - ); - - /* Copy .rodata section */ - bsp_start_memcpy( - (int *) bsp_section_rodata_begin, - (const int *) bsp_section_rodata_load_begin, - (size_t) bsp_section_rodata_size - ); - - /* Copy .data section */ - bsp_start_memcpy( - (int *) bsp_section_data_begin, - (const int *) bsp_section_data_load_begin, - (size_t) bsp_section_data_size - ); - - /* Copy .fast_text section */ - bsp_start_memcpy( - (int *) bsp_section_fast_text_begin, - (const int *) bsp_section_fast_text_load_begin, - (size_t) bsp_section_fast_text_size - ); - - /* Copy .fast_data section */ - bsp_start_memcpy( - (int *) bsp_section_fast_data_begin, - (const int *) bsp_section_fast_data_load_begin, - (size_t) bsp_section_fast_data_size - ); -} - -BSP_START_TEXT_SECTION static inline void bsp_start_clear_bss(void) -{ - memset(bsp_section_bss_begin, 0, (size_t) bsp_section_bss_size); -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_SHARED_START_H */ diff --git a/c/src/lib/libbsp/arm/stm32f4/include/bsp.h b/c/src/lib/libbsp/arm/stm32f4/include/bsp.h deleted file mode 100644 index a5e7e60484..0000000000 --- a/c/src/lib/libbsp/arm/stm32f4/include/bsp.h +++ /dev/null @@ -1,56 +0,0 @@ -/** - * @file - * @ingroup arm_stm34f4 - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2012 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -/** - * @defgroup arm_stm32f4 STM32F4 Support - * @ingroup bsp_arm - * @brief STM32f4 Support Package - * @{ - */ - -#ifndef LIBBSP_ARM_STM32F4_BSP_H -#define LIBBSP_ARM_STM32F4_BSP_H - -#include <bspopts.h> -#include <bsp/default-initial-extension.h> - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#define BSP_FEATURE_IRQ_EXTENSION - -#define BSP_ARMV7M_IRQ_PRIORITY_DEFAULT (13 << 4) - -#define BSP_ARMV7M_SYSTICK_PRIORITY (14 << 4) - -#define BSP_ARMV7M_SYSTICK_FREQUENCY STM32F4_HCLK - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_STM32F4_BSP_H */ diff --git a/c/src/lib/libbsp/arm/stm32f4/include/i2c.h b/c/src/lib/libbsp/arm/stm32f4/include/i2c.h deleted file mode 100644 index fa18b1f92f..0000000000 --- a/c/src/lib/libbsp/arm/stm32f4/include/i2c.h +++ /dev/null @@ -1,96 +0,0 @@ -/** - * @file - * @ingroup stm32f4_i2c I2C Support - * @brief I2C-module. - */ - -/* - * Copyright (c) 2013 Christian Mauderer. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -/* The I2C-module can not run with libi2c. The reason for this is, that libi2c - * needs a possibility to generate a stop condition separately. This controller - * wants to generate the condition automatically when sending or receiving data. - */ - -#ifndef LIBBSP_ARM_STM32F4_I2C_H -#define LIBBSP_ARM_STM32F4_I2C_H - -#include <rtems.h> - -#include <bsp/io.h> -#include <bsp/stm32f4.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup stm32f4_i2c I2C Support - * @ingroup arm_stm32f4 - * @brief I2C Module - * @{ - */ - -typedef struct { - /** - * @brief The address of the slave without the read write bit. - * A 7-Bit address should be placed in the bits [6..0] - */ - uint16_t addr; - /** @brief Read (true) or write (false) data */ - bool read; - /** @brief Size of data to read or write */ - size_t len; - /** @brief Buffer for data */ - uint8_t *buf; -} stm32f4_i2c_message; - -typedef struct { - volatile stm32f4_i2c *regs; - size_t index; - rtems_vector_number vector; - rtems_id mutex; - rtems_id task_id; - uint8_t *data; - uint8_t *last; - size_t len; - bool read; - uint8_t addr_with_rw; -} stm32f4_i2c_bus_entry; - -/** @brief Initialise the i2c module. */ -rtems_status_code stm32f4_i2c_init(stm32f4_i2c_bus_entry *e); - -/** @brief Process a i2c message */ -rtems_status_code stm32f4_i2c_process_message( - stm32f4_i2c_bus_entry *e, - stm32f4_i2c_message *msg -); - -/** @brief Set another baud rate than the default one */ -rtems_status_code stm32f4_i2c_set_bitrate( - stm32f4_i2c_bus_entry *e, - uint32_t br -); - -extern stm32f4_i2c_bus_entry *const stm32f4_i2c1; -extern stm32f4_i2c_bus_entry *const stm32f4_i2c2; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_STM32F4_I2C_H */ diff --git a/c/src/lib/libbsp/arm/stm32f4/include/io.h b/c/src/lib/libbsp/arm/stm32f4/include/io.h deleted file mode 100644 index b7f8669cba..0000000000 --- a/c/src/lib/libbsp/arm/stm32f4/include/io.h +++ /dev/null @@ -1,416 +0,0 @@ -/** - * @file - * @ingroup stm32f4_io - * @brief IO support. - */ - -/* - * Copyright (c) 2012 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_STM32F4_IO_H -#define LIBBSP_ARM_STM32F4_IO_H - -#include <stdbool.h> -#include <stdint.h> -#include <bspopts.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup stm32f4_io IO Support - * @ingroup arm_stm32f4 - * @brief IO Support - * @{ - */ - -#define STM32F4_GPIO_PIN(port, index) ((((port) << 4) | (index)) & 0xff) - -#define STM32F4_GPIO_PORT_OF_PIN(pin) (((pin) >> 4) & 0xf) - -#define STM32F4_GPIO_INDEX_OF_PIN(pin) ((pin) & 0xf) - -#ifdef STM32F4_FAMILY_F4XXXX - -/** - * @name Family F4XXXX - * @{ - */ - -typedef enum { - STM32F4_GPIO_MODE_INPUT, - STM32F4_GPIO_MODE_OUTPUT, - STM32F4_GPIO_MODE_AF, - STM32F4_GPIO_MODE_ANALOG -} stm32f4_gpio_mode; - -typedef enum { - STM32F4_GPIO_OTYPE_PUSH_PULL, - STM32F4_GPIO_OTYPE_OPEN_DRAIN -} stm32f4_gpio_otype; - -typedef enum { - STM32F4_GPIO_OSPEED_2_MHZ, - STM32F4_GPIO_OSPEED_25_MHZ, - STM32F4_GPIO_OSPEED_50_MHZ, - STM32F4_GPIO_OSPEED_100_MHZ -} stm32f4_gpio_ospeed; - -typedef enum { - STM32F4_GPIO_NO_PULL, - STM32F4_GPIO_PULL_UP, - STM32F4_GPIO_PULL_DOWN -} stm32f4_gpio_pull; - -typedef enum { - STM32F4_GPIO_AF_SYSTEM = 0, - STM32F4_GPIO_AF_TIM1 = 1, - STM32F4_GPIO_AF_TIM2 = 1, - STM32F4_GPIO_AF_TIM3 = 2, - STM32F4_GPIO_AF_TIM4 = 2, - STM32F4_GPIO_AF_TIM5 = 2, - STM32F4_GPIO_AF_TIM8 = 3, - STM32F4_GPIO_AF_TIM9 = 3, - STM32F4_GPIO_AF_TIM10 = 3, - STM32F4_GPIO_AF_TIM11 = 3, - STM32F4_GPIO_AF_I2C1 = 4, - STM32F4_GPIO_AF_I2C2 = 4, - STM32F4_GPIO_AF_I2C3 = 4, - STM32F4_GPIO_AF_SPI1 = 5, - STM32F4_GPIO_AF_SPI2 = 5, - STM32F4_GPIO_AF_SPI3 = 6, - STM32F4_GPIO_AF_USART1 = 7, - STM32F4_GPIO_AF_USART2 = 7, - STM32F4_GPIO_AF_USART3 = 7, - STM32F4_GPIO_AF_UART4 = 8, - STM32F4_GPIO_AF_UART5 = 8, - STM32F4_GPIO_AF_USART6 = 8, - STM32F4_GPIO_AF_CAN1 = 9, - STM32F4_GPIO_AF_CAN2 = 9, - STM32F4_GPIO_AF_TIM12 = 9, - STM32F4_GPIO_AF_TIM13 = 9, - STM32F4_GPIO_AF_TIM14 = 9, - STM32F4_GPIO_AF_OTG_FS = 10, - STM32F4_GPIO_AF_OTG_HS = 10, - STM32F4_GPIO_AF_ETH = 11, - STM32F4_GPIO_AF_FSMC = 12, - STM32F4_GPIO_AF_OTG_HS_FS = 12, - STM32F4_GPIO_AF_SDIO = 12, - STM32F4_GPIO_AF_DCMI = 13, - STM32F4_GPIO_AF_EVENTOUT = 15 -} stm32f4_gpio_af; - -typedef union { - struct { - uint32_t pin_first : 8; - uint32_t pin_last : 8; - uint32_t mode : 2; - uint32_t otype : 1; - uint32_t ospeed : 2; - uint32_t pupd : 2; - uint32_t output : 1; - uint32_t af : 4; - uint32_t reserved : 4; - } fields; - - uint32_t value; -} stm32f4_gpio_config; - -#define STM32F4_GPIO_CONFIG_TERMINAL \ - { { 0xff, 0xff, 0x3, 0x1, 0x3, 0x3, 0x1, 0xf, 0xf } } - -/** @} */ - -#endif /* STM32F4_FAMILY_F4XXXX */ -#ifdef STM32F4_FAMILY_F10XXX - -/** - * @name Family F10XXX - * @{ - */ - -typedef enum { - STM32F4_GPIO_MODE_INPUT, - STM32F4_GPIO_MODE_OUTPUT_10MHz, - STM32F4_GPIO_MODE_OUTPUT_2MHz, - STM32F4_GPIO_MODE_OUTPUT_50MHz -} stm32f4_gpio_mode; - -typedef enum { - STM32F4_GPIO_CNF_IN_ANALOG = 0, - STM32F4_GPIO_CNF_IN_FLOATING = 1, - STM32F4_GPIO_CNF_IN_PULL_UPDOWN = 2, - - STM32F4_GPIO_CNF_OUT_GPIO_PP = 0, - STM32F4_GPIO_CNF_OUT_GPIO_OD = 1, - STM32F4_GPIO_CNF_OUT_AF_PP = 2, - STM32F4_GPIO_CNF_OUT_AF_OD = 3, -} stm32f4_gpio_cnf; - -typedef enum { - STM32F4_GPIO_REMAP_DONT_CHANGE, - STM32F4_GPIO_REMAP_SPI1_0, - STM32F4_GPIO_REMAP_SPI1_1, - STM32F4_GPIO_REMAP_I2C1_0, - STM32F4_GPIO_REMAP_I2C1_1, - STM32F4_GPIO_REMAP_USART1_0, - STM32F4_GPIO_REMAP_USART1_1, - STM32F4_GPIO_REMAP_USART2_0, - STM32F4_GPIO_REMAP_USART2_1, - STM32F4_GPIO_REMAP_USART3_0, - STM32F4_GPIO_REMAP_USART3_1, - STM32F4_GPIO_REMAP_USART3_3, - STM32F4_GPIO_REMAP_TIM1_0, - STM32F4_GPIO_REMAP_TIM1_1, - STM32F4_GPIO_REMAP_TIM1_3, - STM32F4_GPIO_REMAP_TIM2_0, - STM32F4_GPIO_REMAP_TIM2_1, - STM32F4_GPIO_REMAP_TIM2_2, - STM32F4_GPIO_REMAP_TIM2_3, - STM32F4_GPIO_REMAP_TIM3_0, - STM32F4_GPIO_REMAP_TIM3_2, - STM32F4_GPIO_REMAP_TIM3_3, - STM32F4_GPIO_REMAP_TIM4_0, - STM32F4_GPIO_REMAP_TIM4_1, - STM32F4_GPIO_REMAP_CAN1_0, - STM32F4_GPIO_REMAP_CAN1_2, - STM32F4_GPIO_REMAP_CAN1_3, - STM32F4_GPIO_REMAP_PD01_0, - STM32F4_GPIO_REMAP_PD01_1, - STM32F4_GPIO_REMAP_TIM5CH4_0, - STM32F4_GPIO_REMAP_TIM5CH4_1, - STM32F4_GPIO_REMAP_ADC1_ETRGINJ_0, - STM32F4_GPIO_REMAP_ADC1_ETRGINJ_1, - STM32F4_GPIO_REMAP_ADC1_ETRGREG_0, - STM32F4_GPIO_REMAP_ADC1_ETRGREG_1, - STM32F4_GPIO_REMAP_ADC2_ETRGINJ_0, - STM32F4_GPIO_REMAP_ADC2_ETRGINJ_1, - STM32F4_GPIO_REMAP_ADC2_ETRGREG_0, - STM32F4_GPIO_REMAP_ADC2_ETRGREG_1, - STM32F4_GPIO_REMAP_ETH_0, - STM32F4_GPIO_REMAP_ETH_1, - STM32F4_GPIO_REMAP_CAN2_0, - STM32F4_GPIO_REMAP_CAN2_1, - STM32F4_GPIO_REMAP_MII_RMII_0, - STM32F4_GPIO_REMAP_MII_RMII_1, - STM32F4_GPIO_REMAP_SWJ_0, - STM32F4_GPIO_REMAP_SWJ_1, - STM32F4_GPIO_REMAP_SWJ_2, - STM32F4_GPIO_REMAP_SWJ_4, - STM32F4_GPIO_REMAP_SPI3_0, - STM32F4_GPIO_REMAP_SPI3_1, - STM32F4_GPIO_REMAP_TIM2ITR1_0, - STM32F4_GPIO_REMAP_TIM2ITR1_1, - STM32F4_GPIO_REMAP_PTP_PPS_0, - STM32F4_GPIO_REMAP_PTP_PPS_1, - STM32F4_GPIO_REMAP_TIM15_0, - STM32F4_GPIO_REMAP_TIM15_1, - STM32F4_GPIO_REMAP_TIM16_0, - STM32F4_GPIO_REMAP_TIM16_1, - STM32F4_GPIO_REMAP_TIM17_0, - STM32F4_GPIO_REMAP_TIM17_1, - STM32F4_GPIO_REMAP_CEC_0, - STM32F4_GPIO_REMAP_CEC_1, - STM32F4_GPIO_REMAP_TIM1_DMA_0, - STM32F4_GPIO_REMAP_TIM1_DMA_1, - STM32F4_GPIO_REMAP_TIM9_0, - STM32F4_GPIO_REMAP_TIM9_1, - STM32F4_GPIO_REMAP_TIM10_0, - STM32F4_GPIO_REMAP_TIM10_1, - STM32F4_GPIO_REMAP_TIM11_0, - STM32F4_GPIO_REMAP_TIM11_1, - STM32F4_GPIO_REMAP_TIM13_0, - STM32F4_GPIO_REMAP_TIM13_1, - STM32F4_GPIO_REMAP_TIM14_0, - STM32F4_GPIO_REMAP_TIM14_1, - STM32F4_GPIO_REMAP_FSMC_0, - STM32F4_GPIO_REMAP_FSMC_1, - STM32F4_GPIO_REMAP_TIM67_DAC_DMA_0, - STM32F4_GPIO_REMAP_TIM67_DAC_DMA_1, - STM32F4_GPIO_REMAP_TIM12_0, - STM32F4_GPIO_REMAP_TIM12_1, - STM32F4_GPIO_REMAP_MISC_0, - STM32F4_GPIO_REMAP_MISC_1, -} stm32f4_gpio_remap; - -typedef union { - struct { - uint32_t pin_first : 8; - uint32_t pin_last : 8; - uint32_t mode : 2; - uint32_t cnf : 2; - uint32_t output : 1; - uint32_t remap : 8; - uint32_t reserved : 3; - } fields; - - uint32_t value; -} stm32f4_gpio_config; - -#define STM32F4_GPIO_CONFIG_TERMINAL \ - { { 0xff, 0xff, 0x3, 0x3, 0x1, 0xff, 0x7 } } - -/** @} */ - -#endif /* STM32F4_FAMILY_F10XXX */ - -extern const stm32f4_gpio_config stm32f4_start_config_gpio []; - -void stm32f4_gpio_set_clock(int pin, bool set); - -void stm32f4_gpio_set_config(const stm32f4_gpio_config *config); - -/** - * @brief Sets the GPIO configuration of an array terminated by - * STM32F4_GPIO_CONFIG_TERMINAL. - */ -void stm32f4_gpio_set_config_array(const stm32f4_gpio_config *configs); - -void stm32f4_gpio_set_output(int pin, bool set); - -bool stm32f4_gpio_get_input(int pin); - -#ifdef STM32F4_FAMILY_F4XXXX - -/** - * @name Family F4XXXX - * @{ - */ - -#define STM32F4_PIN_USART(port, idx, altfunc) \ - { \ - { \ - .pin_first = STM32F4_GPIO_PIN(port, idx), \ - .pin_last = STM32F4_GPIO_PIN(port, idx), \ - .mode = STM32F4_GPIO_MODE_AF, \ - .otype = STM32F4_GPIO_OTYPE_PUSH_PULL, \ - .ospeed = STM32F4_GPIO_OSPEED_2_MHZ, \ - .pupd = STM32F4_GPIO_PULL_UP, \ - .af = altfunc \ - } \ - } - -#define STM32F4_PIN_USART1_TX_PA9 STM32F4_PIN_USART(0, 9, STM32F4_GPIO_AF_USART1) -#define STM32F4_PIN_USART1_TX_PB6 STM32F4_PIN_USART(1, 6, STM32F4_GPIO_AF_USART1) -#define STM32F4_PIN_USART1_RX_PA10 STM32F4_PIN_USART(0, 10, STM32F4_GPIO_AF_USART1) -#define STM32F4_PIN_USART1_RX_PB7 STM32F4_PIN_USART(1, 7, STM32F4_GPIO_AF_USART1) - -#define STM32F4_PIN_USART2_TX_PA2 STM32F4_PIN_USART(0, 2, STM32F4_GPIO_AF_USART2) -#define STM32F4_PIN_USART2_TX_PD5 STM32F4_PIN_USART(3, 5, STM32F4_GPIO_AF_USART2) -#define STM32F4_PIN_USART2_RX_PA3 STM32F4_PIN_USART(0, 3, STM32F4_GPIO_AF_USART2) -#define STM32F4_PIN_USART2_RX_PD6 STM32F4_PIN_USART(3, 6, STM32F4_GPIO_AF_USART2) - -#define STM32F4_PIN_USART3_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_USART3) -#define STM32F4_PIN_USART3_TX_PD8 STM32F4_PIN_USART(3, 8, STM32F4_GPIO_AF_USART3) -#define STM32F4_PIN_USART3_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_USART3) -#define STM32F4_PIN_USART3_RX_PD9 STM32F4_PIN_USART(3, 9, STM32F4_GPIO_AF_USART3) - -#define STM32F4_PIN_UART4_TX_PA0 STM32F4_PIN_USART(0, 0, STM32F4_GPIO_AF_UART4) -#define STM32F4_PIN_UART4_TX_PC10 STM32F4_PIN_USART(2, 10, STM32F4_GPIO_AF_UART4) -#define STM32F4_PIN_UART4_RX_PA1 STM32F4_PIN_USART(0, 1, STM32F4_GPIO_AF_UART4) -#define STM32F4_PIN_UART4_RX_PC11 STM32F4_PIN_USART(2, 11, STM32F4_GPIO_AF_UART4) - -#define STM32F4_PIN_UART5_TX_PC12 STM32F4_PIN_USART(2, 12, STM32F4_GPIO_AF_UART5) -#define STM32F4_PIN_UART5_RX_PD2 STM32F4_PIN_USART(3, 2, STM32F4_GPIO_AF_UART5) - -#define STM32F4_PIN_USART6_TX_PC6 STM32F4_PIN_USART(2, 6, STM32F4_GPIO_AF_USART6) -#define STM32F4_PIN_USART6_RX_PC7 STM32F4_PIN_USART(2, 7, STM32F4_GPIO_AF_USART6) - -/** @} */ - -#endif /* STM32F4_FAMILY_F4XXXX */ -#ifdef STM32F4_FAMILY_F10XXX - -/** - * @name Family F10XXX - * @{ - */ - -#define STM32F4_PIN_USART_TX(port, idx, remapvalue) \ - { \ - { \ - .pin_first = STM32F4_GPIO_PIN(port, idx), \ - .pin_last = STM32F4_GPIO_PIN(port, idx), \ - .mode = STM32F4_GPIO_MODE_OUTPUT_2MHz, \ - .cnf = STM32F4_GPIO_CNF_OUT_AF_PP, \ - .output = 0, \ - .remap = remapvalue \ - } \ - } - -#define STM32F4_PIN_USART_RX(port, idx, remapvalue) \ - { \ - { \ - .pin_first = STM32F4_GPIO_PIN(port, idx), \ - .pin_last = STM32F4_GPIO_PIN(port, idx), \ - .mode = STM32F4_GPIO_MODE_INPUT, \ - .cnf = STM32F4_GPIO_CNF_IN_FLOATING, \ - .output = 0, \ - .remap = remapvalue \ - } \ - } - -#define STM32F4_PIN_USART1_TX_MAP_0 STM32F4_PIN_USART_TX(0, 9, STM32F4_GPIO_REMAP_USART1_0) -#define STM32F4_PIN_USART1_RX_MAP_0 STM32F4_PIN_USART_RX(0, 10, STM32F4_GPIO_REMAP_USART1_0) -#define STM32F4_PIN_USART1_TX_MAP_1 STM32F4_PIN_USART_TX(1, 6, STM32F4_GPIO_REMAP_USART1_1) -#define STM32F4_PIN_USART1_RX_MAP_1 STM32F4_PIN_USART_RX(1, 7, STM32F4_GPIO_REMAP_USART1_1) - -#define STM32F4_PIN_USART2_TX_MAP_0 STM32F4_PIN_USART_TX(0, 2, STM32F4_GPIO_REMAP_USART2_0) -#define STM32F4_PIN_USART2_RX_MAP_0 STM32F4_PIN_USART_RX(0, 3, STM32F4_GPIO_REMAP_USART2_0) -#define STM32F4_PIN_USART2_TX_MAP_1 STM32F4_PIN_USART_TX(3, 5, STM32F4_GPIO_REMAP_USART2_1) -#define STM32F4_PIN_USART2_RX_MAP_1 STM32F4_PIN_USART_RX(3, 6, STM32F4_GPIO_REMAP_USART2_1) - -#define STM32F4_PIN_USART3_TX_MAP_0 STM32F4_PIN_USART_TX(1, 10, STM32F4_GPIO_REMAP_USART3_0) -#define STM32F4_PIN_USART3_RX_MAP_0 STM32F4_PIN_USART_RX(1, 11, STM32F4_GPIO_REMAP_USART3_0) -#define STM32F4_PIN_USART3_TX_MAP_1 STM32F4_PIN_USART_TX(2, 10, STM32F4_GPIO_REMAP_USART3_1) -#define STM32F4_PIN_USART3_RX_MAP_1 STM32F4_PIN_USART_RX(2, 11, STM32F4_GPIO_REMAP_USART3_1) -#define STM32F4_PIN_USART3_TX_MAP_3 STM32F4_PIN_USART_TX(3, 8, STM32F4_GPIO_REMAP_USART3_3) -#define STM32F4_PIN_USART3_RX_MAP_3 STM32F4_PIN_USART_RX(3, 9, STM32F4_GPIO_REMAP_USART3_3) - -#define STM32F4_PIN_UART4_TX STM32F4_PIN_USART_TX(2, 10, STM32F4_GPIO_REMAP_DONT_CHANGE) -#define STM32F4_PIN_UART4_RX STM32F4_PIN_USART_RX(2, 11, STM32F4_GPIO_REMAP_DONT_CHANGE) - -#define STM32F4_PIN_UART5_TX STM32F4_PIN_USART_TX(2, 12, STM32F4_GPIO_REMAP_DONT_CHANGE) -#define STM32F4_PIN_UART5_RX STM32F4_PIN_USART_RX(3, 2, STM32F4_GPIO_REMAP_DONT_CHANGE) - -#define STM32F4_PIN_I2C(port, idx, remapvalue) \ - { \ - { \ - .pin_first = STM32F4_GPIO_PIN(port, idx), \ - .pin_last = STM32F4_GPIO_PIN(port, idx), \ - .mode = STM32F4_GPIO_MODE_OUTPUT_2MHz, \ - .cnf = STM32F4_GPIO_CNF_OUT_AF_OD, \ - .output = 0, \ - .remap = remapvalue \ - } \ - } - -#define STM32F4_PIN_I2C1_SCL_MAP0 STM32F4_PIN_I2C(1, 6, STM32F4_GPIO_REMAP_I2C1_0) -#define STM32F4_PIN_I2C1_SDA_MAP0 STM32F4_PIN_I2C(1, 7, STM32F4_GPIO_REMAP_I2C1_0) -#define STM32F4_PIN_I2C1_SCL_MAP1 STM32F4_PIN_I2C(1, 8, STM32F4_GPIO_REMAP_I2C1_1) -#define STM32F4_PIN_I2C1_SDA_MAP1 STM32F4_PIN_I2C(1, 9, STM32F4_GPIO_REMAP_I2C1_1) - -#define STM32F4_PIN_I2C2_SCL STM32F4_PIN_I2C(1, 10, STM32F4_GPIO_REMAP_DONT_CHANGE) -#define STM32F4_PIN_I2C2_SDA STM32F4_PIN_I2C(1, 11, STM32F4_GPIO_REMAP_DONT_CHANGE) - -/** @} */ - -#endif /* STM32F4_FAMILY_F10XXX */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_STM32F4_IO_H */ diff --git a/c/src/lib/libbsp/arm/stm32f4/include/irq.h b/c/src/lib/libbsp/arm/stm32f4/include/irq.h deleted file mode 100644 index 4771f521fe..0000000000 --- a/c/src/lib/libbsp/arm/stm32f4/include/irq.h +++ /dev/null @@ -1,141 +0,0 @@ -/** - * @file - * @ingroup stm32f4_interrupt - * @brief Interrupt definitions. - */ - -/* - * Copyright (c) 2012 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_STM32F4_IRQ_H -#define LIBBSP_ARM_STM32F4_IRQ_H - -#ifndef ASM - -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -/** - * @defgroup stm32f4_interrupt Interrupt Support - * @ingroup arm_stm32f4 - * @brief Interrupt Support - * @{ - */ - -#define STM32F4_IRQ_WWDG 0 -#define STM32F4_IRQ_PVD 1 -#define STM32F4_IRQ_TAMP_STAMP 2 -#define STM32F4_IRQ_RTC_WKUP 3 -#define STM32F4_IRQ_FLASH 4 -#define STM32F4_IRQ_RCC 5 -#define STM32F4_IRQ_EXTI0 6 -#define STM32F4_IRQ_EXTI1 7 -#define STM32F4_IRQ_EXTI2 8 -#define STM32F4_IRQ_EXTI3 9 -#define STM32F4_IRQ_EXTI4 10 -#define STM32F4_IRQ_DMA1_STREAM0 11 -#define STM32F4_IRQ_DMA1_STREAM1 12 -#define STM32F4_IRQ_DMA1_STREAM2 13 -#define STM32F4_IRQ_DMA1_STREAM3 14 -#define STM32F4_IRQ_DMA1_STREAM4 15 -#define STM32F4_IRQ_DMA1_STREAM5 16 -#define STM32F4_IRQ_DMA1_STREAM6 17 -#define STM32F4_IRQ_ADC 18 -#define STM32F4_IRQ_CAN1_TX 19 -#define STM32F4_IRQ_CAN1_RX0 20 -#define STM32F4_IRQ_CAN1_RX1 21 -#define STM32F4_IRQ_CAN1_SCE 22 -#define STM32F4_IRQ_EXTI9_5 23 -#define STM32F4_IRQ_TIM1_BRK_TIM9 24 -#define STM32F4_IRQ_TIM1_UP_TIM10 25 -#define STM32F4_IRQ_TIM1_TRG_COM_TIM11 26 -#define STM32F4_IRQ_TIM1_CC 27 -#define STM32F4_IRQ_TIM2 28 -#define STM32F4_IRQ_TIM3 29 -#define STM32F4_IRQ_TIM4 30 -#define STM32F4_IRQ_I2C1_EV 31 -#define STM32F4_IRQ_I2C1_ER 32 -#define STM32F4_IRQ_I2C2_EV 33 -#define STM32F4_IRQ_I2C2_ER 34 -#define STM32F4_IRQ_SPI1 35 -#define STM32F4_IRQ_SPI2 36 -#define STM32F4_IRQ_USART1 37 -#define STM32F4_IRQ_USART2 38 -#define STM32F4_IRQ_USART3 39 -#define STM32F4_IRQ_EXTI15_10 40 -#define STM32F4_IRQ_RTC_ALARM 41 -#define STM32F4_IRQ_OTG_FS_WKUP 42 -#define STM32F4_IRQ_TIM8_BRK_TIM12 43 -#define STM32F4_IRQ_TIM8_UP_TIM13 44 -#define STM32F4_IRQ_TIM8_TRG_COM_TIM14 45 -#define STM32F4_IRQ_TIM8_CC 46 -#define STM32F4_IRQ_DMA1_STREAM7 47 -#define STM32F4_IRQ_FSMC 48 -#define STM32F4_IRQ_SDIO 49 -#define STM32F4_IRQ_TIM5 50 -#define STM32F4_IRQ_SPI3 51 -#define STM32F4_IRQ_UART4 52 -#define STM32F4_IRQ_UART5 53 -#define STM32F4_IRQ_TIM6_DAC 54 -#define STM32F4_IRQ_TIM7 55 -#define STM32F4_IRQ_DMA2_STREAM0 56 -#define STM32F4_IRQ_DMA2_STREAM1 57 -#define STM32F4_IRQ_DMA2_STREAM2 58 -#define STM32F4_IRQ_DMA2_STREAM3 59 -#define STM32F4_IRQ_DMA2_STREAM4 60 -#define STM32F4_IRQ_ETH 61 -#define STM32F4_IRQ_ETH_WKUP 62 -#define STM32F4_IRQ_CAN2_TX 63 -#define STM32F4_IRQ_CAN2_RX0 64 -#define STM32F4_IRQ_CAN2_RX1 65 -#define STM32F4_IRQ_CAN2_SCE 66 -#define STM32F4_IRQ_OTG_FS 67 -#define STM32F4_IRQ_DMA2_STREAM5 68 -#define STM32F4_IRQ_DMA2_STREAM6 69 -#define STM32F4_IRQ_DMA2_STREAM7 70 -#define STM32F4_IRQ_USART6 71 -#define STM32F4_IRQ_I2C3_EV 72 -#define STM32F4_IRQ_I2C3_ER 73 -#define STM32F4_IRQ_OTG_HS_EP1_OUT 74 -#define STM32F4_IRQ_OTG_HS_EP1_IN 75 -#define STM32F4_IRQ_OTG_HS_WKUP 76 -#define STM32F4_IRQ_OTG_HS 77 -#define STM32F4_IRQ_DCMI 78 -#define STM32F4_IRQ_CRYP 79 -#define STM32F4_IRQ_HASH_RNG 80 -#define STM32F4_IRQ_FPU 81 - -#define STM32F4_IRQ_PRIORITY_VALUE_MIN 0 -#define STM32F4_IRQ_PRIORITY_VALUE_MAX 15 -#define STM32F4_IRQ_PRIORITY_COUNT (STM32F4_IRQ_PRIORITY_VALUE_MAX + 1) -#define STM32F4_IRQ_PRIORITY_HIGHEST STM32F4_IRQ_PRIORITY_VALUE_MIN -#define STM32F4_IRQ_PRIORITY_LOWEST STM32F4_IRQ_PRIORITY_VALUE_MAX - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX 81 - -/** @} */ - -#endif /* LIBBSP_ARM_STM32F4_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/stm32f4/include/usart.h b/c/src/lib/libbsp/arm/stm32f4/include/usart.h deleted file mode 100644 index bac0f6845a..0000000000 --- a/c/src/lib/libbsp/arm/stm32f4/include/usart.h +++ /dev/null @@ -1,45 +0,0 @@ -/** - * @file - * @ingroup stm32f4_usart - * @brief USART (universal synchronous/asynchronous receiver/transmitter) support. - */ - -/* - * Copyright (c) 2012 Sebastian Huber. All rights reserved. - * - * embedded brains GmbH - * Obere Lagerstr. 30 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_STM32F4_USART_H -#define LIBBSP_ARM_STM32F4_USART_H - -#include <libchip/serial.h> - -/** - * @defgroup stm32f4_usart USART Support - * @ingroup arm_stm32f4 - * @brief USART Support - * @{ - */ - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -extern const console_fns stm32f4_usart_fns; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_STM32F4_USART_H */ diff --git a/c/src/lib/libbsp/arm/tms570/include/bsp.h b/c/src/lib/libbsp/arm/tms570/include/bsp.h deleted file mode 100644 index 81bc4cd9cf..0000000000 --- a/c/src/lib/libbsp/arm/tms570/include/bsp.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * @file bsp.h - * - * @ingroup tms570 - * - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com> - * - * Google Summer of Code 2014 at - * Czech Technical University in Prague - * Zikova 1903/4 - * 166 36 Praha 6 - * Czech Republic - * - * Based on LPC24xx and LPC1768 BSP - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_TMS570_BSP_H -#define LIBBSP_ARM_TMS570_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> -#include <bsp/default-initial-extension.h> - -#define BSP_OSCILATOR_CLOCK 8000000 -#define BSP_PLL_OUT_CLOCK 160000000 - -/** Define operation count for Tests */ -#define OPERATION_COUNT 4 - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -struct rtems_bsdnet_ifconfig; - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_TMS570_BSP_H */ diff --git a/c/src/lib/libbsp/arm/tms570/include/irq.h b/c/src/lib/libbsp/arm/tms570/include/irq.h deleted file mode 100644 index 2952582453..0000000000 --- a/c/src/lib/libbsp/arm/tms570/include/irq.h +++ /dev/null @@ -1,160 +0,0 @@ -/** - * @file irq.h - * - * @ingroup tms570 - * - * @brief TMS570 interrupt definitions. - */ - -/* - * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com> - * - * Google Summer of Code 2014 at - * Czech Technical University in Prague - * Zikova 1903/4 - * 166 36 Praha 6 - * Czech Republic - * - * Based on LPC24xx and LPC1768 BSP - * by embedded brains GmbH and others - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_TMS570_IRQ_H -#define LIBBSP_ARM_TMS570_IRQ_H - -#ifndef ASM -#include <rtems.h> -#include <rtems/irq.h> -#include <rtems/irq-extension.h> -#endif - -#define BSP_INTERRUPT_VECTOR_MIN 0U -#define TMS570_IRQ_ESM_HIGH 0 -#define TMS570_IRQ_RESERVED 1 -#define TMS570_IRQ_TIMER_0 2 -#define TMS570_IRQ_TIMER_1 3 -#define TMS570_IRQ_TIMER_2 4 -#define TMS570_IRQ_TIMER_3 5 -#define TMS570_IRQ_RTI_OVERFLOW_0 6 -#define TMS570_IRQ_RTI_OVERFLOW_1 7 -#define TMS570_IRQ_RTI_TIMEBASE 8 -#define TMS570_IRQ_GIO_HIGH 9 -#define TMS570_IRQ_HET_HIGH 10 -#define TMS570_IRQ_HET_TU_HIGH 11 -#define TMS570_IRQ_MIBSPI1_HIGH 12 -#define TMS570_IRQ_SCI_LEVEL_0 13 -#define TMS570_IRQ_ADC1_EVENT 14 -#define TMS570_IRQ_ADC1_GROUP_1 15 -#define TMS570_IRQ_CAN1_HIGH 16 -#define TMS570_IRQ_RESERVED 17 -#define TMS570_IRQ_FLEXRAY_HIGH 18 -#define TMS570_IRQ_CRC_1 19 -#define TMS570_IRQ_ESM_LOW 20 -#define TMS570_IRQ_SSI 21 -#define TMS570_IRQ_PMU 22 -#define TMS570_IRQ_GIO_LOW 23 -#define TMS570_IRQ_HET_LOW 24 -#define TMS570_IRQ_HET_TU_LOW 25 -#define TMS570_IRQ_MIBSPI1_LOW 26 -#define TMS570_IRQ_SCI_LEVEL_1 27 -#define TMS570_IRQ_ADC1_GROUP_2 28 -#define TMS570_IRQ_CAN1_LOW 29 -#define TMS570_IRQ_RESERVED -#define TMS570_IRQ_ADC1_MAG 31 -#define TMS570_IRQ_FLEXRAY_LOW 32 -#define TMS570_IRQ_DMA_FTCA 33 -#define TMS570_IRQ_DMA_LFSA 34 -#define TMS570_IRQ_CAN2_HIGH 35 -#define TMS570_IRQ_DMM_HIGH 36 -#define TMS570_IRQ_MIBSPI3_HIGH 37 -#define TMS570_IRQ_MIBSPI3_LOW 38 -#define TMS570_IRQ_DMA_HBCA 39 -#define TMS570_IRQ_DMA_BTCA 40 -#define TMS570_IRQ_DMA_BERA 41 -#define TMS570_IRQ_CAN2_LOW 42 -#define TMS570_IRQ_DMM_LOW 43 -#define TMS570_IRQ_CAN1_IF3 44 -#define TMS570_IRQ_CAN3_HIGH 45 -#define TMS570_IRQ_CAN2_IF3 46 -#define TMS570_IRQ_FPU 47 -#define TMS570_IRQ_FLEXRAY_TU 48 -#define TMS570_IRQ_SPI4_HIGH 49 -#define TMS570_IRQ_ADC2_EVENT 50 -#define TMS570_IRQ_ADC2_GROUP_1 51 -#define TMS570_IRQ_FLEXRAY_T0C 52 -#define TMS570_IRQ_MIBSPIP5_HIGH 53 -#define TMS570_IRQ_SPI4_LOW 54 -#define TMS570_IRQ_CAN3_LOW 55 -#define TMS570_IRQ_MIBSPIP5_LOW 56 -#define TMS570_IRQ_ADC2_GROUP_2 57 -#define TMS570_IRQ_FLEXRAY_TU_ERROR 58 -#define TMS570_IRQ_ADC2_MAG 59 -#define TMS570_IRQ_CAN3_IF3 60 -#define TMS570_IRQ_FSM_DONE 61 -#define TMS570_IRQ_FLEXRAY_T1C 62 -#define TMS570_IRQ_HET2_LEVEL_0 63 -#define TMS570_IRQ_SCI2_LEVEL_0 64 -#define TMS570_IRQ_HET_TU2_LEVEL_0 65 -#define TMS570_IRQ_IC2_INTERRUPT 66 -#define TMS570_IRQ_HET2_LEVEL_1 73 -#define TMS570_IRQ_SCI2_LEVEL_1 74 -#define TMS570_IRQ_HET_TU2_LEVEL_1 75 -#define TMS570_IRQ_EMAC_MISC 76 -#define TMS570_IRQ_EMAC_TX 77 -#define TMS570_IRQ_EMAC_THRESH 78 -#define TMS570_IRQ_EMAC_RX 79 -#define TMS570_IRQ_HWA_INT_REQ_H 80 -#define TMS570_IRQ_HWA_INT_REQ_H 81 -#define TMS570_IRQ_DCC_DONE_INTERRUPT 82 -#define TMS570_IRQ_DCC2_DONE_INTERRUPT 83 -#define TMS570_IRQ_HWAG1_INT_REQ_L 88 -#define TMS570_IRQ_HWAG2_INT_REQ_L 89 -#define BSP_INTERRUPT_VECTOR_MAX 94 - -#define TMS570_IRQ_PRIORITY_VALUE_MIN 0U -#define TMS570_IRQ_PRIORITY_VALUE_MAX 0U - -#define TMS570_IRQ_PRIORITY_COUNT ( TMS570_IRQ_PRIORITY_VALUE_MAX + 1U ) -#define TMS570_IRQ_PRIORITY_HIGHEST TMS570_IRQ_PRIORITY_VALUE_MIN -#define TMS570_IRQ_PRIORITY_LOWEST TMS570_IRQ_PRIORITY_VALUE_MAX - -#ifndef ASM - -/** - * @brief Set priority of the interrupt vector. - * - * This function is here because of compability. It should set - * priority of the interrupt vector. - * @warning It does not set any priority at HW layer. It is nearly imposible to - * @warning set priority of the interrupt on TMS570 in a nice way. - * @param[in] vector vector of isr - * @param[in] priority new priority assigned to the vector - * @return Void - */ -void tms570_irq_set_priority( - rtems_vector_number vector, - unsigned priority -); - -/** - * @brief Gets priority of the interrupt vector. - * - * This function is here because of compability. It returns priority - * of the isr vector last set by tms570_irq_set_priority function. - * - * @warning It does not return any real priority of the HW layer. - * @param[in] vector vector of isr - * @retval 0 vector is invalid. - * @retval priority priority of the interrupt - */ -unsigned tms570_irq_get_priority( rtems_vector_number vector ); - -#endif /* ASM */ - -/** @} */ - -#endif /* LIBBSP_ARM_TMS570_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/tms570/include/system-clocks.h b/c/src/lib/libbsp/arm/tms570/include/system-clocks.h deleted file mode 100644 index 0e1d1301d4..0000000000 --- a/c/src/lib/libbsp/arm/tms570/include/system-clocks.h +++ /dev/null @@ -1,62 +0,0 @@ -/** - * @file benchmark_timer.c - * - * @ingroup tms570 - * - * @brief System clocks. - */ - -/* - * Copyright (c) 2014 Pavel Pisa <pisa@cmp.felk.cvut.cz> - * - * Czech Technical University in Prague - * Zikova 1903/4 - * 166 36 Praha 6 - * Czech Republic - * - * Based on LPC24xx and LPC1768 BSP - * by embedded brains GmbH and others - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_TMS570_SYSTEM_CLOCKS_H -#define LIBBSP_ARM_TMS570_SYSTEM_CLOCKS_H - -#include <bsp/tms570-rti.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup tms570_clock System Clocks - * - * @ingroup tms570 - * - * @brief System clocks. - * - * @{ - */ - -/** - * @brief Returns current standard timer value in microseconds. - * - * This function uses RTI module free running counter 0 used - * which is used as system tick timebase as well. - */ -static inline unsigned tms570_timer(void) -{ - uint32_t actual_fcr0 = TMS570_RTI.CNT[0].FRCx; - return actual_fcr0; -} - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_TMS570_SYSTEM_CLOCKS_H */ diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/bsp.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/bsp.h deleted file mode 100644 index bf3ad92b96..0000000000 --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/bsp.h +++ /dev/null @@ -1,82 +0,0 @@ -/** - * @file - * @ingroup arm_zynq - * @brief Global BSP definitions. - */ - -/* - * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H -#define LIBBSP_ARM_XILINX_ZYNQ_BSP_H - -#include <bspopts.h> - -#define BSP_FEATURE_IRQ_EXTENSION - -#ifndef ASM - -#include <rtems.h> -#include <rtems/console.h> -#include <rtems/clockdrv.h> - -#include <bsp/default-initial-extension.h> -#include <bsp/start.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup arm_zynq Xilinx-Zynq Support - * @ingroup bsp_arm - * @brief Xilinz-Zynq Board Support Package - * @{ - */ - -#define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000 - -#define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100 - -#define BSP_ARM_A9MPCORE_GT_BASE 0xf8f00200 - -#define BSP_ARM_A9MPCORE_PT_BASE 0xf8f00600 - -#define BSP_ARM_GIC_DIST_BASE 0xf8f01000 - -#define BSP_ARM_L2C_310_BASE 0xf8f02000 - -#define BSP_ARM_L2C_310_ID 0x410000c8 - -/** - * @brief Zynq specific set up of the MMU. - * - * Provide in the application to override - * the defaults in the BSP. Note the defaults do not map in the GP0 and GP1 - * AXI ports. You should add the specific regions that map into your - * PL rather than just open the whole of the GP[01] address space up. - */ -BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void); - -uint32_t zynq_clock_cpu_1x(void); - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */ diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/i2c.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/i2c.h deleted file mode 100644 index 709ea0178e..0000000000 --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/i2c.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_XILINX_ZYNQ_I2C_H -#define LIBBSP_ARM_XILINX_ZYNQ_I2C_H - -#include <bsp/cadence-i2c.h> -#include <bsp/irq.h> -#include <bsp.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -static inline int zynq_register_i2c_0(void) -{ - return i2c_bus_register_cadence( - "/dev/i2c-0", - 0xe0004000, - zynq_clock_cpu_1x(), - ZYNQ_IRQ_I2C_0 - ); -} - -static inline int zynq_register_i2c_1(void) -{ - return i2c_bus_register_cadence( - "/dev/i2c-1", - 0xe0005000, - zynq_clock_cpu_1x(), - ZYNQ_IRQ_I2C_1 - ); -} - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* LIBBSP_ARM_XILINX_ZYNQ_I2C_H */ diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/irq.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/irq.h deleted file mode 100644 index e8288938fe..0000000000 --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/irq.h +++ /dev/null @@ -1,115 +0,0 @@ -/** - * @file - * @ingroup zynq_interrupt - * @brief Interrupt definitions. - */ - -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef LIBBSP_ARM_XILINX_ZYNQ_IRQ_H -#define LIBBSP_ARM_XILINX_ZYNQ_IRQ_H - -#ifndef ASM - -#include <rtems/irq.h> -#include <rtems/irq-extension.h> - -#include <bsp/arm-a9mpcore-irq.h> -#include <bsp/arm-gic-irq.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -/** - * @defgroup zynq_interrupt Interrupt Support - * @ingroup arm_zynq - * @brief Interrupt Support - * @{ - */ - -#define ZYNQ_IRQ_CPU_0 32 -#define ZYNQ_IRQ_CPU_1 33 -#define ZYNQ_IRQ_L2_CACHE 34 -#define ZYNQ_IRQ_OCM 35 -#define ZYNQ_IRQ_PMU_0 37 -#define ZYNQ_IRQ_PMU_1 38 -#define ZYNQ_IRQ_XADC 39 -#define ZYNQ_IRQ_DVI 40 -#define ZYNQ_IRQ_SWDT 41 -#define ZYNQ_IRQ_TTC_0_0 42 -#define ZYNQ_IRQ_TTC_1_0 43 -#define ZYNQ_IRQ_TTC_2_0 44 -#define ZYNQ_IRQ_DMAC_ABORT 45 -#define ZYNQ_IRQ_DMAC_0 46 -#define ZYNQ_IRQ_DMAC_1 47 -#define ZYNQ_IRQ_DMAC_2 48 -#define ZYNQ_IRQ_DMAC_3 49 -#define ZYNQ_IRQ_SMC 50 -#define ZYNQ_IRQ_QUAD_SPI 51 -#define ZYNQ_IRQ_GPIO 52 -#define ZYNQ_IRQ_USB_0 53 -#define ZYNQ_IRQ_ETHERNET_0 54 -#define ZYNQ_IRQ_ETHERNET_0_WAKEUP 55 -#define ZYNQ_IRQ_SDIO_0 56 -#define ZYNQ_IRQ_I2C_0 57 -#define ZYNQ_IRQ_SPI_0 58 -#define ZYNQ_IRQ_UART_0 59 -#define ZYNQ_IRQ_CAN_0 60 -#define ZYNQ_IRQ_FPGA_0 61 -#define ZYNQ_IRQ_FPGA_1 62 -#define ZYNQ_IRQ_FPGA_2 63 -#define ZYNQ_IRQ_FPGA_3 64 -#define ZYNQ_IRQ_FPGA_4 65 -#define ZYNQ_IRQ_FPGA_5 66 -#define ZYNQ_IRQ_FPGA_6 67 -#define ZYNQ_IRQ_FPGA_7 68 -#define ZYNQ_IRQ_TTC_0_1 69 -#define ZYNQ_IRQ_TTC_1_1 70 -#define ZYNQ_IRQ_TTC_2_1 71 -#define ZYNQ_IRQ_DMAC_4 72 -#define ZYNQ_IRQ_DMAC_5 73 -#define ZYNQ_IRQ_DMAC_6 74 -#define ZYNQ_IRQ_DMAC_7 75 -#define ZYNQ_IRQ_USB_1 76 -#define ZYNQ_IRQ_ETHERNET_1 77 -#define ZYNQ_IRQ_ETHERNET_1_WAKEUP 78 -#define ZYNQ_IRQ_SDIO_1 79 -#define ZYNQ_IRQ_I2C_1 80 -#define ZYNQ_IRQ_SPI_1 81 -#define ZYNQ_IRQ_UART_1 82 -#define ZYNQ_IRQ_CAN_1 83 -#define ZYNQ_IRQ_FPGA_8 84 -#define ZYNQ_IRQ_FPGA_9 85 -#define ZYNQ_IRQ_FPGA_10 86 -#define ZYNQ_IRQ_FPGA_11 87 -#define ZYNQ_IRQ_FPGA_12 88 -#define ZYNQ_IRQ_FPGA_13 89 -#define ZYNQ_IRQ_FPGA_14 90 -#define ZYNQ_IRQ_FPGA_15 91 -#define ZYNQ_IRQ_PARITY 92 - -#define BSP_INTERRUPT_VECTOR_MIN 0 -#define BSP_INTERRUPT_VECTOR_MAX 92 - -/** @} */ - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* ASM */ - -#endif /* LIBBSP_ARM_XILINX_ZYNQ_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/tm27.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/tm27.h deleted file mode 100644 index 39b8ecafec..0000000000 --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/tm27.h +++ /dev/null @@ -1,36 +0,0 @@ -/** - * @file - * @ingroup zynq_tm27 - * @brief Interrupt mechanisms for tm27 test. - */ - -/* - * Copyright (c) 2013 embedded brains GmbH. All rights reserved. - * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <info@embedded-brains.de> - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_TMTEST27 -#error "This is an RTEMS internal file you must not include directly." -#endif - -#ifndef __tm27_h -#define __tm27_h - -/** - * @defgroup zynq_tm27 TM27 Test Support - * @ingroup arm_zynq - * @brief Interrupt Mechanisms for tm27 test - */ - -#include <bsp/arm-gic-tm27.h> - -#endif /* __tm27_h */ |