diff options
| author | Ben Gras <beng@rtems.org> | 2014-12-04 18:21:11 +0100 |
|---|---|---|
| committer | Ben Gras <beng@rtems.org> | 2014-12-05 04:05:45 +0100 |
| commit | 13d902945309c59badf6b5f84b88b72fe41f63a7 (patch) | |
| tree | ac02ed62d7f53aa8f623916c0c3e10f837bf894d | |
| parent | 4251b88736400d6367be6a51218eee4277b5e34b (diff) | |
beagle bsp: disable watchdog on am335x
On recent u-boots, the watchdog is turned on / left enabled. The
Beaglebone Black rev. C ships with such a u-boot internally so any
application booting from it must disable the watchdog.
Therefore this change is needed to boot an RTEMS app out-of-the-box
on a BBB Rev C - otherwise the user button must be held during boot
(to bypass the stock uboot) or the internal uboot must be updated. To
allow for a better out-of-the-box experience, we just turn off the
watchdog.
| -rw-r--r-- | c/src/lib/libbsp/arm/beagle/clock.c | 9 | ||||
| -rw-r--r-- | c/src/lib/libcpu/arm/shared/include/am335x.h | 6 |
2 files changed, 15 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/beagle/clock.c b/c/src/lib/libbsp/arm/beagle/clock.c index 13c0607b8e..b2582d11cb 100644 --- a/c/src/lib/libbsp/arm/beagle/clock.c +++ b/c/src/lib/libbsp/arm/beagle/clock.c @@ -251,6 +251,15 @@ beagle_clock_initialize(void) OMAP3_TCLR_OVF_TRG | OMAP3_TCLR_AR | OMAP3_TCLR_ST); /* also initilize the free runnning timer */ omap3_frclock_init(); + +#if IS_AM335X + /* Disable AM335X watchdog */ + mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0xAAAA); + while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ; + mmio_write(AM335X_WDT_BASE+AM335X_WDT_WSPR, 0x5555); + while(mmio_read(AM335X_WDT_BASE+AM335X_WDT_WWPS) != 0) ; +#endif + } static void beagle_clock_at_tick(void) diff --git a/c/src/lib/libcpu/arm/shared/include/am335x.h b/c/src/lib/libcpu/arm/shared/include/am335x.h index 4b5ea73379..265cc36784 100644 --- a/c/src/lib/libcpu/arm/shared/include/am335x.h +++ b/c/src/lib/libcpu/arm/shared/include/am335x.h @@ -274,3 +274,9 @@ /* Control posted mode and functional SW reset */ #define AM335X_TIMER_TCAR2 0x058 /* Second captured value of counter register */ +#define AM335X_WDT_BASE 0x44E35000 + /* Watchdog timer */ +#define AM335X_WDT_WWPS 0x34 + /* Command posted status */ +#define AM335X_WDT_WSPR 0x48 + /* Activate/deactivate sequence */ |