From ddf3ea2bc3e4c60c4daa215a0f275a098ea9e59d Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 26 Mar 2018 12:23:22 +0200 Subject: bsps/csb360: Move libcpu content to bsps This patch is a part of the BSP source reorganization. Update #3285. --- bsps/m68k/csb360/dev/ckinit.c | 125 +++++++++++++++++++ bsps/m68k/csb360/dev/timer.c | 159 +++++++++++++++++++++++++ bsps/m68k/csb360/dev/timerisr.S | 46 +++++++ c/src/lib/libbsp/m68k/csb360/Makefile.am | 7 +- c/src/lib/libcpu/m68k/Makefile.am | 15 --- c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c | 125 ------------------- c/src/lib/libcpu/m68k/mcf5272/timer/timer.c | 159 ------------------------- c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S | 46 ------- 8 files changed, 333 insertions(+), 349 deletions(-) create mode 100644 bsps/m68k/csb360/dev/ckinit.c create mode 100644 bsps/m68k/csb360/dev/timer.c create mode 100644 bsps/m68k/csb360/dev/timerisr.S delete mode 100644 c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c delete mode 100644 c/src/lib/libcpu/m68k/mcf5272/timer/timer.c delete mode 100644 c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S diff --git a/bsps/m68k/csb360/dev/ckinit.c b/bsps/m68k/csb360/dev/ckinit.c new file mode 100644 index 0000000000..3b7b25067c --- /dev/null +++ b/bsps/m68k/csb360/dev/ckinit.c @@ -0,0 +1,125 @@ +/* + * Clock Driver for MCF5272 CPU + * + * This driver initailizes timer1 on the MCF5272 as the + * main system clock + */ + +/* + * Copyright 2004 Cogent Computer Systems + * Author: Jay Monkman + * + * Based on MCF5206 clock driver by + * Victor V. Vengerov + * + * Based on work: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include +#include +#include +#include + +/* + * Clock_driver_ticks is a monotonically increasing counter of the + * number of clock ticks since the driver was initialized. + */ +volatile uint32_t Clock_driver_ticks; + +rtems_isr (*rtems_clock_hook)(rtems_vector_number) = NULL; + +static rtems_isr +Clock_isr (rtems_vector_number vector) +{ + /* Clear pending interrupt... */ + g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; + + /* Announce the clock tick */ + Clock_driver_ticks++; + rtems_clock_tick(); + if (rtems_clock_hook != NULL) { + rtems_clock_hook(vector); + } +} + +void +Clock_exit(void) +{ + uint32_t icr; + + /* disable all timer1 interrupts */ + icr = g_intctrl_regs->icr1; + icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); + icr |= (MCF5272_ICR1_TMR1_IPL(0) | MCF5272_ICR1_TMR1_PI); + g_intctrl_regs->icr1 = icr; + + /* reset timer1 */ + g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; + + /* clear pending */ + g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; +} + +static void +Install_clock(rtems_isr_entry clock_isr) +{ + uint32_t icr; + + Clock_driver_ticks = 0; + + /* Register the interrupt handler */ + set_vector(clock_isr, BSP_INTVEC_TMR1, 1); + + /* Reset timer 1 */ + g_timer_regs->tmr1 = MCF5272_TMR_RST; + g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; + g_timer_regs->tmr1 = MCF5272_TMR_RST; + g_timer_regs->tcn1 = 0; /* reset counter */ + g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; + + /* Set Timer 1 prescaler so that it counts in microseconds */ + g_timer_regs->tmr1 = ( + ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | + MCF5272_TMR_CE_DISABLE | + MCF5272_TMR_ORI | + MCF5272_TMR_FRR | + MCF5272_TMR_CLK_MSTR | + MCF5272_TMR_RST)); + + /* Set the timer timeout value from the BSP config */ + g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1; + + /* Feed system frequency to the timer */ + g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR; + + /* Configure timer1 interrupts */ + icr = g_intctrl_regs->icr1; + icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); + icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI); + g_intctrl_regs->icr1 = icr; + + /* Register the driver exit procedure so we can shutdown */ + atexit(Clock_exit); +} + +rtems_device_driver +Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + Install_clock (Clock_isr); + + return RTEMS_SUCCESSFUL; +} diff --git a/bsps/m68k/csb360/dev/timer.c b/bsps/m68k/csb360/dev/timer.c new file mode 100644 index 0000000000..812310fbea --- /dev/null +++ b/bsps/m68k/csb360/dev/timer.c @@ -0,0 +1,159 @@ +/** + * @file + * + * This module initializes TIMER 2 for on the MCF5272 for benchmarks. + */ + +/* + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov + * + * Based on work: + * Author: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include +#include +#include + +#define TRR2_VAL 65530 + +uint32_t Timer_interrupts; + +bool benchmark_timer_find_average_overhead; + +/* External assembler interrupt handler routine */ +extern rtems_isr timerisr(rtems_vector_number vector); + + +/* benchmark_timer_initialize -- + * Initialize timer 2 for accurate time measurement. + * + * PARAMETERS: + * none + * + * RETURNS: + * none + */ +void +benchmark_timer_initialize(void) +{ + uint32_t icr; + /* Catch timer2 interrupts */ + set_vector(timerisr, BSP_INTVEC_TMR2, 0); + + /* Reset Timer */ + g_timer_regs->tmr2 = MCF5272_TMR_RST; + g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP; + g_timer_regs->tmr2 = MCF5272_TMR_RST; + g_timer_regs->tcn2 = 0; /* reset counter */ + Timer_interrupts = 0; /* Clear timer ISR counter */ + g_timer_regs->ter2 = MCF5272_TER_REF | MCF5272_TER_CAP; + g_timer_regs->trr2 = TRR2_VAL -1 ; + + + /* Set Timer 2 prescaler so that it counts in microseconds */ + g_timer_regs->tmr2 = ( + (((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | + MCF5272_TMR_CE_DISABLE | + MCF5272_TMR_ORI | + MCF5272_TMR_FRR | + MCF5272_TMR_CLK_MSTR | + MCF5272_TMR_RST); + + /* Initialize interrupts for timer2 */ + icr = g_intctrl_regs->icr1; + icr = icr & ~(MCF5272_ICR1_TMR2_MASK | MCF5272_ICR1_TMR2_PI); + icr |= (MCF5272_ICR1_TMR2_IPL(BSP_INTLVL_TMR2) | MCF5272_ICR1_TMR2_PI); + g_intctrl_regs->icr1 = icr; + +} + +/* + * The following controls the behavior of benchmark_timer_read(). + * + * FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count. + * + * AVG_OVEREHAD is the overhead for starting and stopping the timer. It + * is usually deducted from the number returned. + * + * LEAST_VALID is the lowest number this routine should trust. Numbers + * below this are "noise" and zero is returned. + */ + +#define AVG_OVERHEAD 0 /* It typically takes 2.0 microseconds */ + /* (Y countdowns) to start/stop the timer. */ + /* This value is in microseconds. */ +#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ + +/* benchmark_timer_read -- + * Read timer value in microsecond units since timer start. + * + * PARAMETERS: + * none + * + * RETURNS: + * number of microseconds since timer has been started + */ +benchmark_timer_t +benchmark_timer_read( void ) +{ + uint16_t clicks; + uint32_t total; + + /* + * Read the timer and see how many clicks it has been since counter + * rolled over. + */ + clicks = g_timer_regs->tcn2; + + /* Stop Timer... */ + g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP | MCF5272_TMR_RST; + + /* + * Total is calculated by taking into account the number of timer + * overflow interrupts since the timer was initialized and clicks + * since the last interrupts. + */ + + total = (Timer_interrupts * TRR2_VAL) + clicks; + + if ( benchmark_timer_find_average_overhead == 1 ) + return total; /* in XXX microsecond units */ + + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + + /* + * Return the count in microseconds + */ + return (total - AVG_OVERHEAD); +} + +/* benchmark_timer_disable_subtracting_average_overhead -- + * This routine is invoked by the "Check Timer" (tmck) test in the + * RTEMS Timing Test Suite. It makes the benchmark_timer_read routine not + * subtract the overhead required to initialize and read the benchmark + * timer. + * + * PARAMETERS: + * find_flag - bool flag, true if overhead must not be subtracted. + * + * RETURNS: + * none + */ +void +benchmark_timer_disable_subtracting_average_overhead(bool find_flag) +{ + benchmark_timer_find_average_overhead = find_flag; +} diff --git a/bsps/m68k/csb360/dev/timerisr.S b/bsps/m68k/csb360/dev/timerisr.S new file mode 100644 index 0000000000..b9c28921c4 --- /dev/null +++ b/bsps/m68k/csb360/dev/timerisr.S @@ -0,0 +1,46 @@ +/** + * @file + * @brief Handle MCF5272 TIMER2 interrupts. + * + * All code in this routine is pure overhead which can perturb the + * accuracy of RTEMS' timing test suite. + * + * See also: benchmark_timer_read() + * + * To reduce overhead this is best to be the "rawest" hardware interupt + * handler you can write. This should be the only interrupt which can + * occur during the measured time period. + * + * An external counter, Timer_interrupts, is incremented. + */ + +/* + * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia + * Author: Victor V. Vengerov + * + * This file based on work: + * Author: + * David Fiddes, D.J@fiddes.surfaid.org + * http://www.calm.hw.ac.uk/davidf/coldfire/ + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include + +BEGIN_CODE + PUBLIC(timerisr) +SYM(timerisr): + move.l a0, a7@- + move.b # (MCF5272_TER_REF + MCF5272_TER_CAP), (a0) + addq.l #1,SYM(Timer_interrupts) | increment timer value + move.l a7@+, a0 + rte +END_CODE +END diff --git a/c/src/lib/libbsp/m68k/csb360/Makefile.am b/c/src/lib/libbsp/m68k/csb360/Makefile.am index 6670638207..a471d6c2e7 100644 --- a/c/src/lib/libbsp/m68k/csb360/Makefile.am +++ b/c/src/lib/libbsp/m68k/csb360/Makefile.am @@ -35,11 +35,10 @@ libbsp_a_SOURCES += console/console-io.c ../../shared/console-polled.c libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/memProbe.c +libbsp_a_SOURCES += ../../../../../../bsps/m68k/csb360/dev/ckinit.c +libbsp_a_SOURCES += ../../../../../../bsps/m68k/csb360/dev/timer.c +libbsp_a_SOURCES += ../../../../../../bsps/m68k/csb360/dev/timerisr.S libbsp_a_SOURCES += ../../../../../../bsps/m68k/csb360/start/idle-mcf5272.c -libbsp_a_LIBADD = \ - ../../../libcpu/@RTEMS_CPU@/mcf5272/clock.rel \ - ../../../libcpu/@RTEMS_CPU@/mcf5272/timer.rel - include $(top_srcdir)/../../../../automake/local.am include $(srcdir)/../../../../../../bsps/m68k/csb360/headers.am diff --git a/c/src/lib/libcpu/m68k/Makefile.am b/c/src/lib/libcpu/m68k/Makefile.am index 50cc126be0..8a2414f09a 100644 --- a/c/src/lib/libcpu/m68k/Makefile.am +++ b/c/src/lib/libcpu/m68k/Makefile.am @@ -4,21 +4,6 @@ include $(top_srcdir)/../../../automake/compile.am noinst_PROGRAMS = -if mcf5272 -## mcf5272/include -## clock -noinst_PROGRAMS += mcf5272/clock.rel -mcf5272_clock_rel_SOURCES = mcf5272/clock/ckinit.c -mcf5272_clock_rel_CPPFLAGS = $(AM_CPPFLAGS) -mcf5272_clock_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) - -## timer -noinst_PROGRAMS += mcf5272/timer.rel -mcf5272_timer_rel_SOURCES = mcf5272/timer/timer.c mcf5272/timer/timerisr.S -mcf5272_timer_rel_CPPFLAGS = $(AM_CPPFLAGS) -mcf5272_timer_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) -endif - if mcf548x ## mcf548x/include ## mcf548x/mcdma diff --git a/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c b/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c deleted file mode 100644 index 3b7b25067c..0000000000 --- a/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Clock Driver for MCF5272 CPU - * - * This driver initailizes timer1 on the MCF5272 as the - * main system clock - */ - -/* - * Copyright 2004 Cogent Computer Systems - * Author: Jay Monkman - * - * Based on MCF5206 clock driver by - * Victor V. Vengerov - * - * Based on work: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include -#include -#include -#include - -/* - * Clock_driver_ticks is a monotonically increasing counter of the - * number of clock ticks since the driver was initialized. - */ -volatile uint32_t Clock_driver_ticks; - -rtems_isr (*rtems_clock_hook)(rtems_vector_number) = NULL; - -static rtems_isr -Clock_isr (rtems_vector_number vector) -{ - /* Clear pending interrupt... */ - g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; - - /* Announce the clock tick */ - Clock_driver_ticks++; - rtems_clock_tick(); - if (rtems_clock_hook != NULL) { - rtems_clock_hook(vector); - } -} - -void -Clock_exit(void) -{ - uint32_t icr; - - /* disable all timer1 interrupts */ - icr = g_intctrl_regs->icr1; - icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); - icr |= (MCF5272_ICR1_TMR1_IPL(0) | MCF5272_ICR1_TMR1_PI); - g_intctrl_regs->icr1 = icr; - - /* reset timer1 */ - g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; - - /* clear pending */ - g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; -} - -static void -Install_clock(rtems_isr_entry clock_isr) -{ - uint32_t icr; - - Clock_driver_ticks = 0; - - /* Register the interrupt handler */ - set_vector(clock_isr, BSP_INTVEC_TMR1, 1); - - /* Reset timer 1 */ - g_timer_regs->tmr1 = MCF5272_TMR_RST; - g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; - g_timer_regs->tmr1 = MCF5272_TMR_RST; - g_timer_regs->tcn1 = 0; /* reset counter */ - g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; - - /* Set Timer 1 prescaler so that it counts in microseconds */ - g_timer_regs->tmr1 = ( - ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | - MCF5272_TMR_CE_DISABLE | - MCF5272_TMR_ORI | - MCF5272_TMR_FRR | - MCF5272_TMR_CLK_MSTR | - MCF5272_TMR_RST)); - - /* Set the timer timeout value from the BSP config */ - g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1; - - /* Feed system frequency to the timer */ - g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR; - - /* Configure timer1 interrupts */ - icr = g_intctrl_regs->icr1; - icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); - icr |= (MCF5272_ICR1_TMR1_IPL(BSP_INTLVL_TMR1) | MCF5272_ICR1_TMR1_PI); - g_intctrl_regs->icr1 = icr; - - /* Register the driver exit procedure so we can shutdown */ - atexit(Clock_exit); -} - -rtems_device_driver -Clock_initialize( - rtems_device_major_number major, - rtems_device_minor_number minor, - void *pargp -) -{ - Install_clock (Clock_isr); - - return RTEMS_SUCCESSFUL; -} diff --git a/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c b/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c deleted file mode 100644 index 812310fbea..0000000000 --- a/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c +++ /dev/null @@ -1,159 +0,0 @@ -/** - * @file - * - * This module initializes TIMER 2 for on the MCF5272 for benchmarks. - */ - -/* - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov - * - * Based on work: - * Author: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include -#include -#include - -#define TRR2_VAL 65530 - -uint32_t Timer_interrupts; - -bool benchmark_timer_find_average_overhead; - -/* External assembler interrupt handler routine */ -extern rtems_isr timerisr(rtems_vector_number vector); - - -/* benchmark_timer_initialize -- - * Initialize timer 2 for accurate time measurement. - * - * PARAMETERS: - * none - * - * RETURNS: - * none - */ -void -benchmark_timer_initialize(void) -{ - uint32_t icr; - /* Catch timer2 interrupts */ - set_vector(timerisr, BSP_INTVEC_TMR2, 0); - - /* Reset Timer */ - g_timer_regs->tmr2 = MCF5272_TMR_RST; - g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP; - g_timer_regs->tmr2 = MCF5272_TMR_RST; - g_timer_regs->tcn2 = 0; /* reset counter */ - Timer_interrupts = 0; /* Clear timer ISR counter */ - g_timer_regs->ter2 = MCF5272_TER_REF | MCF5272_TER_CAP; - g_timer_regs->trr2 = TRR2_VAL -1 ; - - - /* Set Timer 2 prescaler so that it counts in microseconds */ - g_timer_regs->tmr2 = ( - (((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | - MCF5272_TMR_CE_DISABLE | - MCF5272_TMR_ORI | - MCF5272_TMR_FRR | - MCF5272_TMR_CLK_MSTR | - MCF5272_TMR_RST); - - /* Initialize interrupts for timer2 */ - icr = g_intctrl_regs->icr1; - icr = icr & ~(MCF5272_ICR1_TMR2_MASK | MCF5272_ICR1_TMR2_PI); - icr |= (MCF5272_ICR1_TMR2_IPL(BSP_INTLVL_TMR2) | MCF5272_ICR1_TMR2_PI); - g_intctrl_regs->icr1 = icr; - -} - -/* - * The following controls the behavior of benchmark_timer_read(). - * - * FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count. - * - * AVG_OVEREHAD is the overhead for starting and stopping the timer. It - * is usually deducted from the number returned. - * - * LEAST_VALID is the lowest number this routine should trust. Numbers - * below this are "noise" and zero is returned. - */ - -#define AVG_OVERHEAD 0 /* It typically takes 2.0 microseconds */ - /* (Y countdowns) to start/stop the timer. */ - /* This value is in microseconds. */ -#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ - -/* benchmark_timer_read -- - * Read timer value in microsecond units since timer start. - * - * PARAMETERS: - * none - * - * RETURNS: - * number of microseconds since timer has been started - */ -benchmark_timer_t -benchmark_timer_read( void ) -{ - uint16_t clicks; - uint32_t total; - - /* - * Read the timer and see how many clicks it has been since counter - * rolled over. - */ - clicks = g_timer_regs->tcn2; - - /* Stop Timer... */ - g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP | MCF5272_TMR_RST; - - /* - * Total is calculated by taking into account the number of timer - * overflow interrupts since the timer was initialized and clicks - * since the last interrupts. - */ - - total = (Timer_interrupts * TRR2_VAL) + clicks; - - if ( benchmark_timer_find_average_overhead == 1 ) - return total; /* in XXX microsecond units */ - - if ( total < LEAST_VALID ) - return 0; /* below timer resolution */ - - /* - * Return the count in microseconds - */ - return (total - AVG_OVERHEAD); -} - -/* benchmark_timer_disable_subtracting_average_overhead -- - * This routine is invoked by the "Check Timer" (tmck) test in the - * RTEMS Timing Test Suite. It makes the benchmark_timer_read routine not - * subtract the overhead required to initialize and read the benchmark - * timer. - * - * PARAMETERS: - * find_flag - bool flag, true if overhead must not be subtracted. - * - * RETURNS: - * none - */ -void -benchmark_timer_disable_subtracting_average_overhead(bool find_flag) -{ - benchmark_timer_find_average_overhead = find_flag; -} diff --git a/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S b/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S deleted file mode 100644 index b9c28921c4..0000000000 --- a/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S +++ /dev/null @@ -1,46 +0,0 @@ -/** - * @file - * @brief Handle MCF5272 TIMER2 interrupts. - * - * All code in this routine is pure overhead which can perturb the - * accuracy of RTEMS' timing test suite. - * - * See also: benchmark_timer_read() - * - * To reduce overhead this is best to be the "rawest" hardware interupt - * handler you can write. This should be the only interrupt which can - * occur during the measured time period. - * - * An external counter, Timer_interrupts, is incremented. - */ - -/* - * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia - * Author: Victor V. Vengerov - * - * This file based on work: - * Author: - * David Fiddes, D.J@fiddes.surfaid.org - * http://www.calm.hw.ac.uk/davidf/coldfire/ - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#include -#include - -BEGIN_CODE - PUBLIC(timerisr) -SYM(timerisr): - move.l a0, a7@- - move.b # (MCF5272_TER_REF + MCF5272_TER_CAP), (a0) - addq.l #1,SYM(Timer_interrupts) | increment timer value - move.l a7@+, a0 - rte -END_CODE -END -- cgit v1.2.3