From ddc95ab04bab726f6202990da08676e062dda352 Mon Sep 17 00:00:00 2001 From: Martin Aberg Date: Fri, 15 Jun 2018 12:54:32 +0200 Subject: leon, l2cache: workaround for scrubber This is a workaround for a L2CACHE scrubber corner case described in GR740 User's Manual, Version 1.10, section 43.2.30. The issue affects some version of the L2CACHE. However, since the performance impact of the workaround is marginal, special device probing logic has been avoided. In addition, this update does not affect users who enable the L2CACHE and scrubber before RTEMS is started. --- bsps/sparc/shared/l2c/l2c.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/bsps/sparc/shared/l2c/l2c.c b/bsps/sparc/shared/l2c/l2c.c index 7b17f8b318..89b0f40444 100644 --- a/bsps/sparc/shared/l2c/l2c.c +++ b/bsps/sparc/shared/l2c/l2c.c @@ -241,6 +241,8 @@ /* * L2CACHE ACCESS CONTROL register fields */ +#define L2C_ACCCTRL_DSC (0x1 << L2C_ACCCTRL_DSC_BIT) +#define L2C_ACCCTRL_SH (0x1 << L2C_ACCCTRL_SH_BIT) #define L2C_ACCCTRL_SPLITQ (0x1 << L2C_ACCCTRL_SPLITQ_BIT) #define L2C_ACCCTRL_NHM (0x1 << L2C_ACCCTRL_NHM_BIT) #define L2C_ACCCTRL_BERR (0x1 << L2C_ACCCTRL_BERR_BIT) @@ -251,6 +253,8 @@ #define L2C_ACCCTRL_DBPWS (0x1 << L2C_ACCCTRL_DBPWS_BIT) #define L2C_ACCCTRL_SPLIT (0x1 << L2C_ACCCTRL_SPLIT_BIT) +#define L2C_ACCCTRL_DSC_BIT 14 +#define L2C_ACCCTRL_SH_BIT 13 #define L2C_ACCCTRL_SPLITQ_BIT 10 #define L2C_ACCCTRL_NHM_BIT 9 #define L2C_ACCCTRL_BERR_BIT 8 @@ -672,6 +676,10 @@ STATIC INLINE int l2cache_reg_scrub_enable(int delay) { struct l2cache_priv *priv = l2cachepriv; + unsigned int accc = REG_READ(&priv->regs->access_control); + REG_WRITE(&priv->regs->access_control, + accc | L2C_ACCCTRL_DSC | L2C_ACCCTRL_SH); + unsigned int ctrl = REG_READ(&priv->regs->scrub_control_status); REG_WRITE(&priv->regs->scrub_delay, (delay << L2C_SCRUB_DEL_BIT) & L2C_SCRUB_DEL); -- cgit v1.2.3