From d2d0296138aced3ccc0828dc1a109b1df61f1bbb Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 2 May 2013 17:40:45 +0200 Subject: bsps/arm: Add arm_cp15_get_min_cache_line_size() --- c/src/lib/libcpu/arm/shared/include/arm-cp15.h | 32 +++++++++++++++++++++----- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h index 017c0e3cd0..7f7249f311 100644 --- a/c/src/lib/libcpu/arm/shared/include/arm-cp15.h +++ b/c/src/lib/libcpu/arm/shared/include/arm-cp15.h @@ -7,12 +7,13 @@ */ /* - * Copyright (c) 2009, 2010 - * embedded brains GmbH - * Obere Lagerstr. 30 - * D-82178 Puchheim - * Germany - * + * Copyright (c) 2009-2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -443,6 +444,25 @@ static inline uint32_t arm_cp15_get_cache_type(void) return val; } +static inline uint32_t arm_cp15_get_min_cache_line_size(void) +{ + uint32_t mcls = 0; + uint32_t ct = arm_cp15_get_cache_type(); + uint32_t format = (ct >> 29) & 0x7U; + + if (format == 0x4) { + mcls = (1U << (ct & 0xf)) * 4; + } else if (format == 0x0) { + uint32_t mask = (1U << 12) - 1; + uint32_t dcls = (ct >> 12) & mask; + uint32_t icls = ct & mask; + + mcls = dcls <= icls ? dcls : icls; + } + + return mcls; +} + static inline void arm_cp15_cache_invalidate(void) { ARM_SWITCH_REGISTERS; -- cgit v1.2.3