From ca4a4cfb6487ef61fadd71952461a50ddc306819 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 20 Apr 2012 13:14:58 +0200 Subject: bsp/genmcf548x: Fix BSP options --- c/src/lib/libbsp/m68k/genmcf548x/configure.ac | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/c/src/lib/libbsp/m68k/genmcf548x/configure.ac b/c/src/lib/libbsp/m68k/genmcf548x/configure.ac index 1d7d1b1b91..c08987d713 100644 --- a/c/src/lib/libbsp/m68k/genmcf548x/configure.ac +++ b/c/src/lib/libbsp/m68k/genmcf548x/configure.ac @@ -26,6 +26,7 @@ RTEMS_BSPOPTS_HELP([BSP_CPU_CLOCK_SPEED], [The bus clock to be used inside the mcf54xx]) RTEMS_BSPOPTS_SET([M5484FIREENGINE],[m5484FireEngine],[1]) +RTEMS_BSPOPTS_SET([M5484FIREENGINE],[*],[]) RTEMS_BSPOPTS_HELP([M5484FIREENGINE], [If defined, use custom settings for the m5484FireEngine BSP.]) @@ -34,13 +35,13 @@ RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[*],[9600]) RTEMS_BSPOPTS_HELP([BSP_CONSOLE_BAUD],[initial baudrate for UARTs]) RTEMS_BSPOPTS_SET([HAS_DBUG],[COBRA5475],[1]) -RTEMS_BSPOPTS_SET([HAS_DBUG],[*],[0]) +RTEMS_BSPOPTS_SET([HAS_DBUG],[*],[]) RTEMS_BSPOPTS_HELP([HAS_DBUG], [If defined, we will not boot from RESET, but from Freescale DBug monitor.]) RTEMS_BSPOPTS_SET([HAS_LOW_LEVEL_INIT],[m5484FireEngine],[1]) -RTEMS_BSPOPTS_SET([HAS_LOW_LEVEL_INIT],[*],[0]) -RTEMS_BSPOPTS_HELP([HAS_DBUG], +RTEMS_BSPOPTS_SET([HAS_LOW_LEVEL_INIT],[*],[]) +RTEMS_BSPOPTS_HELP([HAS_LOW_LEVEL_INIT], [If defined, we will do all the low level init of the chip (like bus/memory...).]) RTEMS_BSP_CLEANUP_OPTIONS(0, 1) -- cgit v1.2.3 From 6d136ed9dd9eb3a5929d18e5c7f37b5265a35f11 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 20 Apr 2012 14:03:39 +0200 Subject: bsp/genmcf548x: Enable FPU in BSP startup code --- c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c b/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c index 743ad4c9ad..9de5d56861 100644 --- a/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/genmcf548x/startup/bspstart.c @@ -70,8 +70,10 @@ extern char WorkAreaBase []; #define m68k_set_acr3(_acr3) __asm__ volatile ("movec %0,#0x0007" : : "d" (_acr3)) /* - * Set initial cacr mode, mainly enables branch/intruction/data cache and - * switch off FPU. + * Set initial CACR mode, mainly enables branch/instruction/data cache. The + * FPU must be switched on in the BSP startup code since the + * _Thread_Start_multitasking() will restore the floating-point context of the + * initialization task if necessary. */ static const uint32_t BSP_CACR_INIT = MCF548X_CACR_DEC /* enable data cache */ | MCF548X_CACR_BEC /* enable branch cache */ @@ -80,8 +82,7 @@ static const uint32_t BSP_CACR_INIT = MCF548X_CACR_DEC /* enable data cache */ /* set data cache mode to write-through */ | MCF548X_CACR_DESB /* enable data store buffer */ | MCF548X_CACR_DDSP /* data access only in supv. mode */ - | MCF548X_CACR_IDSP /* instr. access only in supv. mode */ - | MCF548X_CACR_DF; /* disable FPU */ + | MCF548X_CACR_IDSP; /* instr. access only in supv. mode */ /* * CACR maintenance functions @@ -273,15 +274,6 @@ void bsp_start( void ) /* Initialize CACR shadow register */ _CPU_cacr_shadow = BSP_CACR_INIT; - /* Switch on FPU in CACR shadow register if necessary */ - if ((Configuration_POSIX_API.number_of_initialization_threads > 0) || - ((Configuration_RTEMS_API.number_of_initialization_tasks > 0) && - (Configuration_RTEMS_API.User_initialization_tasks_table - ->attribute_set & RTEMS_FLOATING_POINT) != 0) - ) { - _CPU_cacr_shadow &= ~MCF548X_CACR_DF; - } - /* * Load the shadow variable of CACR with initial mode and write it to the * CACR. Interrupts are still disabled, so there is no need for surrounding -- cgit v1.2.3