From b3c624d8886db6e791babe5e0d4f8b28992e000a Mon Sep 17 00:00:00 2001
From: shashvatjain <shashvatjain2002@gmail.com>
Date: Thu, 8 Nov 2018 06:17:49 +0530
Subject: arm/altera cyclone v: Update Doxygen (GCI 2018)

---
 bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h  |  9 +++++++++
 bsps/arm/altera-cyclone-v/include/bsp.h        | 18 ++++++++++++++++++
 bsps/arm/altera-cyclone-v/include/bsp/hwlib.h  | 16 ++++++++++++++++
 bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h | 17 +++++++++++++++++
 bsps/arm/altera-cyclone-v/include/bsp/irq.h    | 22 +++++++++++++++++++++-
 5 files changed, 81 insertions(+), 1 deletion(-)

diff --git a/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h b/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
index 650974751e..529d19980f 100644
--- a/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
+++ b/bsps/arm/altera-cyclone-v/i2c/i2cdrv-config.h
@@ -1,3 +1,12 @@
+/**
+ * @file
+ *
+ * @ingroup altera-cyclone-v_i2c
+ *
+ * @brief Drivers for I2C
+ *
+ */
+
 /*
  * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
  *
diff --git a/bsps/arm/altera-cyclone-v/include/bsp.h b/bsps/arm/altera-cyclone-v/include/bsp.h
index 860a15c5bf..92bc95531b 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp.h
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * @ingroup arm_altera-cyclone-v
+ *
+ * @brief Global BSP definitions.
+ */
+
 /*
  * Copyright (c) 2013, 2018 embedded brains GmbH.  All rights reserved.
  *
@@ -50,3 +58,13 @@ extern "C" {
 #endif /* ASM */
 
 #endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H */
+
+/**
+ * @defgroup arm_altera-cyclone-v Altera Cyclone V Support
+ *
+ * @ingroup bsp_arm
+ *
+ * @brief Altera Cyclone V support package.
+ *
+ * @{
+ */
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h b/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
index aba7e877c4..8aad5d7b32 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/hwlib.h
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * @ingroup altera-cyclone-v_hwlib
+ *
+ * @brief The type definition for status codes returned by the HWLIB.
+ */
+
 /******************************************************************************
 *
 * Copyright 2013 Altera Corporation. All Rights Reserved.
@@ -48,6 +56,14 @@ extern "C"
 {
 #endif  /* __cplusplus */
 
+/**
+ * @defgroup altera-cyclone-v_hwlib Hwlib
+ *
+ * @ingroup arm_altera-cyclone-v
+ *
+ * @brief The type definition for status codes returned by the HWLIB.
+ */
+
 /*!
  * The type definition for status codes returned by the HWLIB.
  */
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h b/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
index 9a4411d637..114d8a6219 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/i2cdrv.h
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * @ingroup altera-cyclone-v_i2c
+ *
+ * @brief Drivers for I2C
+ */
+
 /*
  * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
  *
@@ -21,6 +29,15 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @defgroup altera-cyclone-v_i2c I2C Support
+ *
+ * @ingroup arm_altera-cyclone-v
+ *
+ * @brief I2C Support
+ *
+ */
+
 rtems_device_driver i2cdrv_initialize(
   rtems_device_major_number major,
   rtems_device_minor_number minor,
diff --git a/bsps/arm/altera-cyclone-v/include/bsp/irq.h b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
index c136500415..ad0e4dfd61 100644
--- a/bsps/arm/altera-cyclone-v/include/bsp/irq.h
+++ b/bsps/arm/altera-cyclone-v/include/bsp/irq.h
@@ -1,3 +1,11 @@
+/**
+ * @file
+ *
+ * @ingroup altera-cyclone-v_interrupt
+ *
+ * @brief Interrupt definitions.
+ */
+
 /*
  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
  *
@@ -28,6 +36,18 @@
 extern "C" {
 #endif /* __cplusplus */
 
+/**
+ * @defgroup altera-cyclone-v_interrupt Interrupt Support
+ *
+ * @ingroup arm_altera-cyclone-v
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief Interrupt Support for Altera Cyclone V
+ *
+ * @{
+ */
+
 /* Use interrupt IDs as defined in alt_interrupt_common.h */
 #define BSP_INTERRUPT_VECTOR_MIN ALT_INT_INTERRUPT_SGI0
 #define BSP_INTERRUPT_VECTOR_MAX ALT_INT_INTERRUPT_RAM_ECC_UNCORRECTED_IRQ
@@ -38,4 +58,4 @@ extern "C" {
 
 #endif /* ASM */
 
-#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H */
\ No newline at end of file
+#endif /* LIBBSP_ARM_ALTERA_CYCLONE_V_IRQ_H */
-- 
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