From 99fcba89731bc5fd460e8e4498fbe761fa1eed3d Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 2 Apr 2012 11:06:34 +0200 Subject: bsp/gen83xx: Support cache BSP options --- c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c | 7 +++++-- c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c | 2 +- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c index 9a42c50e4b..3a9772d165 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c @@ -96,11 +96,11 @@ void bsp_start( void) * Enable instruction and data caches. Do not force writethrough mode. */ -#if BSP_INSTRUCTION_CACHE_ENABLED +#ifdef BSP_INSTRUCTION_CACHE_ENABLED rtems_cache_enable_instruction(); #endif -#if BSP_DATA_CACHE_ENABLED +#ifdef BSP_DATA_CACHE_ENABLED rtems_cache_enable_data(); #endif @@ -130,6 +130,9 @@ void bsp_start( void) } /* Initialize exception handler */ +#ifndef BSP_DATA_CACHE_ENABLED + ppc_exc_cache_wb_check = 0; +#endif sc = ppc_exc_initialize( PPC_INTERRUPT_DISABLE_MASK_DEFAULT, interrupt_stack_start, diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c index 4c7ced0259..f7da7d2dba 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c @@ -149,7 +149,7 @@ void cpu_init( void) clear_mmu_regs(); /* Clear caches */ - PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ILOCK | HID0_DLOCK); + PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ILOCK | HID0_DLOCK | HID0_ICE | HID0_DCE); PPC_SET_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI); PPC_CLEAR_SPECIAL_PURPOSE_REGISTER_BITS( HID0, HID0_ICFI | HID0_DCI); -- cgit v1.2.3