From 7ed8ad0adbb2b6a6e844acd422765cecc1e35957 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Wed, 19 Jul 2017 15:54:16 +0200 Subject: bsps/sparc: Fix cache support Fix infinite loop in rtems_invalidate_multiple_instruction_lines(). Implement this function. Close #3080. --- c/src/lib/libcpu/sparc/cache/cache_.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/c/src/lib/libcpu/sparc/cache/cache_.h b/c/src/lib/libcpu/sparc/cache/cache_.h index f7ff00c0b0..3d4ea69f8b 100644 --- a/c/src/lib/libcpu/sparc/cache/cache_.h +++ b/c/src/lib/libcpu/sparc/cache/cache_.h @@ -19,18 +19,23 @@ #define CPU_INSTRUCTION_CACHE_ALIGNMENT 0 +#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS + static inline void _CPU_cache_invalidate_entire_instruction ( void ) { __asm__ volatile ("flush"); } -/* XXX these need to be addressed */ - -static inline void _CPU_cache_invalidate_1_instruction_line ( - const void * i_addr ) +static inline void _CPU_cache_invalidate_instruction_range( + const void *i_addr, + size_t n_bytes +) { + __asm__ volatile ("flush"); } +/* XXX these need to be addressed */ + static inline void _CPU_cache_freeze_instruction ( void ) { } -- cgit v1.2.3