From 6f034c18e80f0b17c349a1ddbf072bc2cb0b5eaa Mon Sep 17 00:00:00 2001 From: Christian Mauderer Date: Mon, 8 May 2023 15:38:00 +0200 Subject: imx_iomux: Don't set reserved bits in PAD_CTL On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips, like the i.MXRT1166, they are a domain write protection. Setting them to 1 can have unexpected side effects. The device tree uses these bits for some flags. Make sure that they are not accidentally written to some value. --- bsps/arm/shared/pins/imx_iomux.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/bsps/arm/shared/pins/imx_iomux.c b/bsps/arm/shared/pins/imx_iomux.c index 1ff4186360..e6c604481a 100644 --- a/bsps/arm/shared/pins/imx_iomux.c +++ b/bsps/arm/shared/pins/imx_iomux.c @@ -307,7 +307,17 @@ int imx_iomux_configure_pins(const void *fdt, uint32_t cfgxref) WR4(sc, cfg->mux_reg, cfg->mux_val | sion); iomux_configure_input(sc, cfg->input_reg, cfg->input_val); if ((cfg->padconf_val & PADCONF_NONE) == 0) +#ifndef __rtems__ WR4(sc, cfg->padconf_reg, cfg->padconf_val); +#else /* __rtems__ */ + /* + * Need to mask the flags. On (for example) i.MXRT1166 + * they are used for domain write protection. On other + * i.MX* these are Reserved. + */ + WR4(sc, cfg->padconf_reg, cfg->padconf_val + & ~(PADCONF_SION | PADCONF_NONE)); +#endif /* __rtems__ */ #ifndef __rtems__ if (bootverbose) { char name[32]; -- cgit v1.2.3