From 5186b55180b5404ecd1ad1ed70e73fb70ed15f27 Mon Sep 17 00:00:00 2001 From: WeiY Date: Mon, 15 Jul 2013 23:31:12 +0800 Subject: smpatomic test case update --- testsuites/smptests/smpatomic01/tasks.c | 33 ++++++--------- testsuites/smptests/smpatomic02/tasks.c | 35 ++++++--------- testsuites/smptests/smpatomic03/tasks.c | 44 ++++++++----------- testsuites/smptests/smpatomic04/tasks.c | 44 ++++++++----------- testsuites/smptests/smpatomic05/tasks.c | 44 ++++++++----------- testsuites/smptests/smpatomic06/tasks.c | 44 ++++++++----------- testsuites/smptests/smpatomic07/tasks.c | 75 +++++++++++++++------------------ 7 files changed, 133 insertions(+), 186 deletions(-) diff --git a/testsuites/smptests/smpatomic01/tasks.c b/testsuites/smptests/smpatomic01/tasks.c index 36bb431dca..28afad9d9f 100644 --- a/testsuites/smptests/smpatomic01/tasks.c +++ b/testsuites/smptests/smpatomic01/tasks.c @@ -18,20 +18,21 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_LOAD_NO_BARRIER(NAME, TYPE, cpuid, mem_bar) \ +#define ATOMIC_LOAD_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar) \ { \ - Atomic_##TYPE t = (Atomic_##TYPE)-1, a = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ unsigned int i; \ - a = _Atomic_Load_##NAME(&t, mem_bar); \ - rtems_test_assert(a == t); \ for (i = 0; i < TEST_REPEAT; i++){ \ - t = (Atomic_##TYPE)rand(); \ + b = (R_TYPE)rand(); \ + atomic_init(&t, b); \ a = _Atomic_Load_##NAME(&t, mem_bar); \ - rtems_test_assert(a == t); \ + rtems_test_assert(a == b); \ } \ - locked_printf("\nCPU%d _Atomic_Load_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Load_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,22 +52,14 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_LOAD_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_LOAD_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_LOAD_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_LOAD_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_LOAD_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_LOAD_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_LOAD_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_LOAD_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_LOAD_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_LOAD_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_LOAD_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_LOAD_NO_BARRIER(ptr, Pointer, unsigned long, cpu_num, ATOMIC_ORDER_ACQUIRE); // ATOMIC_LOAD_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic02/tasks.c b/testsuites/smptests/smpatomic02/tasks.c index a85f58cd1e..8ece4610ce 100644 --- a/testsuites/smptests/smpatomic02/tasks.c +++ b/testsuites/smptests/smpatomic02/tasks.c @@ -18,20 +18,21 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_STORE_NO_BARRIER(NAME, TYPE, cpuid, mem_bar) \ +#define ATOMIC_STORE_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar) \ { \ - Atomic_##TYPE t = (Atomic_##TYPE)-1, a = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ unsigned int i; \ - _Atomic_Store_##NAME(&a, t, mem_bar); \ - rtems_test_assert(a == t); \ for (i = 0; i < TEST_REPEAT; i++){ \ - t = (Atomic_##TYPE)rand(); \ - _Atomic_Store_##NAME(&a, t, mem_bar); \ - rtems_test_assert(a == t); \ + b = (R_TYPE)rand(); \ + _Atomic_Store_##NAME(&t, b, mem_bar); \ + a = _Atomic_Load_##NAME(&t, mem_bar); \ + rtems_test_assert(a == b); \ } \ - locked_printf("\nCPU%d _Atomic_Store_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Store_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,22 +52,14 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_STORE_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_STORE_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_STORE_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_STORE_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_STORE_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_STORE_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test release barrier */ - ATOMIC_STORE_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_STORE_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_STORE_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_STORE_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_STORE_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_STORE_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_STORE_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic03/tasks.c b/testsuites/smptests/smpatomic03/tasks.c index fdf81ab1fc..edc9a637ea 100644 --- a/testsuites/smptests/smpatomic03/tasks.c +++ b/testsuites/smptests/smpatomic03/tasks.c @@ -18,20 +18,24 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_FETCH_ADD_NO_BARRIER(NAME, TYPE, cpuid, mem_bar)\ +#define ATOMIC_FETCH_ADD_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar)\ { \ - Atomic_##TYPE t = 0, a = 0, b = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ + R_TYPE c; \ unsigned int i; \ for (i = 0; i < TEST_REPEAT; i++){ \ - a = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - b = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - t = a; \ + a = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + b = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ _Atomic_Fetch_add_##NAME(&t, b, mem_bar); \ - rtems_test_assert(t == (Atomic_##TYPE)(a + b)); \ + c = _Atomic_Load_##NAME(&t, mem_bar); \ + rtems_test_assert(c == (R_TYPE)(a + b)); \ } \ - locked_printf("\nCPU%d _Atomic_Fetch_add_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Fetch_add_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,31 +55,19 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_FETCH_ADD_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_FETCH_ADD_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_FETCH_ADD_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_ACQUIRE); /* test release barrier */ - ATOMIC_FETCH_ADD_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_FETCH_ADD_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_ADD_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_FETCH_ADD_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic04/tasks.c b/testsuites/smptests/smpatomic04/tasks.c index 006c80e34a..9bef84e304 100644 --- a/testsuites/smptests/smpatomic04/tasks.c +++ b/testsuites/smptests/smpatomic04/tasks.c @@ -18,20 +18,24 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_FETCH_SUB_NO_BARRIER(NAME, TYPE, cpuid, mem_bar)\ +#define ATOMIC_FETCH_SUB_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar)\ { \ - Atomic_##TYPE t = 0, a = 0, b = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ + R_TYPE c; \ unsigned int i; \ for (i = 0; i < TEST_REPEAT; i++){ \ - a = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - b = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - t = a; \ + a = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + b = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ _Atomic_Fetch_sub_##NAME(&t, b, mem_bar); \ - rtems_test_assert(t == (Atomic_##TYPE)(a - b)); \ + c = _Atomic_Load_##NAME(&t, mem_bar); \ + rtems_test_assert(c == (R_TYPE)(a - b)); \ } \ - locked_printf("\nCPU%d _Atomic_Fetch_sub_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Fetch_sub_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,31 +55,19 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_FETCH_SUB_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_FETCH_SUB_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_FETCH_SUB_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_ACQUIRE); /* test release barrier */ - ATOMIC_FETCH_SUB_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_FETCH_SUB_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_SUB_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_FETCH_SUB_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic05/tasks.c b/testsuites/smptests/smpatomic05/tasks.c index 0061c82252..d0447f3465 100644 --- a/testsuites/smptests/smpatomic05/tasks.c +++ b/testsuites/smptests/smpatomic05/tasks.c @@ -18,20 +18,24 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_FETCH_AND_NO_BARRIER(NAME, TYPE, cpuid, mem_bar)\ +#define ATOMIC_FETCH_AND_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar)\ { \ - Atomic_##TYPE t = 0, a = 0, b = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ + R_TYPE c; \ unsigned int i; \ for (i = 0; i < TEST_REPEAT; i++){ \ - a = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - b = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - t = a; \ + a = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + b = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ _Atomic_Fetch_and_##NAME(&t, b, mem_bar); \ - rtems_test_assert(t == (Atomic_##TYPE)(a & b)); \ + c = _Atomic_Load_##NAME(&t, mem_bar); \ + rtems_test_assert(c == (R_TYPE)(a & b)); \ } \ - locked_printf("\nCPU%d _Atomic_Fetch_and_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Fetch_and_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,31 +55,19 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_FETCH_AND_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_FETCH_AND_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_FETCH_AND_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_ACQUIRE); /* test release barrier */ - ATOMIC_FETCH_AND_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_FETCH_AND_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_AND_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_FETCH_AND_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic06/tasks.c b/testsuites/smptests/smpatomic06/tasks.c index ec29b28ac2..c368bb9803 100644 --- a/testsuites/smptests/smpatomic06/tasks.c +++ b/testsuites/smptests/smpatomic06/tasks.c @@ -18,20 +18,24 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_FETCH_OR_NO_BARRIER(NAME, TYPE, cpuid, mem_bar) \ +#define ATOMIC_FETCH_OR_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar) \ { \ - Atomic_##TYPE t = 0, a = 0, b = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ + R_TYPE c; \ unsigned int i; \ for (i = 0; i < TEST_REPEAT; i++){ \ - a = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - b = (Atomic_##TYPE)(rand() % ((Atomic_##TYPE)-1 / 2)); \ - t = a; \ + a = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + b = (R_TYPE)(rand() % ((R_TYPE)-1 / 2)); \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ _Atomic_Fetch_or_##NAME(&t, b, mem_bar); \ - rtems_test_assert(t == (Atomic_##TYPE)(a | b)); \ + c = _Atomic_Load_##NAME(&t, mem_bar); \ + rtems_test_assert(c == (R_TYPE)(a | b)); \ } \ - locked_printf("\nCPU%d _Atomic_Fetch_or_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Fetch_or_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -51,31 +55,19 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_FETCH_OR_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_FETCH_OR_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_FETCH_OR_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_ACQUIRE); /* test release barrier */ - ATOMIC_FETCH_OR_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_FETCH_OR_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_FETCH_OR_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_FETCH_OR_NO_BARRIER(64, cpu_num); diff --git a/testsuites/smptests/smpatomic07/tasks.c b/testsuites/smptests/smpatomic07/tasks.c index 88c69be6fb..21802d650f 100644 --- a/testsuites/smptests/smpatomic07/tasks.c +++ b/testsuites/smptests/smpatomic07/tasks.c @@ -18,35 +18,40 @@ #include #include -#define TEST_REPEAT 200000 +#define TEST_REPEAT 1000 -#define ATOMIC_CAS_NO_BARRIER(NAME, TYPE, cpuid, mem_bar) \ +#define ATOMIC_CAS_NO_BARRIER(NAME, TYPE, R_TYPE, cpuid, mem_bar) \ { \ - Atomic_##TYPE a = 0, b = 0; \ + Atomic_##TYPE t; \ + R_TYPE a; \ + R_TYPE b; \ unsigned int i; \ int r; \ for (i = 0; i < TEST_REPEAT; i++){ \ - a = rand() % (Atomic_##TYPE)-1; \ - b = a; \ - r = _Atomic_Compare_exchange_##NAME(&b, a + 1, a - 1, mem_bar); \ - if(r != 0){ \ - locked_printf("\nCPU%d _Atomic_Compare_exchange_" #NAME ": FAILED\n", cpuid); \ - rtems_test_exit( 0 ); \ - } \ - b = a; \ - r = _Atomic_Compare_exchange_##NAME(&b, a, a - 1, mem_bar); \ - if((r == 0) ||((r != 0) && ((a - 1) != b))){ \ - locked_printf("\nCPU%d _Atomic_Compare_exchange_" #NAME ": FAILED\n", cpuid); \ - rtems_test_exit( 0 ); \ - } \ - b = a; \ - r = _Atomic_Compare_exchange_##NAME(&b, a + 1, a, mem_bar); \ - if(r != 0){ \ - locked_printf("\nCPU%d _Atomic_Compare_exchange_" #NAME ": FAILED\n", cpuid); \ - rtems_test_exit( 0 ); \ - } \ + a = rand() % (R_TYPE)-1; \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ + b = a + 1; \ + r = _Atomic_Compare_exchange_##NAME(&t, &b, a - 1, mem_bar, memory_order_relaxed);\ + if(r != 0){ \ + locked_printf("\ntask%d: Atomic_Compare_exchange_" #NAME ": FAILED\n", (unsigned int)cpuid); \ + rtems_test_exit( 0 ); \ + } \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ + r = _Atomic_Compare_exchange_##NAME(&t, &a, a - 1, mem_bar, memory_order_relaxed);\ + b = _Atomic_Load_##NAME(&t, mem_bar); \ + if((r == 0) ||((r != 0) && ((a - 1) != b))){ \ + locked_printf("\ntask%d: Atomic_Compare_exchange_" #NAME ": FAILED\n", (unsigned int)cpuid); \ + rtems_test_exit( 0 ); \ + } \ + _Atomic_Store_##NAME(&t, a, mem_bar); \ + b = a + 1; \ + r = _Atomic_Compare_exchange_##NAME(&t, &b, a, mem_bar, memory_order_relaxed); \ + if(r != 0){ \ + locked_printf("\ntask%d: Atomic_Compare_exchange_" #NAME ": FAILED\n", (unsigned int)cpuid); \ + rtems_test_exit( 0 ); \ + } \ } \ - locked_printf("\nCPU%d _Atomic_Compare_exchange_" #NAME ": SUCCESS\n", cpuid); \ + locked_printf("\nCPU%d Atomic_Compare_exchange_" #NAME ": SUCCESS\n", cpuid); \ } rtems_task Test_task( @@ -66,31 +71,19 @@ rtems_task Test_task( /* Print that the task is up and running. */ /* test relaxed barrier */ - ATOMIC_CAS_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_CAS_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELAXED); - ATOMIC_CAS_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_CAS_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELAXED_BARRIER); - - ATOMIC_CAS_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELAXED_BARRIER); + ATOMIC_CAS_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELAXED); /* test acquire barrier */ - ATOMIC_CAS_NO_BARRIER(int, Int, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_CAS_NO_BARRIER(long, Long, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_CAS_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_ACQUIRE); - ATOMIC_CAS_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_ACQUIRE_BARRIER); - - ATOMIC_CAS_NO_BARRIER(32, Int32, cpu_num, ATOMIC_ACQUIRE_BARRIER); + ATOMIC_CAS_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_ACQUIRE); /* test release barrier */ - ATOMIC_CAS_NO_BARRIER(int, Int, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_CAS_NO_BARRIER(long, Long, cpu_num, ATOMIC_RELEASE_BARRIER); - - ATOMIC_CAS_NO_BARRIER(ptr, Pointer, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_CAS_NO_BARRIER(uint, Uint, uint_fast32_t, cpu_num, ATOMIC_ORDER_RELEASE); - ATOMIC_CAS_NO_BARRIER(32, Int32, cpu_num, ATOMIC_RELEASE_BARRIER); + ATOMIC_CAS_NO_BARRIER(ptr, Pointer, uintptr_t, cpu_num, ATOMIC_ORDER_RELEASE); // ATOMIC_CAS_NO_BARRIER(64, cpu_num); -- cgit v1.2.3