From 3fe1e4308a8d6586ab28c0c31422d0a330bf05ad Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 22 Apr 2014 10:40:26 +0200 Subject: sparc: Document register g7 usage --- doc/cpu_supplement/sparc.t | 3 +++ 1 file changed, 3 insertions(+) diff --git a/doc/cpu_supplement/sparc.t b/doc/cpu_supplement/sparc.t index 320c250e40..a6862c8aa2 100644 --- a/doc/cpu_supplement/sparc.t +++ b/doc/cpu_supplement/sparc.t @@ -401,6 +401,9 @@ The registers g2 through g4 are reserved for applications. GCC uses them as volatile registers by default. So they are treated like volatile registers in RTEMS as well. +The register g7 is reserved for the operating system and contains the thread +pointer used for thread-local storage (TLS) as mandated by the SPARC ABI. + @subsubsection Floating Point Registers The SPARC V7 architecture includes thirty-two, -- cgit v1.2.3