From 13cf9520f4fd223337d5b450cad2b7cfe0361779 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 4 Jan 2013 15:47:34 +0100 Subject: arm: Add and use default exception handler Add and use _ARMV4_Exception_undef_default(), _ARMV4_Exception_swi_default(), _ARMV4_Exception_data_abort_default(), _ARMV4_Exception_pref_abort_default(), _ARMV4_Exception_reserved_default(), _ARMV4_Exception_irq_default(), and _ARMV4_Exception_fiq_default(). --- c/src/lib/libbsp/arm/shared/start/start.S | 30 +++---- cpukit/score/cpu/arm/Makefile.am | 1 + cpukit/score/cpu/arm/armv4-exception-default.S | 117 +++++++++++++++++++++++++ cpukit/score/cpu/arm/rtems/score/armv4.h | 14 +++ 4 files changed, 147 insertions(+), 15 deletions(-) create mode 100644 cpukit/score/cpu/arm/armv4-exception-default.S diff --git a/c/src/lib/libbsp/arm/shared/start/start.S b/c/src/lib/libbsp/arm/shared/start/start.S index 2167adc8b5..33783cb1ac 100644 --- a/c/src/lib/libbsp/arm/shared/start/start.S +++ b/c/src/lib/libbsp/arm/shared/start/start.S @@ -5,7 +5,7 @@ */ /* - * Copyright (c) 2008-2011 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Obere Lagerstr. 30 @@ -31,6 +31,13 @@ .extern boot_card .extern bsp_start_hook_0 .extern bsp_start_hook_1 + .extern _ARMV4_Exception_undef_default + .extern _ARMV4_Exception_swi_default + .extern _ARMV4_Exception_data_abort_default + .extern _ARMV4_Exception_pref_abort_default + .extern _ARMV4_Exception_reserved_default + .extern _ARMV4_Exception_irq_default + .extern _ARMV4_Exception_fiq_default /* Global symbols */ .globl _start @@ -74,31 +81,31 @@ handler_addr_reset: handler_addr_undef: - .word reset + .word _ARMV4_Exception_undef_default handler_addr_swi: - .word reset + .word _ARMV4_Exception_swi_default handler_addr_prefetch: - .word reset + .word _ARMV4_Exception_data_abort_default handler_addr_abort: - .word reset + .word _ARMV4_Exception_pref_abort_default handler_addr_reserved: - .word reset + .word _ARMV4_Exception_reserved_default handler_addr_irq: - .word reset + .word _ARMV4_Exception_irq_default handler_addr_fiq: - .word reset + .word _ARMV4_Exception_fiq_default bsp_start_vector_table_end: @@ -199,13 +206,6 @@ twiddle: b twiddle -.arm - -reset: - - SWITCH_FROM_ARM_TO_THUMB r0 - b twiddle - #elif defined(ARM_MULTILIB_ARCH_V7M) .syntax unified diff --git a/cpukit/score/cpu/arm/Makefile.am b/cpukit/score/cpu/arm/Makefile.am index c941043ef6..85f9c7d967 100644 --- a/cpukit/score/cpu/arm/Makefile.am +++ b/cpukit/score/cpu/arm/Makefile.am @@ -21,6 +21,7 @@ libscorecpu_a_SOURCES += arm_exc_handler_low.S libscorecpu_a_SOURCES += arm_exc_handler_high.c libscorecpu_a_SOURCES += arm-exception-frame-print.c libscorecpu_a_SOURCES += arm-exception-default.c +libscorecpu_a_SOURCES += armv4-exception-default.S libscorecpu_a_SOURCES += armv7m-context-initialize.c libscorecpu_a_SOURCES += armv7m-context-restore.c libscorecpu_a_SOURCES += armv7m-context-switch.c diff --git a/cpukit/score/cpu/arm/armv4-exception-default.S b/cpukit/score/cpu/arm/armv4-exception-default.S new file mode 100644 index 0000000000..e5520d5817 --- /dev/null +++ b/cpukit/score/cpu/arm/armv4-exception-default.S @@ -0,0 +1,117 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Obere Lagerstr. 30 + * 82178 Puchheim + * Germany + * + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifdef HAVE_CONFIG_H + #include "config.h" +#endif + +#include +#include + +#ifdef ARM_MULTILIB_ARCH_V4 + +.extern _ARM_Exception_default + +.globl _ARMV4_Exception_undef_default +.globl _ARMV4_Exception_swi_default +.globl _ARMV4_Exception_data_abort_default +.globl _ARMV4_Exception_pref_abort_default +.globl _ARMV4_Exception_reserved_default +.globl _ARMV4_Exception_irq_default +.globl _ARMV4_Exception_fiq_default + +.section ".text" + +.arm + +_ARMV4_Exception_undef_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #1 + + b save_more_context + +_ARMV4_Exception_swi_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #2 + + b save_more_context + +_ARMV4_Exception_pref_abort_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #3 + + b save_more_context + +_ARMV4_Exception_data_abort_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #4 + +_ARMV4_Exception_reserved_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #5 + +_ARMV4_Exception_irq_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #6 + +_ARMV4_Exception_fiq_default: + + /* Save context and load vector */ + sub sp, #20 + stmdb sp!, {r0-r12} + mov r4, #7 + +save_more_context: + + /* Save more context */ + mov r2, lr + mrs r3, spsr + mrs r7, cpsr + orr r5, r3, #ARM_PSR_I + bic r5, #ARM_PSR_T + msr cpsr, r5 + mov r0, sp + mov r1, lr + msr cpsr, r7 + add r5, sp, #72 + stmdb r5!, {r0-r4} + + /* Call high level handler */ + mov r0, sp + SWITCH_FROM_ARM_TO_THUMB r1 + bl _ARM_Exception_default + + /* Just in case */ +twiddle: + b twiddle + +#endif /* ARM_MULTILIB_ARCH_V4 */ diff --git a/cpukit/score/cpu/arm/rtems/score/armv4.h b/cpukit/score/cpu/arm/rtems/score/armv4.h index a7deb9ad83..8c000f1150 100644 --- a/cpukit/score/cpu/arm/rtems/score/armv4.h +++ b/cpukit/score/cpu/arm/rtems/score/armv4.h @@ -41,6 +41,20 @@ void _ARMV4_Exception_prefetch_abort_set_handler( void _ARMV4_Exception_prefetch_abort( void ); +void _ARMV4_Exception_undef_default( void ); + +void _ARMV4_Exception_swi_default( void ); + +void _ARMV4_Exception_data_abort_default( void ); + +void _ARMV4_Exception_pref_abort_default( void ); + +void _ARMV4_Exception_reserved_default( void ); + +void _ARMV4_Exception_irq_default( void ); + +void _ARMV4_Exception_fiq_default( void ); + #endif /* ARM_MULTILIB_ARCH_V4 */ #ifdef __cplusplus -- cgit v1.2.3