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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-137-12/+821
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* bsps/powerpc: Use e500 exc categories for e6500Sebastian Huber2015-01-131-0/+1
| | | | This is not correct, but works for now.
* moxiesim: Add conditional logic to handle old and new gas syntaxAnthony Green2015-01-102-2/+21
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* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-6/+6
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-091-15/+11
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* powerpc: Use PPC_DEFAULT_CACHE_LINE_SIZESebastian Huber2015-01-091-8/+2
| | | | | Use it for the default PPC_CACHE_ALIGNMENT. Use it for PPC_STRUCTURE_ALIGNMENT.
* powerpc: Use alternate time base for CPU counterSebastian Huber2015-01-091-1/+1
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* bsp/qoriq: Fix nanoseconds extensionSebastian Huber2015-01-091-4/+17
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* bsp/qoriq: Increase MAS0[ESEL] widthSebastian Huber2015-01-091-3/+3
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* bsp/qoriq: Add MAS7 support for MMUSebastian Huber2015-01-097-21/+50
| | | | | This enables usage of the full real address space which is 40-bit on the T2080 for example.
* bsps/powerpc: ppc_exc_initialize_interrupt_stack()Sebastian Huber2015-01-092-11/+20
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* bsps/powerpc: Add TMR access macrosSebastian Huber2015-01-091-0/+28
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* bsps/powerpc: Add cache size functionsSebastian Huber2015-01-091-0/+46
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* bsps/powerpc: Delete C pre-processor warningSebastian Huber2015-01-091-2/+0
| | | | Do not warn about not implemented cache functions.
* bsps/powerpc: Support for 64 byte cache linesSebastian Huber2015-01-091-6/+23
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* bsps/powerpc: Support a cache alignment of 64Sebastian Huber2015-01-091-1/+8
| | | | Give the BSP the ability to define PPC_CACHE_ALIGNMENT.
* bsps/powerpc: Support e6500 indentificationSebastian Huber2015-01-092-0/+12
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* bsps/u-boot: Add optional text and data sectionsSebastian Huber2015-01-091-4/+12
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* bsps/u-boot: Update due to API changesSebastian Huber2015-01-093-7/+155
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* bsps/mpc83xx: Fix warningsSebastian Huber2015-01-091-4/+5
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* smp: Add and use _SMP_Should_start_processor()Sebastian Huber2015-01-092-10/+2
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* pc386: Add Edison base supportJoel Sherrill2015-01-0412-17/+220
| | | | | | | | | The current support for the Edison supports a single polled UART for input and output plus a simulated clock tick. The activities forward for supporting the Edison have been posted on the RTEMS mailing lists and at: http://rtemsramblings.blogspot.com/2014/12/intel-edison-and-rtems-road-forward.html
* clock_driver_simidle.c: Add BSP_CLOCK_DRIVER_DELAYJoel Sherrill2015-01-041-0/+10
| | | | | | | | | This allows the BSP to define an optional spin delay which is useful for making time appear to pass at a rate closer to wall time. On the Edison, this was used with a polled console driver to slow polling to a reasonable rate and make time pass reasonably close to correctly even with no clock tick support.
* pc386: Add BSP_ENABLE_COM1_COM4 BSP optionJoel Sherrill2015-01-043-27/+38
| | | | | | This allows the support for the legacy COM1-COM4 serial ports to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present.
* pc386: Add BSP_ENABLE_IDE BSP optionJoel Sherrill2015-01-044-1/+13
| | | | | | This allows the IDE support to be completely disabled. It is needed to prevent hangs on some hardware. In particular, the Intel Edison where it is not present.
* pc386: Add BSP_ENABLE_VGA BSP optionJoel Sherrill2015-01-047-36/+69
| | | | | | This allows the VGA and keyboard console to be completely disabled. It is useful on PCs without displays and prevents a very slow boot time on the Intel Edison.
* Use fixed-width C99 types for PowerPC in_be16() and co.Nick Withers2014-12-2324-175/+185
| | | | | | Also use the const qualifier on the address pointer's target in in_*() Closes #2128
* pc386: scan all functions of multi-function PCI devicesTill Strauman2014-12-231-7/+23
| | | | | | | | | | | | | | | | | | | The current algorithm scans all PCI busses (0..ff) and all devices (0..31) on each bus for bridges and determines the maximum of all subordinate busses encountered. However, the algorithm does not scan all functions present in multi-function devices -- I have a PCI express root complex (82801H) where multiple (non-zero index) functions are 'PCI bridges' whose subordinate bus number is missed by the original algorithm. This commit makes sure that the scan is extended to all functions of multi-function devices. See #2067
* bsp/moxiesim: Add cache manager implementationSebastian Huber2014-12-171-0/+5
| | | | Close #2220.
* bsp/beagle: Fix some warningsBen Gras2014-12-155-3/+6
| | | | | | | The extra includes in console_*.c are to solve a 'no previous prototype' warning. Solves #2212 in trac.
* mcf5225x-testsuite.tcfg: Add fileioJoel Sherrill2014-12-151-0/+1
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* bsp/mpc55xxevb: Fix warningsSebastian Huber2014-12-152-2/+10
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* bsp/t32mppc: Fix warningsSebastian Huber2014-12-152-5/+8
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* bsps/powerpc: Disable SPE for soft-float variantsSebastian Huber2014-12-152-2/+2
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* bsp/lpc32xx: Fix memory mapSebastian Huber2014-12-151-1/+1
| | | | | | Fixes bug introduced with f0c564c5ae36da20b1543ae9db9e8fe9644a81c8. close #2218
* bsp/mpc8xx: Fix warningsSebastian Huber2014-12-128-118/+45
| | | | close #2211
* bsp/mpc8xx: Fix warningsSebastian Huber2014-12-127-26/+30
| | | | close #2211
* sparc64: put each copyright on one lineGedare Bloom2014-12-088-30/+18
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* bsps/sparc: Fix trap table initializationSebastian Huber2014-12-053-9/+13
| | | | Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
* Update bug report URLSebastian Huber2014-12-05134-134/+134
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* libmisc: More useful default configurationSebastian Huber2014-12-057-104/+3
| | | | | | | | | | | The dummy.c was a de-facto default configuration. Rename it to default-configuration.c. Use unlimited objects and the stack checker. This makes it easier for new RTEMS users which will likely use this file if they just work with the usual main() function as the application entry point. Provide proper arguments for main() using the BSP command line. Add spare user extensions and drivers. Do not initialize the network by default. Delete bspinit.c.
* beagle bsp: disable watchdog on am335xBen Gras2014-12-052-0/+15
| | | | | | | | | | | | On recent u-boots, the watchdog is turned on / left enabled. The Beaglebone Black rev. C ships with such a u-boot internally so any application booting from it must disable the watchdog. Therefore this change is needed to boot an RTEMS app out-of-the-box on a BBB Rev C - otherwise the user button must be held during boot (to bypass the stock uboot) or the internal uboot must be updated. To allow for a better out-of-the-box experience, we just turn off the watchdog.
* i386: doxygen and comments related to VESA real mode framebufferJan Dolezal2014-12-048-399/+659
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* i386/pc386: cammelCase (struct and function names) to underscores, typedefed ↵Jan Dolezal2014-12-047-245/+250
| | | | | | | | | | structs, break >80 chars lines, removed newlines at EOFs fb_vesa_rm.c: removed inline from functions declared in fb_vesa.h removed unnecessary printks in the end of patch edid.h, vbe3.h: switched from custom *PACKED_ATTRIBUTE at the structs to the RTEMS_COMPILER_PACKED_ATTRIBUTE for easier maintainability of doxygen
* bsp/leon3: Fix trap table initializationSebastian Huber2014-12-041-1/+2
| | | | Fixes bug introduced with dff1803cfbec3775fff1b9c34cc707c05494dc3b.
* SPARC: optimize IRQ enable & disableDaniel Hellstrom2014-12-045-90/+114
| | | | | | | | | | | | | | | | * Coding style cleanups. * Use OS reserved trap 0x89 for IRQ Disable * Use OS reserved trap 0x8A for IRQ Enable * Add to SPARC CPU supplement documentation This will result in faster Disable/Enable code since the system trap handler does not need to decode which function the user wants. Besides the IRQ disable/enabled can now be inline which avoids the caller to take into account that o0-o7+g1-g4 registers are destroyed by trap handler. It was also possible to reduce the interrupt trap handler by five instructions due to this.
* pc386 bsp fix for default modeBen Gras2014-12-031-2/+2
| | | | | If USE_VBE_RM is 0, vesa_realmode_bootup_init() is not available so the test should be #if instead of #ifdef.
* Move the flash size probe into bankValidate()Nick Withers2014-12-031-4/+5
| | | | Previously, bankValidate() could be called (e.g., BSP_flashWrite() -> regionCheckAndErase() -> argcheck() -> bankValidate()) without the probe having happened. When it then invoked BSP_flashCheckId(), unmapped memory could be read, possibly causing a fatal exception.
* sparc/leon2: LEON_Is_interrupt_masked for Leon2 in leon.h wrongly definedJiri Gaisler2014-12-021-1/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1959 in trac.
* sparc/leon3: LEON_Is_interrupt_masked for Leon3 in leon.h wrongly definedJiri Gaisler2014-12-021-3/+1
| | | | | Condition needs to be inverted, as a 1 in the mask register means that the interrupt is enabled. Solves ticket #1958 in trac.
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