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* powerpc: Fix interrupt profiling for e6500Sebastian Huber2016-11-241-1/+3
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* bsp/lpc23xx_tli800: Disable tar01 testSebastian Huber2016-11-231-0/+1
| | | | Close #2824.
* powerpc/mpc5xx: Rename CPU_Interrupt_frameSebastian Huber2016-11-212-4/+4
| | | | | | The MPC5XX support uses a legacy interrupt/exception infrastructure. Close #2819.
* powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2016-11-182-20/+66
| | | | Update #2751.
* sparc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2016-11-181-5/+5
| | | | Update #2751.
* score: Allow interrupts during thread dispatchSebastian Huber2016-11-182-19/+29
| | | | | | | | | Use a processor-specific interrupt frame during context switches in case the executing thread is longer executes on the processor and the heir thread is about to start execution. During this period we must not use a thread stack for interrupt processing. Update #2809.
* powerpc: Add up to date CPU_Interrupt_frameSebastian Huber2016-11-186-388/+13
| | | | | | | Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the corresponding defines to <rtems/score/cpuimpl.h>. Update #2809.
* powerpc: Move legacy CPU_Interrupt_frameSebastian Huber2016-11-182-1/+33
| | | | | | | The only remaining user of CPU_Interrupt_frame on PowerPC is the mpc5xx support. Move it to here. Update #2809.
* bsps/powerpc: Avoid use of CPU_Interrupt_frameSebastian Huber2016-11-181-3/+3
| | | | | | | This type is not relevant for the code since only a pointer is passed around. Update #2809.
* sparc: Move CPU_Interrupt_frame related definesSebastian Huber2016-11-181-1/+1
| | | | | | Move CPU_Interrupt_frame related defines to <rtems/score/cpuimpl.h>. Update #2809.
* sparc: Rename CPU_Minimum_stack_frameSebastian Huber2016-11-182-5/+5
| | | | | | | | Rename SPARC-specific CPU_Minimum_stack_frame to SPARC_Minimum_stack_frame. Rename SPARC-specific CPU_MINIMUM_STACK_FRAME_SIZE to SPARC_MINIMUM_STACK_FRAME_SIZE. Update #2809.
* sparc64: Rename CPU_Minimum_stack_frameSebastian Huber2016-11-182-3/+3
| | | | | | | | Rename SPARC64-specific CPU_Minimum_stack_frame to SPARC64_Minimum_stack_frame. Rename SPARC64-specific CPU_MINIMUM_STACK_FRAME_SIZE to SPARC64_MINIMUM_STACK_FRAME_SIZE. Update #2809.
* bsps/mips: Use <libcpu/isr_entries.h>Sebastian Huber2016-11-187-7/+8
| | | | Avoid duplicate mips_vector_isr_handlers() declarations.
* arm: Use TPIDRPRW for current per-CPU controlSebastian Huber2016-11-181-5/+13
| | | | | | Use the previously unused TPIDRPRW register to get the per-CPU control of the current processor. This avoids instructions in GET_SELF_CPU_CONTROL which are not available in Thumb mode.
* bsp/atsamv: Make size of nocache-memory configurable.Christian Mauderer2016-11-172-2/+3
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* powerpc: Add _CPU_Get_current_per_CPU_control()Sebastian Huber2016-11-102-1/+12
| | | | | | | | Add _CPU_Get_current_per_CPU_control() on SMP configurations. Use SPRG0 for the current per-CPU control. This reduces the code size by three instructions and is slightly faster. Update #2805.
* score: Add and use Thread_Control::is_idleSebastian Huber2016-11-094-15/+4
| | | | Update #2797.
* bsp/qoriq: Remove duplicate qoriq_gpio definitionSebastian Huber2016-11-071-4/+0
| | | | Close #2800.
* virtex4, virtex5 bsp.h: Use BSP_INTERRUPT_STACK_SIZE not user space ↵Tim Cussins2016-11-032-2/+2
| | | | | | CONFIGURE_INTERRUPT_STACK_SIZE closes #2801.
* m68k/mrm332/make/custom/mrm332-testsuite.tcfg: Add dl05Joel Sherrill2016-11-031-0/+1
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* m68k/mcf5225x/make/custom/mcf5225x-testsuite.tcfg: Add dl05Joel Sherrill2016-11-031-0/+1
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* m68k/mcf52235/make/custom/mcf52235-testsuite.tcfg: Add dl05Joel Sherrill2016-11-031-0/+1
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* mcf5206elite/make/custom/mcf5206elite-testsuite.tcfg: Add dl05Joel Sherrill2016-11-031-0/+1
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* moxiesim/bsp_specs: Add crtbegin/end to fix link issuesJoel Sherrill2016-11-031-2/+2
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* bsps/sparc: Fix copy of initialized dataSebastian Huber2016-11-022-7/+8
| | | | | The text and data sections may have different alignment requirements. Support a data section alignment greater than 16.
* Updated xilinx_zynq_a9_qemu bsp README instructions.James2016-10-251-2/+2
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* bsps/sparc: Add interrupt controller registersSebastian Huber2016-10-191-2/+5
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* bsp/leon3: Avoid implicit integer conversionsSebastian Huber2016-10-191-8/+8
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* atsam: multiple messages on one cs low levelAlexander Krutwig2016-10-172-8/+14
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* libchip/network/if_fxp.c: do not use rtems_interrupt_disable.Pavel Pisa2016-10-171-7/+4
| | | | | | | | | | The single write to memory or ioport output are mostly atomic operations already. The proper memory synchronization barrier should be used around them to guarantee ordering (sync or eieio on PowerPC for example) but because I have not found settable portable primitive only compiler barrier is used. It should be enough on x86 because the externally visible order should be/is guaranteed to be preserved on x86 architecture.
* bsps/i386: use Pentimum instructions for pc586 and pc686 builds.Pavel Pisa2016-10-172-2/+2
| | | | | | | | | | | | | | | | | | When GCC option -march is not specifies i386-rtems toolchain defaults to i386 architecture instruction set. It does not provide atomic instructions which results in really inefficient atomic_fetch_or even on UP build. SMP build is broken with i386 set because libatomic and GCC generate infinite loop for __atomic_fetch_add_4 used in rtems_interrupt_lock_acquire __atomic_fetch_add_4: push %ebp mov %esp,%ebp movl $0x5,0x10(%ebp) pop %ebp jmp __atomic_fetch_add_4
* bsps/i386: replace global interrupt disable by SMP build supporting locking.Pavel Pisa2016-10-179-72/+148
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* bsp/atsamv: Fix typoSebastian Huber2016-10-131-1/+1
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* bsps/i386: Separate variable for i8259 IRQs disable due to in progress state.Pavel Pisa2016-10-111-19/+36
| | | | | | | | The global state of enabled and disabled interrupts has to hold interrupts really disabled by drivers and system. If the state is combined with interrupts temporarily disabled because they are processed at given time then it is impossible to maintain state by interrupt handlers in drivers.
* bsp/qoriq: Add GPIO register mapSebastian Huber2016-10-111-1/+14
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* bsps/sparc: Support GR740 GPIOSebastian Huber2016-10-111-0/+22
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* bsp/atsam: Provide default buffer countsSebastian Huber2016-10-051-2/+11
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* bsp/atsam: Fix PHY detectionSebastian Huber2016-10-051-16/+11
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* bsp/mvme147*: Fix linker issueSebastian Huber2016-09-232-6/+2
| | | | | The GNU linker does not allow a nonconstant expression for a region length.
* bsps/m68k: Add libatomic support to some bsp_specsSebastian Huber2016-09-233-3/+3
| | | | Update #2695.
* bsps/m68k: Fix linker command fileSebastian Huber2016-09-231-1/+1
| | | | Prevent garbage collection of interrupt vector table.
* arm/tms570: document BSP setup with included hardware initialization.Pavel Pisa2016-09-221-22/+100
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* arm/tms570: update bootstrap generated preinstall.amPavel Pisa2016-09-221-0/+13
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* arm/tms570: include TMS570_USE_HWINIT_STARTUP option to select bare metal ↵Pavel Pisa2016-09-222-0/+26
| | | | startup and selftest.
* arm/tms570: include hardware initialization and selftest based on Ti ↵Pavel Pisa2016-09-2216-0/+3519
| | | | | | | | | | | | | | | | | | | | HalCoGen generated files. The configuration is specific for TMS570LS3137 based HDK. Pins configuration can be easily changed in rtems/c/src/lib/libbsp/arm/tms570/hwinit/init_pinmux.c file. The list tms570_selftest_par_list in the file rtems/c/src/lib/libbsp/arm/tms570/hwinit/bspstarthooks-hwinit.c specifies peripherals which health status is examined by parity self-test at BSP start-up. It can be easily modified for other TMS570 family members variants same as the selection of other tests in bspstarthooks-hwinit.c.
* arm/tms570: define base addresses of all TMS570LS3137 SPI interfaces.Pavel Pisa2016-09-221-1/+5
| | | | | | | | Generated header file ti_herc/reg_spi.h contains complete registers and fields set for Ti MibSPI peripheral. Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5 are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4 have substantial part of registers removed but else they are compatible.
* bsps/arm: Export bsp_start_hook_0_done symbol from ARM start.S.Pavel Pisa2016-09-221-0/+1
| | | | | | | | The symbol can be used by bsp_start_hook_0 when complete RAM memory is initialization and overwritten during BSP self-test. The test overwrites even memory used to store return address / link register and regular resturn from bsp_start_hook_0 is not possible then.
* classic networking: adapt FXP driver to work with actual PCI and IRQ code.Pavel Pisa2016-09-212-106/+98
| | | | | | | | | | | Tested to work with QEMU provided Intel i82557b network controller emulation. qemu-system-x86_64 -enable-kvm -kernel $APP_BINARY \ -vga cirrus \ -append "--console=/dev/com1" \ -serial stdio \ -net nic,vlan=1,macaddr=be:be:be:10:00:01,model=i82557b \ -net tap,ifname=tap1,vlan=1,script=no,downscript=no
* classic networking: do not reference BSP_irq_enabled_at_i8259s which is no ↵Pavel Pisa2016-09-205-40/+5
| | | | | | | more available on i386. This change is required to build RTEMS with classic "--enable-networking" and link applications/tests which reference RTEMS_BSP_NETWORK_DRIVER_ATTACH.
* termios: Use IMFS nodes for new Termios devicesSebastian Huber2016-09-197-83/+21
| | | | | | | | This makes the new Termios devices independent of device major/minor numbers. It enables BSP independent Termios device drivers which may reside in the cpukit domain. These drivers require an IMFS and do not work with the device file system. However, the device file system should go away in the future.
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 14:31:41 +0000