| Commit message (Collapse) | Author | Age | Files | Lines |
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Somehow the constraints for CONFIGURE_TICKS_PER_TIMESLICE and
CONFIGURE_EXTRA_MPCI_RECEIVE_SERVER_STACK got mixed up.
Update #4986.
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In addtion to 1023, the GICC_IAR register may return 1022 as a special value.
Simply check for a valid interrupt vector for the dispatching.
Check the GICC_IAR again after the dispatch to quickly process a next interrupt
without having to go through the interrupt prologue and epiloge.
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Do not use reserved interrupt IDs.
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Update #3716.
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Make the GIC interrupt controller support a subgroup of the generic interrupt
controller support.
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In addtion to 1023, the GICC_IAR register may return 1022 as a special value.
Simply check for a valid interrupt vector for the dispatching.
Check the GICC_IAR again after the dispatch to quickly process a next interrupt
without having to go through the interrupt prologue and epiloge.
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Make sure that the last IPI is processed before the next test case is
carried out.
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This fatal code is a part of the normal SMP termination procedure.
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On the arm target, __udivmoddi4() cannot be fully tested through normal
integer divisions.
Update #3716.
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This patch moves the bcm2835 system timer driver in the arm/raspberrypi directory to the shared directory and adjusts arm/raspberrypi BSP.
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Make the clock driver parameters configurable. Use the maximum counter
frequency to get the best time resolution. Decouple the CPU counter from the
timecounter. Make the tick catch up handling more robust. Add a validation
test for the tick catch up.
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This fixes commit b678a199e499b6c3f0b453393434aefaee180423 for SMP
configurations.
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The processor mask implementation uses flsl() from <strings.h> which is
only BSD visible. Move the implementation to a separate header file to
hide it from the API level. This fixes build errors with GCC 14.
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The powerpc context switch restores the interrupt state.
Update #4955.
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Replace the BSP_CONSOLE_MINOR BSP option for the Xilinx Zynq BSPs with the new
BSP option ZYNQ_UART_KERNEL_IO_BASE_ADDR. Move the kernel I/O support to a
shared file.
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This helps to provide a shared implementation of the kernel I/O support.
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Make the initialization and polled functions independent of the Termios
context. This helps to implement the kernel I/O support without a dependency
on the Termios framework.
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Move declarations of bsp_interrupt_get_affinity() and
bsp_interrupt_set_affinity() to <bsp/irq-generic.h>. Canonicalize the
<bsp/irq.h> includes.
Implement bsp_interrupt_get_affinity() and bsp_interrupt_set_affinity() only if
needed (usually RTEMS_SMP).
Provide stub implementations for i386 to fix build errors.
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The parameters are unused due to API constraints. The functions are
used through function pointers. Alternative implementations may use the
parameters.
Update #4862.
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Pass the parameter of the clock interrupt handler to
Clock_driver_support_at_tick() and Clock_driver_timecounter_tick(). This makes
it possible to use the interrupt handler argument in clock drivers.
Use the interrupt handler provided by Clock_driver_support_install_isr() to
avoid local delarations of Clock_isr().
Update #4862.
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Unconditionally make a CONFIGURE_TICKS_PER_TIMESLICE value less than or equal
to zero an error.
Update #4986.
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This fixes:
heap.c:268:3: warning: implicit declaration of function 'memset'
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Provide arm_gic_irq_processor_count() only in SMP configurations.
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Add a BSP variant without a board-specific name.
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Add a BSP variant without a board-specific name.
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The use of this function is optional. Newer BSPs do not use it.
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We observed a strange behavior of the 1Hz timer when running cFS on Zynq
RPU. After some investigation, we reduced the error to the truncation
issue. This patch fixes the issue.
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Gate CONFIGURE_TICKS_PER_TIMESLICE appropriately behind
CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER.
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When unmounting a JFFS2 filesystem, any outstanding write buffers must
be flushed to disk. In some circumstances, these write buffers are
instantiated by a garbage collection pass and as such no inode number is
associated with it. Due to the way that JFFS2 processes these garbage
collection passes, a write buffer without any associated inodes will not
be flushed unless it is forced with jffs2_flush_wbuf_pad().
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When resetting the QSPI FIFOs, the driver was reading write-only bits of
a register for status information when it was actually in a different
register. This corrects the driver so that it reads the correct status
bits.
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Add an opportunistic page cache to the xnandpsu driver since it does not
implement partial page reads and common filesystem access patterns
perform multiple reads from the same page. This has been seen to provide
a 10x speedup to read speeds and a 2x speedup on first initialization
when used with JFFS2.
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Update #3716.
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The base addresses and IRQ numbers for UART 0 and 1 were interchanged.
Fix this and set BSP_CONSOLE_MINOR to 0 for this BSP family.
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The <rtems/irq.h> header file depends on the BSP-provided define
BSP_SHARED_HANDLER_SUPPORT.
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