tmtests/tmtimer01: New test

Test run performed on T4240 running at 1667MHz in uni-processor
configuration.

Update #2554.

7 files changed, 408 insertions, 0 deletions

diff --git a/testsuites/tmtests/Makefile.am b/testsuites/tmtests/Makefile.am
index c1eb7b5555..b259269ac9 100644
--- a/testsuites/tmtests/Makefile.am
+++ b/testsuites/tmtests/Makefile.am
@@ -3,6 +3,7 @@ ACLOCAL_AMFLAGS = -I ../aclocal
 _SUBDIRS = tmck tmoverhd tm01 tm02 tm03 tm04 tm05 tm06 tm07 tm08 tm09 tm10 \
     tm11 tm12 tm13 tm14 tm15 tm16 tm17 tm18 tm19 tm20 tm21 tm22 tm23 tm24 \
     tm25 tm26 tm27 tm28 tm29 tm30 tm31 tm32 tm33 tm34 tm35 tm36
+_SUBDIRS += tmtimer01
 _SUBDIRS += tmcontext01
 _SUBDIRS += tmfine01
 
diff --git a/testsuites/tmtests/configure.ac b/testsuites/tmtests/configure.ac
index 5c6138e846..b899000a3e 100644
--- a/testsuites/tmtests/configure.ac
+++ b/testsuites/tmtests/configure.ac
@@ -27,6 +27,7 @@ AC_SUBST(OPERATION_COUNT)
 
 # Explicitly list all Makefiles here
 AC_CONFIG_FILES([Makefile
+tmtimer01/Makefile
 tmfine01/Makefile
 tmcontext01/Makefile
 tmck/Makefile
diff --git a/testsuites/tmtests/tmtimer01/Makefile.am b/testsuites/tmtests/tmtimer01/Makefile.am
new file mode 100644
index 0000000000..15a68282f3
--- /dev/null
+++ b/testsuites/tmtests/tmtimer01/Makefile.am
@@ -0,0 +1,19 @@
+rtems_tests_PROGRAMS = tmtimer01
+tmtimer01_SOURCES = init.c
+
+dist_rtems_tests_DATA = tmtimer01.scn tmtimer01.doc
+
+include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg
+include $(top_srcdir)/../automake/compile.am
+include $(top_srcdir)/../automake/leaf.am
+
+AM_CPPFLAGS += -I$(top_srcdir)/../support/include
+
+LINK_OBJS = $(tmtimer01_OBJECTS)
+LINK_LIBS = $(tmtimer01_LDLIBS)
+
+tmtimer01$(EXEEXT): $(tmtimer01_OBJECTS) $(tmtimer01_DEPENDENCIES)
+	@rm -f tmtimer01$(EXEEXT)
+	$(make-exe)
+
+include $(top_srcdir)/../automake/local.am
diff --git a/testsuites/tmtests/tmtimer01/init.c b/testsuites/tmtests/tmtimer01/init.c
new file mode 100644
index 0000000000..6b9430481f
--- /dev/null
+++ b/testsuites/tmtests/tmtimer01/init.c
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#ifdef HAVE_CONFIG_H
+  #include "config.h"
+#endif
+
+#include "tmacros.h"
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include <rtems.h>
+#include <rtems/counter.h>
+
+const char rtems_test_name[] = "TMTIMER 1";
+
+typedef struct {
+  size_t cache_line_size;
+  size_t data_cache_size;
+  int dummy_value;
+  volatile int *dummy_data;
+  rtems_id first;
+} test_context;
+
+static test_context test_instance;
+
+static void prepare_cache(test_context *ctx)
+{
+  volatile int *data = ctx->dummy_data;
+  size_t m = ctx->data_cache_size / sizeof(*data);
+  size_t k = ctx->cache_line_size / sizeof(*data);
+  size_t j = ctx->dummy_value;
+  size_t i;
+
+  for (i = 0; i < m; i += k) {
+    data[i] = i + j;
+  }
+
+  ctx->dummy_value = i + j;
+  rtems_cache_invalidate_entire_instruction();
+}
+
+static void never(rtems_id id, void *arg)
+{
+  rtems_test_assert(0);
+}
+
+static rtems_interval interval(size_t i)
+{
+  rtems_interval d = 50000;
+
+  return i * d + d;
+}
+
+static void test_fire_and_cancel(
+  test_context *ctx,
+  size_t i,
+  size_t j,
+  const char *name
+)
+{
+  rtems_status_code sc;
+  rtems_status_code sc2;
+  rtems_counter_ticks a;
+  rtems_counter_ticks b;
+  rtems_counter_ticks d;
+  rtems_id id;
+  rtems_interrupt_level level;
+
+  id = ctx->first + i;
+  prepare_cache(ctx);
+
+  rtems_interrupt_local_disable(level);
+  a = rtems_counter_read();
+  sc = rtems_timer_fire_after(id, interval(j), never, NULL);
+  sc2 = rtems_timer_cancel(id);
+  b = rtems_counter_read();
+  rtems_interrupt_local_enable(level);
+
+  d = rtems_counter_difference(b, a);
+
+  rtems_test_assert(sc == RTEMS_SUCCESSFUL);
+  rtems_test_assert(sc2 == RTEMS_SUCCESSFUL);
+
+  printf(
+    "<%s unit=\"ns\">%" PRIu64 "</%s>",
+    name,
+    rtems_counter_ticks_to_nanoseconds(d),
+    name
+  );
+}
+
+static void test_case(test_context *ctx, size_t j, size_t k)
+{
+  rtems_status_code sc;
+  size_t s;
+  size_t t;
+
+  s = j - k;
+
+  for (t = 0; t < s; ++t) {
+    size_t u = k + t;
+
+    sc = rtems_timer_fire_after(ctx->first + u, interval(u + 1), never, NULL);
+    rtems_test_assert(sc == RTEMS_SUCCESSFUL);
+  }
+
+  printf("  <Sample>\n    <ActiveTimers>%zu</ActiveTimers>", j);
+
+  test_fire_and_cancel(ctx, j, 0, "First");
+  test_fire_and_cancel(ctx, j, j / 2, "Middle");
+  test_fire_and_cancel(ctx, j, j + 1, "Last");
+
+  printf("\n  </Sample>\n");
+}
+
+static void test(void)
+{
+  test_context *ctx = &test_instance;
+  rtems_status_code sc;
+  rtems_id id;
+  rtems_name n;
+  size_t j;
+  size_t k;
+  size_t timer_count;
+
+  ctx->cache_line_size = rtems_cache_get_data_line_size();
+  if (ctx->cache_line_size == 0) {
+    ctx->cache_line_size = 32;
+  }
+
+  ctx->data_cache_size = rtems_cache_get_data_cache_size(0);
+  if (ctx->data_cache_size == 0) {
+    ctx->data_cache_size = ctx->cache_line_size;
+  }
+
+  ctx->dummy_data = malloc(ctx->data_cache_size);
+  rtems_test_assert(ctx->dummy_data != NULL);
+
+  n = 1;
+  timer_count = 1;
+
+  sc = rtems_timer_create(n, &ctx->first);
+  rtems_test_assert(sc == RTEMS_SUCCESSFUL);
+  rtems_test_assert(rtems_object_id_get_index(ctx->first) == n);
+
+  while (true) {
+    ++n;
+
+    sc = rtems_timer_create(n, &id);
+    if (sc != RTEMS_SUCCESSFUL) {
+      break;
+    }
+
+    rtems_test_assert(rtems_object_id_get_index(id) == n);
+    timer_count = n;
+  }
+
+  printf("<TMTimer01 timerCount=\"%zu\">\n", timer_count);
+
+  k = 0;
+  j = 0;
+
+  while (j < timer_count) {
+    test_case(ctx, j, k);
+    k = j;
+    j = (123 * (j + 1) + 99) / 100;
+  }
+
+  test_case(ctx, n - 2, k);
+
+  printf("</TMTimer01>\n");
+}
+
+static void Init(rtems_task_argument arg)
+{
+  TEST_BEGIN();
+
+  test();
+
+  TEST_END();
+  rtems_test_exit(0);
+}
+
+#define CONFIGURE_MICROSECONDS_PER_TICK 50000
+
+#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER
+#define CONFIGURE_APPLICATION_NEEDS_CONSOLE_DRIVER
+
+#define CONFIGURE_UNIFIED_WORK_AREAS
+
+#define CONFIGURE_MAXIMUM_TASKS 1
+#define CONFIGURE_MAXIMUM_TIMERS rtems_resource_unlimited(32)
+
+#define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
+
+#define CONFIGURE_RTEMS_INIT_TASKS_TABLE
+
+#define CONFIGURE_INIT
+
+#include <rtems/confdefs.h>
diff --git a/testsuites/tmtests/tmtimer01/plot.py b/testsuites/tmtests/tmtimer01/plot.py
new file mode 100644
index 0000000000..7f3cf9ece0
--- /dev/null
+++ b/testsuites/tmtests/tmtimer01/plot.py
@@ -0,0 +1,25 @@
+#
+# Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+#
+# The license and distribution terms for this file may be
+# found in the file LICENSE in this distribution or at
+# http://www.rtems.org/license/LICENSE.
+#
+
+import libxml2
+from libxml2 import xmlNode
+import matplotlib.pyplot as plt
+doc = libxml2.parseFile('tmtimer01.scn')
+ctx = doc.xpathNewContext()
+
+plt.title('timer test')
+plt.xscale('log')
+plt.xlabel('active timers')
+plt.ylabel('timer fire and cancel [ns]')
+
+x = map(xmlNode.getContent, ctx.xpathEval('/TMTimer01/Sample/ActiveTimers'))
+for i in ['First', 'Middle', 'Last']:
+	y = map(xmlNode.getContent, ctx.xpathEval('/TMTimer01/Sample/' + i))
+	plt.plot(x, y, label = i)
+plt.legend(loc = 'best')
+plt.show()
diff --git a/testsuites/tmtests/tmtimer01/tmtimer01.doc b/testsuites/tmtests/tmtimer01/tmtimer01.doc
new file mode 100644
index 0000000000..728a000ce0
--- /dev/null
+++ b/testsuites/tmtests/tmtimer01/tmtimer01.doc
@@ -0,0 +1,12 @@
+This file describes the directives and concepts tested by this test set.
+
+test set name: tmtimer01
+
+directives:
+
+  - rtems_timer_fire_after()
+  - rtems_timer_cancel()
+
+concepts:
+
+  - Measure the time to execute the timer fire after and cancel operations.
diff --git a/testsuites/tmtests/tmtimer01/tmtimer01.scn b/testsuites/tmtests/tmtimer01/tmtimer01.scn
new file mode 100644
index 0000000000..ea882d415f
--- /dev/null
+++ b/testsuites/tmtests/tmtimer01/tmtimer01.scn
@@ -0,0 +1,137 @@
+<TMTimer01 timerCount="65504">
+  <Sample>
+    <ActiveTimers>0</ActiveTimers><First unit="ns">6397</First><Middle unit="ns">3290</Middle><Last unit="ns">1527</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>2</ActiveTimers><First unit="ns">1986</First><Middle unit="ns">1550</Middle><Last unit="ns">1314</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>4</ActiveTimers><First unit="ns">1551</First><Middle unit="ns">2134</Middle><Last unit="ns">3072</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>7</ActiveTimers><First unit="ns">2545</First><Middle unit="ns">3511</Middle><Last unit="ns">3404</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>10</ActiveTimers><First unit="ns">1595</First><Middle unit="ns">2363</Middle><Last unit="ns">4287</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>14</ActiveTimers><First unit="ns">1473</First><Middle unit="ns">2740</Middle><Last unit="ns">6069</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>19</ActiveTimers><First unit="ns">1566</First><Middle unit="ns">3195</Middle><Last unit="ns">5993</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>25</ActiveTimers><First unit="ns">1251</First><Middle unit="ns">2718</Middle><Last unit="ns">7307</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>32</ActiveTimers><First unit="ns">2302</First><Middle unit="ns">5690</Middle><Last unit="ns">10269</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>41</ActiveTimers><First unit="ns">1522</First><Middle unit="ns">8221</Middle><Last unit="ns">13424</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>52</ActiveTimers><First unit="ns">1799</First><Middle unit="ns">8455</Middle><Last unit="ns">14820</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>66</ActiveTimers><First unit="ns">1062</First><Middle unit="ns">12480</Middle><Last unit="ns">16590</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>83</ActiveTimers><First unit="ns">1384</First><Middle unit="ns">11710</Middle><Last unit="ns">21854</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>104</ActiveTimers><First unit="ns">1666</First><Middle unit="ns">15200</Middle><Last unit="ns">30951</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>130</ActiveTimers><First unit="ns">1345</First><Middle unit="ns">17154</Middle><Last unit="ns">37942</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>162</ActiveTimers><First unit="ns">1369</First><Middle unit="ns">22381</Middle><Last unit="ns">46929</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>201</ActiveTimers><First unit="ns">2271</First><Middle unit="ns">35625</Middle><Last unit="ns">59972</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>249</ActiveTimers><First unit="ns">1279</First><Middle unit="ns">37271</Middle><Last unit="ns">69662</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>308</ActiveTimers><First unit="ns">864</First><Middle unit="ns">44580</Middle><Last unit="ns">87633</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>381</ActiveTimers><First unit="ns">1078</First><Middle unit="ns">53821</Middle><Last unit="ns">106376</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>470</ActiveTimers><First unit="ns">913</First><Middle unit="ns">67021</Middle><Last unit="ns">133201</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>580</ActiveTimers><First unit="ns">1870</First><Middle unit="ns">79863</Middle><Last unit="ns">169394</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>715</ActiveTimers><First unit="ns">1732</First><Middle unit="ns">99965</Middle><Last unit="ns">208901</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>881</ActiveTimers><First unit="ns">1503</First><Middle unit="ns">138820</Middle><Last unit="ns">259314</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>1085</ActiveTimers><First unit="ns">1096</First><Middle unit="ns">166404</Middle><Last unit="ns">337461</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>1336</ActiveTimers><First unit="ns">1383</First><Middle unit="ns">209434</Middle><Last unit="ns">445806</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>1645</ActiveTimers><First unit="ns">1787</First><Middle unit="ns">253904</Middle><Last unit="ns">533644</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>2025</ActiveTimers><First unit="ns">2082</First><Middle unit="ns">327384</Middle><Last unit="ns">657141</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>2492</ActiveTimers><First unit="ns">1843</First><Middle unit="ns">417457</Middle><Last unit="ns">814380</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>3067</ActiveTimers><First unit="ns">1980</First><Middle unit="ns">493511</Middle><Last unit="ns">977427</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>3774</ActiveTimers><First unit="ns">2695</First><Middle unit="ns">622065</Middle><Last unit="ns">1237577</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>4644</ActiveTimers><First unit="ns">1463</First><Middle unit="ns">827565</Middle><Last unit="ns">1565553</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>5714</ActiveTimers><First unit="ns">1866</First><Middle unit="ns">1053458</Middle><Last unit="ns">1914932</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>7030</ActiveTimers><First unit="ns">3481</First><Middle unit="ns">1266198</Middle><Last unit="ns">2450199</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>8649</ActiveTimers><First unit="ns">2773</First><Middle unit="ns">1558351</Middle><Last unit="ns">2967472</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>10640</ActiveTimers><First unit="ns">2086</First><Middle unit="ns">2003884</Middle><Last unit="ns">3766161</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>13089</ActiveTimers><First unit="ns">3911</First><Middle unit="ns">2501427</Middle><Last unit="ns">4619553</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>16101</ActiveTimers><First unit="ns">3276</First><Middle unit="ns">3189159</Middle><Last unit="ns">5886373</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>19806</ActiveTimers><First unit="ns">3801</First><Middle unit="ns">4005049</Middle><Last unit="ns">7394938</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>24363</ActiveTimers><First unit="ns">3088</First><Middle unit="ns">4977788</Middle><Last unit="ns">9138839</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>29968</ActiveTimers><First unit="ns">4089</First><Middle unit="ns">6133462</Middle><Last unit="ns">11361012</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>36862</ActiveTimers><First unit="ns">2059</First><Middle unit="ns">7870138</Middle><Last unit="ns">14319206</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>45342</ActiveTimers><First unit="ns">2224</First><Middle unit="ns">9917100</Middle><Last unit="ns">17754441</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>55772</ActiveTimers><First unit="ns">1979</First><Middle unit="ns">11815557</Middle><Last unit="ns">21907509</Last>
+  </Sample>
+  <Sample>
+    <ActiveTimers>65503</ActiveTimers><First unit="ns">2404</First><Middle unit="ns">13694591</Middle><Last unit="ns">26215885</Last>
+  </Sample>
+</TMTimer01>