diff options
| author | Javier Jalle <javier.jalle@gaisler.com> | 2017-02-13 10:16:14 +0100 |
|---|---|---|
| committer | Daniel Hellstrom <daniel@gaisler.com> | 2017-03-06 07:54:55 +0100 |
| commit | f46f5f845dedbda438c60aca4895c9a27c84d884 (patch) | |
| tree | 9867aa1b25e0175707171e9f6ebefdb5c1c91028 | |
| parent | leon, gr740: fix device registration for GRPCI2 core (diff) | |
| download | rtems-f46f5f845dedbda438c60aca4895c9a27c84d884.tar.bz2 | |
leon, grpci2: latency timer user configurable (default 64)
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/include/grpci2.h | 4 | ||||
| -rw-r--r-- | c/src/lib/libbsp/sparc/shared/pci/grpci2.c | 16 |
2 files changed, 20 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/include/grpci2.h b/c/src/lib/libbsp/sparc/shared/include/grpci2.h index 624191e640..c356b5641f 100644 --- a/c/src/lib/libbsp/sparc/shared/include/grpci2.h +++ b/c/src/lib/libbsp/sparc/shared/include/grpci2.h @@ -36,6 +36,10 @@ extern void grpci2_register_drv(void); * ============================ * Name="byteTwisting", Type=INT, Enable/Disable Bytetwisting by hardware * + * PCI Latency timer + * ============================ + * Name="latencyTimer", Type=INT, Set the latency timer + * * PCI Host's Target BARs setup * ============================ * The Host's BARs are not configured by the configuration routines, by default diff --git a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c index 7fca3cdaa6..be459cc006 100644 --- a/c/src/lib/libbsp/sparc/shared/pci/grpci2.c +++ b/c/src/lib/libbsp/sparc/shared/pci/grpci2.c @@ -57,6 +57,9 @@ /* If defined to 1 - byte twisting is enabled by default */ #define DEFAULT_BT_ENABLED 0 +/* If defined to 64 - Latency timer is 64 by default */ +#define DEFAULT_LATENCY_TIMER 64 + /* Interrupt assignment. Set to other value than 0xff in order to * override defaults and plug&play information */ @@ -237,6 +240,7 @@ struct grpci2_priv { char irq_mode; /* IRQ Mode from CAPSTS REG */ char bt_enabled; unsigned int irq_mask; + unsigned int latency_timer; struct grpci2_pcibar_cfg *barcfg; @@ -696,6 +700,12 @@ static int grpci2_hw_init(struct grpci2_priv *priv) data |= (PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN); grpci2_cfg_w32(host, PCIR_COMMAND, data); + /* set latency timer */ + grpci2_cfg_r32(host, PCIR_CACHELNSZ, &data); + data &= ~0xff00; + data |= ((priv->latency_timer & 0xff) << 8); + grpci2_cfg_w32(host, PCIR_CACHELNSZ, data); + /* Enable Error respone (CPU-TRAP) on illegal memory access */ regs->ctrl = CTRL_ER | CTRL_PE; @@ -733,6 +743,7 @@ static int grpci2_init(struct grpci2_priv *priv) priv->regs = (struct grpci2_regs *)apb->start; priv->bt_enabled = DEFAULT_BT_ENABLED; priv->irq_mode = (priv->regs->sts_cap & STS_IRQMODE) >> STS_IRQMODE_BIT; + priv->latency_timer = DEFAULT_LATENCY_TIMER; /* Calculate the PCI windows * AMBA->PCI Window: AHB SLAVE AREA0 @@ -791,6 +802,11 @@ static int grpci2_init(struct grpci2_priv *priv) else priv->barcfg = grpci2_default_bar_mapping; + /* User may override DEFAULT_LATENCY_TIMER */ + value = drvmgr_dev_key_get(priv->dev, "latencyTimer", DRVMGR_KT_INT); + if (value) + priv->latency_timer = value->i; + /* This driver only support HOST systems, we check that it can act as a * PCI Master and that it is in the Host slot. */ if ((priv->regs->sts_cap&STS_HOST) || !(priv->regs->sts_cap&STS_MST)) |