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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-11 14:48:35 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-13 10:05:13 +0100 |
commit | ece97542257442681b3acd05d2206034c0adf8bd (patch) | |
tree | 2745827fc8cdb9813a589b9620ae15625a1f31a2 | |
parent | testsuites: Add TESTS_USE_PRINTF (diff) | |
download | rtems-ece97542257442681b3acd05d2206034c0adf8bd.tar.bz2 |
sparc: Increase CPU_STRUCTURE_ALIGNMENT to 32
Recent LEON4 systems use a cache line size of 32 bytes.
-rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h index 9706e45668..7e54d2257f 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h @@ -211,7 +211,7 @@ extern "C" { * The SPARC does not appear to have particularly strict alignment * requirements. This value was chosen to take advantages of caches. */ -#define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (16))) +#define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (32))) #define CPU_TIMESTAMP_USE_INT64_INLINE TRUE |