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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-01-10 07:57:36 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-01-10 08:12:16 +0100 |
| commit | e7d623e7e2d0d22672866c0e6c36abdd8c7d7d5b (patch) | |
| tree | 77abdf80b557d56d61c55a34a86492c8338e8353 | |
| parent | bsps/arm: Fix typo in disable cache for ARMv7-AR (diff) | |
| download | rtems-e7d623e7e2d0d22672866c0e6c36abdd8c7d7d5b.tar.bz2 | |
bsps/arm: Conditional ARMv7-AR data cache disable
Update #3667.
Close #3674.
| -rw-r--r-- | bsps/arm/shared/cache/cache-v7ar-disable-data.S | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/bsps/arm/shared/cache/cache-v7ar-disable-data.S b/bsps/arm/shared/cache/cache-v7ar-disable-data.S index 4b20fb268f..543a3fdaf4 100644 --- a/bsps/arm/shared/cache/cache-v7ar-disable-data.S +++ b/bsps/arm/shared/cache/cache-v7ar-disable-data.S @@ -27,6 +27,7 @@ #include <rtems/asm.h> +#if __ARM_ARCH >= 7 && (__ARM_ARCH_PROFILE == 65 || __ARM_ARCH_PROFILE == 82) .globl rtems_cache_disable_data .syntax unified @@ -118,3 +119,4 @@ FUNCTION_ENTRY(rtems_cache_disable_data) msr CPSR_fc, r0 ldmia sp!, {r4 - r11, pc} +#endif |