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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-28 10:48:02 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-28 10:50:12 +0200
commitcecc1097ffc0a3c39f6a25301d05e3ee965b16de (patch)
treed45a76b57b8cf07e70fca2acd03f376eeec7ed03
parentbsp/qoriq: Fix tlbwe synchronization (diff)
downloadrtems-cecc1097ffc0a3c39f6a25301d05e3ee965b16de.tar.bz2
bsp/qoriq: Fix start stack setup
-rw-r--r--c/src/lib/libbsp/powerpc/qoriq/start/start.S10
1 files changed, 7 insertions, 3 deletions
diff --git a/c/src/lib/libbsp/powerpc/qoriq/start/start.S b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
index 6d6cd9400a..ba82bbc2df 100644
--- a/c/src/lib/libbsp/powerpc/qoriq/start/start.S
+++ b/c/src/lib/libbsp/powerpc/qoriq/start/start.S
@@ -210,9 +210,13 @@ _start:
mtmsr r0
isync
- /* Initialize start stack */
- subi r1, START_STACK, PPC_MINIMUM_STACK_FRAME_SIZE
- clrrwi r1, r1, PPC_STACK_ALIGN_POWER
+ /*
+ * Initialize start stack. Make sure that we do not share a cache line
+ * with the heap block management, since initial stacks for the
+ * secondary processors are allocated from the workspace.
+ */
+ subi r1, START_STACK, 2 * PPC_DEFAULT_CACHE_LINE_SIZE
+ clrrwi r1, r1, PPC_DEFAULT_CACHE_LINE_POWER
li r0, 0
stw r0, 0(r1)