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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-12-21 07:49:47 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-12-21 10:32:39 +0100
commitb0c2d482353fc92047e64ed91a274f0f297d0555 (patch)
tree1e449507103240839cc04d0fd1fd2844cfc09dc1
parentbsps: Update cache manager documentation (diff)
downloadrtems-b0c2d482353fc92047e64ed91a274f0f297d0555.tar.bz2
bsps: Add CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
Update #3667.
-rw-r--r--bsps/shared/cache/cacheimpl.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/bsps/shared/cache/cacheimpl.h b/bsps/shared/cache/cacheimpl.h
index aa385bfd65..cb7f02d4ec 100644
--- a/bsps/shared/cache/cacheimpl.h
+++ b/bsps/shared/cache/cacheimpl.h
@@ -63,6 +63,13 @@
*
* The cache implementation source file shall define
*
+ * #define CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA
+ *
+ * if an external implementation of rtems_cache_disable_data() is provided,
+ * e.g. as an implementation in assembly code.
+ *
+ * The cache implementation source file shall define
+ *
* #define CPU_CACHE_NO_INSTRUCTION_CACHE_SNOOPING
*
* if the hardware provides no instruction cache snooping and the instruction
@@ -241,6 +248,7 @@ rtems_cache_enable_data( void )
#endif
}
+#if !defined(CPU_CACHE_SUPPORT_PROVIDES_DISABLE_DATA)
void
rtems_cache_disable_data( void )
{
@@ -248,6 +256,7 @@ rtems_cache_disable_data( void )
_CPU_cache_disable_data();
#endif
}
+#endif
/*
* THESE FUNCTIONS ONLY HAVE BODIES IF WE HAVE AN INSTRUCTION CACHE