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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-02-07 09:23:49 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-02-07 09:23:49 +0100
commitabc2164d3cb3f2bd7e77a218f3d73dce24982a60 (patch)
treec5ef10563b797e2f6c36440d25b1fec658ac7409
parentbsps/sparc64: Fix redefinitions (diff)
downloadrtems-abc2164d3cb3f2bd7e77a218f3d73dce24982a60.tar.bz2
bsps/powerpc: Fix redefinitions
-rw-r--r--bsps/powerpc/include/libcpu/raw_exception.h2
-rw-r--r--bsps/powerpc/include/libcpu/vectors.h60
2 files changed, 1 insertions, 61 deletions
diff --git a/bsps/powerpc/include/libcpu/raw_exception.h b/bsps/powerpc/include/libcpu/raw_exception.h
index dd0c483b0d..e206f326bc 100644
--- a/bsps/powerpc/include/libcpu/raw_exception.h
+++ b/bsps/powerpc/include/libcpu/raw_exception.h
@@ -55,8 +55,6 @@
#define ASM_MEBREAK_VECTOR 0x1E
#define ASM_NMEBREAK_VECTOR 0x1F
-#define LAST_VALID_EXC ASM_NMEBREAK_VECTOR
-
#ifndef ASM
/*
diff --git a/bsps/powerpc/include/libcpu/vectors.h b/bsps/powerpc/include/libcpu/vectors.h
index 2c8914e2a4..19ddca65f0 100644
--- a/bsps/powerpc/include/libcpu/vectors.h
+++ b/bsps/powerpc/include/libcpu/vectors.h
@@ -19,68 +19,15 @@
#ifndef _LIBCPU_VECTORS_H
#define _LIBCPU_VECTORS_H
+#include <bsp/vectors.h>
/*
* Size of hardware vector table.
*/
#define NUM_EXCEPTIONS 0x20
-/*
- * The callee (high level exception code written in C)
- * will store the Link Registers (return address) at entry r1 + 4 !!!.
- * So let room for it!!!.
- */
-#define LINK_REGISTER_CALLEE_UPDATE_ROOM 4
-#define SRR0_FRAME_OFFSET 8
-#define SRR1_FRAME_OFFSET 12
-#define EXCEPTION_NUMBER_OFFSET 16
-#define EXC_CR_OFFSET 20
-#define EXC_CTR_OFFSET 24
-#define EXC_XER_OFFSET 28
-#define EXC_LR_OFFSET 32
-#define GPR0_OFFSET 36
-#define GPR1_OFFSET 40
-#define GPR2_OFFSET 44
-#define GPR3_OFFSET 48
-#define GPR4_OFFSET 52
-#define GPR5_OFFSET 56
-#define GPR6_OFFSET 60
-#define GPR7_OFFSET 64
-#define GPR8_OFFSET 68
-#define GPR9_OFFSET 72
-#define GPR10_OFFSET 76
-#define GPR11_OFFSET 80
-#define GPR12_OFFSET 84
-#define GPR13_OFFSET 88
-#define GPR14_OFFSET 92
-#define GPR15_OFFSET 96
-#define GPR16_OFFSET 100
-#define GPR17_OFFSET 104
-#define GPR18_OFFSET 108
-#define GPR19_OFFSET 112
-#define GPR20_OFFSET 116
-#define GPR21_OFFSET 120
-#define GPR22_OFFSET 124
-#define GPR23_OFFSET 128
-#define GPR24_OFFSET 132
-#define GPR25_OFFSET 136
-#define GPR26_OFFSET 140
-#define GPR27_OFFSET 144
-#define GPR28_OFFSET 148
-#define GPR29_OFFSET 152
-#define GPR30_OFFSET 156
-#define GPR31_OFFSET 160
-/*
- * maintain the EABI requested 8 bytes aligment
- * As SVR4 ABI requires 16, make it 16 (as some
- * exception may need more registers to be processed...)
- */
-#define EXCEPTION_FRAME_END 176
-
#ifndef ASM
-#include <rtems.h>
-
/*
* default raw exception handlers
*/
@@ -90,7 +37,6 @@ extern int default_exception_vector_code_prolog_size;
extern void initialize_exceptions(void);
typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
-/*DEBUG typedef rtems_exception_handler_t cpuExcHandlerType; */
/*
* Exception handler table.
@@ -106,10 +52,6 @@ typedef void rtems_exception_handler_t (CPU_Exception_frame* excPtr);
*/
extern rtems_exception_handler_t* exception_handler_table[NUM_EXCEPTIONS];
-/* for compatability -- XXX remove */
-typedef rtems_exception_handler_t *cpuExcHandlerType;
-extern cpuExcHandlerType *globalExceptHdl;
-
#endif /* ASM */
#endif /* _LIBCPU_VECTORS_H */