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author | Daniel Hellstrom <daniel@gaisler.com> | 2016-04-08 14:03:47 +0200 |
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committer | Daniel Hellstrom <daniel@gaisler.com> | 2017-03-06 07:54:55 +0100 |
commit | a7cc0da94f95a1843860c52b45fa2dbd58bd6c5e (patch) | |
tree | 091addb1ad68d746e7633f9c99df92fe7d716421 | |
parent | leon, grspw_pkt: split DMA sem into RX and TX sem (diff) | |
download | rtems-a7cc0da94f95a1843860c52b45fa2dbd58bd6c5e.tar.bz2 |
leon, grspw_pkt: fix stscfg cfg TimeCode Int clr
Without this patch time code interrupts was never cleared
in the STATUS register.
-rw-r--r-- | c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c index 60aa68f936..5f40853ef8 100644 --- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c +++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c @@ -2666,7 +2666,8 @@ STATIC void grspw_isr(void *data) /* Get Status from Hardware */ stat = REG_READ(&priv->regs->status); - stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR) & priv->stscfg; + stat_clrmsk = stat & (GRSPW_STS_TO | GRSPW_STAT_ERROR) & + (GRSPW_STS_TO | priv->stscfg); /* Make sure to put the timecode handling first in order to get the * smallest possible interrupt latency |