diff options
| author | Christian Mauderer <Christian.Mauderer@embedded-brains.de> | 2017-08-01 16:48:09 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-11-17 14:14:18 +0100 |
| commit | a5d49ebd37e65e152a67aa6770db942e0f589a3d (patch) | |
| tree | 169ce58ec104843cb55db39174309185398ad5d8 | |
| parent | bsp/atsam: Move clock and SDRAM init to SRAM. (diff) | |
| download | rtems-a5d49ebd37e65e152a67aa6770db942e0f589a3d.tar.bz2 | |
bsp/atsam: Improve SDRAM initialization.
According to the manual, MR has to be read back and a memory barrier has
to be added after MR is written during SDRAM initialization.
| -rw-r--r-- | c/src/lib/libbsp/arm/atsam/libraries/libboard/source/board_memories.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/atsam/libraries/libboard/source/board_memories.c b/c/src/lib/libbsp/arm/atsam/libraries/libboard/source/board_memories.c index 4c55cbde93..56e233736f 100644 --- a/c/src/lib/libbsp/arm/atsam/libraries/libboard/source/board_memories.c +++ b/c/src/lib/libbsp/arm/atsam/libraries/libboard/source/board_memories.c @@ -203,6 +203,10 @@ void BOARD_ConfigureSdram(void) set Mode to 1 in the Mode Register and perform a write access to any SDRAM address.*/ SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NOP; +#ifdef __rtems__ + (void) SDRAMC->SDRAMC_MR; + __DMB(); +#endif /* __rtems__ */ *pSdram = 0; for (i = 0; i < 100000; i++); @@ -211,6 +215,10 @@ void BOARD_ConfigureSdram(void) The application must set Mode to 2 in the Mode Register and perform a write access to any SDRAM address. */ SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_ALLBANKS_PRECHARGE; +#ifdef __rtems__ + (void) SDRAMC->SDRAMC_MR; + __DMB(); +#endif /* __rtems__ */ *pSdram = 0; for (i = 0; i < 100000; i++); @@ -220,6 +228,10 @@ void BOARD_ConfigureSdram(void) SDRAM location eight times.*/ for (i = 0; i < 8; i++) { SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_AUTO_REFRESH; +#ifdef __rtems__ + (void) SDRAMC->SDRAMC_MR; + __DMB(); +#endif /* __rtems__ */ *pSdram = 0; } @@ -233,6 +245,10 @@ void BOARD_ConfigureSdram(void) 4 banks) bank address, the SDRAM write access should be done at the address 0x70000000.*/ SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_LOAD_MODEREG; +#ifdef __rtems__ + (void) SDRAMC->SDRAMC_MR; + __DMB(); +#endif /* __rtems__ */ *pSdram = 0; for (i = 0; i < 100000; i++); @@ -251,6 +267,10 @@ void BOARD_ConfigureSdram(void) /* 10. The application must go into Normal Mode, setting Mode to 0 in the Mode Register and performing a write access at any location in the SDRAM. */ SDRAMC->SDRAMC_MR = SDRAMC_MR_MODE_NORMAL; +#ifdef __rtems__ + (void) SDRAMC->SDRAMC_MR; + __DMB(); +#endif /* __rtems__ */ *pSdram = 0; for (i = 0; i < 100000; i++); |