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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-10-13 06:23:30 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-10-13 06:24:23 +0200 |
| commit | 97fce5120c08180a86301b03e61d0a06db5f8b9b (patch) | |
| tree | 52a2018b0c44da998cd3d5d6b5508df997eed295 | |
| parent | libmisc/rtems-fdt: Fix missing error string (diff) | |
| download | rtems-97fce5120c08180a86301b03e61d0a06db5f8b9b.tar.bz2 | |
build: Enable RISCV_BOOT_HARTID only for riscv
| -rw-r--r-- | spec/build/cpukit/optboothartid.yml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/spec/build/cpukit/optboothartid.yml b/spec/build/cpukit/optboothartid.yml index ede4e5ead8..f6cf6da6d4 100644 --- a/spec/build/cpukit/optboothartid.yml +++ b/spec/build/cpukit/optboothartid.yml @@ -12,7 +12,7 @@ default-by-variant: - riscv/mpfs64.* description: | boot hartid (processor number) of risc-v cpu (default 0) -enabled-by: true +enabled-by: riscv format: '{}' links: [] name: RISCV_BOOT_HARTID |