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authorMartin Galvan <martin.galvan@tallertechnologies.com>2015-12-15 12:21:03 -0300
committerGedare Bloom <gedare@rtems.org>2015-12-16 14:07:38 -0500
commit867b99f8fdc6ca8b39938bab83060d80ad4261d9 (patch)
treecc68306bb9c6efe3187b1b5ae456fc8c605fb319
parentdoc: SMP status of RTEMS (diff)
downloadrtems-867b99f8fdc6ca8b39938bab83060d80ad4261d9.tar.bz2
Beaglebone Black: Fix rtems_gpio_bsp_disable_interrupt disabling all the GPIO interrupts
Currently, rtems_gpio_bsp_disable_interrupt disables the interrupts for all the pins, not just the one that actually caused the interrupt. This patch fixes that issue. Closes #2497.
-rw-r--r--c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c b/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
index bd2605121a..2a3f7e8206 100644
--- a/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
+++ b/c/src/lib/libbsp/arm/beagle/gpio/bbb-gpio.c
@@ -360,7 +360,7 @@ rtems_status_code rtems_gpio_bsp_disable_interrupt(
rtems_gpio_interrupt interrupt
) {
/* Clear IRQ generation for the specific pin */
- mmio_set(bbb_reg(bank, AM335X_GPIO_IRQSTATUS_CLR_0), BIT(pin));
+ mmio_write(bbb_reg(bank, AM335X_GPIO_IRQSTATUS_CLR_0), BIT(pin));
switch ( interrupt ) {
case FALLING_EDGE: