summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-01-20 14:01:50 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-01-20 14:01:50 +0100
commit60d39b66e0660de4849a17885813d26a2bc374e7 (patch)
tree778ce56cc6f87c6a130405e2958a82d0368e78c6
parentlibnetworking: Fix close of active sockets (diff)
downloadrtems-60d39b66e0660de4849a17885813d26a2bc374e7.tar.bz2
powerpc: Fix AltiVec VSCR save/restore
-rw-r--r--c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h10
-rw-r--r--cpukit/score/cpu/powerpc/ppc-context-validate.S10
-rw-r--r--cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S8
-rw-r--r--cpukit/score/cpu/powerpc/rtems/score/cpu.h5
4 files changed, 19 insertions, 14 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
index 86bd0f11f2..f45c8338a2 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h
@@ -147,8 +147,8 @@ extern "C" {
#define PPC_EXC_GPR_OFFSET(gpr) ((gpr) * PPC_GPR_SIZE + 36)
#define PPC_EXC_VECTOR_PROLOGUE_OFFSET PPC_EXC_GPR_OFFSET(4)
#if defined(PPC_MULTILIB_ALTIVEC) && defined(PPC_MULTILIB_FPU)
- #define PPC_EXC_VSCR_OFFSET 168
- #define PPC_EXC_VRSAVE_OFFSET 172
+ #define PPC_EXC_VRSAVE_OFFSET 168
+ #define PPC_EXC_VSCR_OFFSET 172
#define PPC_EXC_VR_OFFSET(v) ((v) * 16 + 176)
#define PPC_EXC_FR_OFFSET(f) ((f) * 8 + 688)
#define PPC_EXC_FPSCR_OFFSET 944
@@ -159,8 +159,8 @@ extern "C" {
#define PPC_EXC_MIN_FPSCR_OFFSET 528
#define PPC_EXC_MINIMAL_FRAME_SIZE 544
#elif defined(PPC_MULTILIB_ALTIVEC)
- #define PPC_EXC_VSCR_OFFSET 168
- #define PPC_EXC_VRSAVE_OFFSET 172
+ #define PPC_EXC_VRSAVE_OFFSET 168
+ #define PPC_EXC_VSCR_OFFSET 172
#define PPC_EXC_VR_OFFSET(v) ((v) * 16 + 176)
#define PPC_EXC_FRAME_SIZE 688
#define PPC_EXC_MIN_VSCR_OFFSET 92
@@ -304,7 +304,9 @@ typedef struct {
PPC_GPR_TYPE GPR12;
uint32_t EARLY_INSTANT;
#ifdef PPC_MULTILIB_ALTIVEC
+ /* This field must take stvewx/lvewx requirements into account */
uint32_t VSCR;
+
uint8_t V0[16];
uint8_t V1[16];
uint8_t V2[16];
diff --git a/cpukit/score/cpu/powerpc/ppc-context-validate.S b/cpukit/score/cpu/powerpc/ppc-context-validate.S
index 0e64cc58ee..b34438a361 100644
--- a/cpukit/score/cpu/powerpc/ppc-context-validate.S
+++ b/cpukit/score/cpu/powerpc/ppc-context-validate.S
@@ -85,9 +85,9 @@
#define V31_OFFSET VOFFSET(11)
#define VTMP_OFFSET VOFFSET(12)
#define VTMP2_OFFSET VOFFSET(13)
- #define VSCR_OFFSET VOFFSET(14)
- #define VRSAVE_OFFSET (VSCR_OFFSET + 4)
- #define ALTIVECEND (VRSAVE_OFFSET + 4)
+ #define VRSAVE_OFFSET VOFFSET(14)
+ #define VSCR_OFFSET (VOFFSET(14) + 12)
+ #define ALTIVECEND VOFFSET(15)
#else
#define ALTIVECEND FPUEND
#endif
@@ -510,9 +510,9 @@ check:
li r4, VTMP_OFFSET
stvx v0, r1, r4
mfvscr v0
- li r4, VTMP2_OFFSET
+ li r4, VTMP2_OFFSET + 12
stvewx v0, r1, r4
- lwz r4, VTMP2_OFFSET(r1)
+ lwz r4, VTMP2_OFFSET + 12(r1)
lwz r5, VSCR_OFFSET(r1)
cmpw r5, r4
bne restore
diff --git a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
index 17bcb92d7d..d0c2159a06 100644
--- a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
+++ b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S
@@ -80,15 +80,15 @@ _CPU_Context_volatile_clobber:
/* Negate VSCR[SAT] bit */
mfvscr v0
- li r3, 16
+ li r3, 28
stvewx v0, r1, r3
- lwz r0, 16(r1)
+ lwz r0, 28(r1)
nor r3, r0, r0
rlwinm r0, r0, 0, 0, 30
rlwinm r3, r3, 0, 31, 31
or r0, r3, r0
- stw r0, 16(r1)
- li r3, 16
+ stw r0, 28(r1)
+ li r3, 28
lvewx v0, r1, r3
mtvscr v0
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index 98aa4e4bf3..c305c77d1b 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -1197,8 +1197,11 @@ typedef struct {
uint32_t reserved_for_alignment;
#endif
#ifdef PPC_MULTILIB_ALTIVEC
- uint32_t VSCR;
uint32_t VRSAVE;
+
+ /* This field must take stvewx/lvewx requirements into account */
+ uint32_t VSCR;
+
uint8_t V0[16];
uint8_t V1[16];
uint8_t V2[16];