score: Use atomic operations for SMP messages

3 files changed, 15 insertions, 19 deletions

diff --git a/cpukit/score/include/rtems/score/percpu.h b/cpukit/score/include/rtems/score/percpu.h
index 12c5b1d3d1..7f063eafb8 100644
--- a/cpukit/score/include/rtems/score/percpu.h
+++ b/cpukit/score/include/rtems/score/percpu.h
@@ -302,11 +302,12 @@ typedef struct Per_CPU_Control {
     SMP_lock_Context Giant_lock_context;
 
     /**
-     *  This is the request for the interrupt.
+     * @brief Bit field for SMP messages.
      *
-     *  @note This may become a chain protected by atomic instructions.
+     * This bit field is not protected locks.  Atomic operations are used to
+     * set and get the message bits.
      */
-    uint32_t message;
+    Atomic_Ulong message;
 
     /**
      * @brief Indicates the current state of the CPU.
diff --git a/cpukit/score/include/rtems/score/smpimpl.h b/cpukit/score/include/rtems/score/smpimpl.h
index 1868546996..ac04833aa7 100644
--- a/cpukit/score/include/rtems/score/smpimpl.h
+++ b/cpukit/score/include/rtems/score/smpimpl.h
@@ -41,14 +41,14 @@ extern "C" {
  *
  * @see _SMP_Send_message().
  */
-#define SMP_MESSAGE_SHUTDOWN UINT32_C(0x1)
+#define SMP_MESSAGE_SHUTDOWN 0x1UL
 
 /**
  * @brief SMP message to request a test handler invocation.
  *
  * @see _SMP_Send_message().
  */
-#define SMP_MESSAGE_TEST UINT32_C(0x2)
+#define SMP_MESSAGE_TEST 0x2UL
 
 /**
  * @brief SMP fatal codes.
@@ -132,14 +132,12 @@ static inline void _SMP_Inter_processor_interrupt_handler( void )
 {
   Per_CPU_Control *cpu_self = _Per_CPU_Get();
 
-  if ( cpu_self->message != 0 ) {
-    uint32_t  message;
-    ISR_Level level;
-
-    _Per_CPU_ISR_disable_and_acquire( cpu_self, level );
-    message = cpu_self->message;
-    cpu_self->message = 0;
-    _Per_CPU_Release_and_ISR_enable( cpu_self, level );
+  if ( _Atomic_Load_ulong( &cpu_self->message, ATOMIC_ORDER_RELAXED ) != 0 ) {
+    unsigned long message = _Atomic_Exchange_ulong(
+      &cpu_self->message,
+      0UL,
+      ATOMIC_ORDER_RELAXED
+    );
 
     if ( ( message & SMP_MESSAGE_SHUTDOWN ) != 0 ) {
       rtems_fatal( RTEMS_FATAL_SOURCE_SMP, SMP_FATAL_SHUTDOWN );
@@ -160,7 +158,7 @@ static inline void _SMP_Inter_processor_interrupt_handler( void )
  *  @param[in] cpu_index The target processor of the message.
  *  @param[in] message The message.
  */
-void _SMP_Send_message( uint32_t cpu_index, uint32_t message );
+void _SMP_Send_message( uint32_t cpu_index, unsigned long message );
 
 /**
  *  @brief Request of others CPUs.
diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c
index 3094fe31f8..87078887ec 100644
--- a/cpukit/score/src/smp.c
+++ b/cpukit/score/src/smp.c
@@ -140,14 +140,11 @@ void _SMP_Request_shutdown( void )
   _Giant_Drop( self_cpu );
 }
 
-void _SMP_Send_message( uint32_t cpu_index, uint32_t message )
+void _SMP_Send_message( uint32_t cpu_index, unsigned long message )
 {
   Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
-  ISR_Level level;
 
-  _Per_CPU_ISR_disable_and_acquire( cpu, level );
-  cpu->message |= message;
-  _Per_CPU_Release_and_ISR_enable( cpu, level );
+  _Atomic_Fetch_or_ulong( &cpu->message, message, ATOMIC_ORDER_RELAXED );
 
   _CPU_SMP_Send_interrupt( cpu_index );
 }