Use fixed-width C99 types for PowerPC in_be16() and co.

Also use the const qualifier on the address pointer's target in in_*()

Closes #2128

24 files changed, 185 insertions, 175 deletions

diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/discovery.c b/c/src/lib/libbsp/powerpc/beatnik/marvell/discovery.c
index 801d2c99d1..c6f647581f 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/marvell/discovery.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/marvell/discovery.c
@@ -57,6 +57,7 @@
 #include <bsp.h>
 #include <bsp/gtreg.h>
 #include <bsp/pci.h>
+#include <stdint.h>
 
 #ifndef PCI_VENDOR_ID_MARVELL
 #define PCI_VENDOR_ID_MARVELL 0x11ab
@@ -78,16 +79,16 @@
 static unsigned long
 pci_early_config_read(int offset, int width)
 {
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(0<<8)|(PCI_DEVFN(0,0)<<16)|((offset&~3)<<24));
 	switch (width) {
 		default:
 		case 1:
-			return in_8((unsigned char*)pci.pci_config_data + (offset&3));
+			return in_8((uint8_t*)pci.pci_config_data + (offset&3));
 		case 2:
-			return in_le16((unsigned short*)pci.pci_config_data + (offset&3));
+			return in_le16((uint16_t*)pci.pci_config_data + (offset&3));
 		case 4:
-			return in_le32((unsigned long *)pci.pci_config_data + (offset&3));
+			return in_le32((uint32_t *)pci.pci_config_data + (offset&3));
 	}
 }
 #endif
diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c b/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
index e53e8e10a1..b9a5cc8db0 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/marvell/gt_timer.c
@@ -69,12 +69,12 @@
 
 static inline uint32_t gt_rd(uint32_t off)
 {
-  return in_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off) );
+  return in_le32( (volatile uint32_t *)(BSP_MV64x60_BASE+off) );
 }
 
 static inline void gt_wr(uint32_t off, uint32_t val)
 {
-  out_le32( (volatile unsigned *)(BSP_MV64x60_BASE+off), val);
+  out_le32( (volatile uint32_t *)(BSP_MV64x60_BASE+off), val);
 }
 
 static inline uint32_t gt_timer_bitmod(uint32_t off, uint32_t clr, uint32_t set)
diff --git a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c.c b/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c.c
index 2cc67f3258..c602bac5eb 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/marvell/gti2c.c
@@ -113,13 +113,13 @@ static gti2c_desc_rec my_bus_tbl = {
 static inline uint32_t
 gt_read(uint32_t base, uint32_t off)
 {
-	return in_le32((volatile unsigned*)(base+off));
+	return in_le32((volatile uint32_t*)(base+off));
 }
 
 static inline void
 gt_write(uint32_t base, uint32_t off, uint32_t val)
 {
-	out_le32((volatile unsigned*)(base+off), val);
+	out_le32((volatile uint32_t*)(base+off), val);
 }
 
 
@@ -206,7 +206,7 @@ struct gti2c_softc * const sc = &my_bus_tbl.pvt;
  */
 {unsigned from,to;
 	asm volatile("mftb %0":"=r"(from));
-	while ( in_le32((volatile unsigned*)0xf100000c) & 0x20 )
+	while ( in_le32((volatile uint32_t*)0xf100000c) & 0x20 )
 		;
 	asm volatile("mftb %0":"=r"(to));
 	printk("I2C IRQ remained asserted for %i TB ticks!\n",to-from);
diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe.c b/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe.c
index b707fb8410..23fca30c46 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/network/if_gfe/if_gfe.c
@@ -1758,7 +1758,7 @@ gfe_tx_enqueue(struct gfe_softc *sc, enum gfe_txprio txprio)
 	 */
 	d = NEXT_TXD(l);
 
-	out_be32((unsigned int*)&d->ed_cmdsts,0);
+	out_be32((uint32_t*)&d->ed_cmdsts,0);
 
 	GE_TXDPRESYNC(sc, txq, d - txq->txq_descs);
 
diff --git a/c/src/lib/libbsp/powerpc/beatnik/network/porting/rtemscompat.h b/c/src/lib/libbsp/powerpc/beatnik/network/porting/rtemscompat.h
index ea1c251261..2451af76a9 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/network/porting/rtemscompat.h
+++ b/c/src/lib/libbsp/powerpc/beatnik/network/porting/rtemscompat.h
@@ -150,18 +150,18 @@ union {
 
 
 #ifdef __PPC__
-#define _out_byte(a,v) out_8((volatile unsigned char*)(a),(v))
-#define _inp_byte(a)   in_8((volatile unsigned char*)(a))
+#define _out_byte(a,v) out_8((volatile uint8_t*)(a),(v))
+#define _inp_byte(a)   in_8((volatile uint8_t*)(a))
 #ifdef NET_CHIP_LE
-#define _out_word(a,v) out_le16((volatile unsigned short*)(a),(v))
-#define _out_long(a,v) out_le32((volatile unsigned *)(a),(v))
-#define _inp_word(a)   in_le16((volatile unsigned short*)(a))
-#define _inp_long(a)   in_le32((volatile unsigned *)(a))
+#define _out_word(a,v) out_le16((volatile uint16_t*)(a),(v))
+#define _out_long(a,v) out_le32((volatile uint32_t *)(a),(v))
+#define _inp_word(a)   in_le16((volatile uint16_t*)(a))
+#define _inp_long(a)   in_le32((volatile uint32_t *)(a))
 #elif defined(NET_CHIP_BE)
-#define _out_word(a,v) out_be16((volatile unsigned short*)(a),(v))
-#define _out_long(a,v) out_be32((volatile unsigned *)(a),(v))
-#define _inp_word(a)   in_be16((volatile unsigned short*)(a))
-#define _inp_long(a)   in_be32((volatile unsigned *)(a))
+#define _out_word(a,v) out_be16((volatile uint16_t*)(a),(v))
+#define _out_long(a,v) out_be32((volatile uint32_t *)(a),(v))
+#define _inp_word(a)   in_be16((volatile uint16_t*)(a))
+#define _inp_long(a)   in_be32((volatile uint32_t *)(a))
 #else
 #error rtemscompat_defs.h must define either NET_CHIP_LE or NET_CHIP_BE
 #endif
diff --git a/c/src/lib/libbsp/powerpc/beatnik/pci/gt_pci_init.c b/c/src/lib/libbsp/powerpc/beatnik/pci/gt_pci_init.c
index 0bd9db0940..82afd324c6 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/pci/gt_pci_init.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/pci/gt_pci_init.c
@@ -83,7 +83,7 @@ indirect_pci_read_config_byte(unsigned char bus, unsigned char slot,
 			      unsigned char function, 
 			      unsigned char offset, uint8_t *val) {
 HOSE_PREAMBLE;
-	out_be32((volatile unsigned *) pci.pci_config_addr, 
+	out_be32((volatile uint32_t *) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	*val = in_8(pci.pci_config_data + (offset&3));
 	return PCIBIOS_SUCCESSFUL;
@@ -96,9 +96,9 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char slot,
 HOSE_PREAMBLE;
 	*val = 0xffff; 
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
-	*val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)));
+	*val = in_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)));
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -109,9 +109,9 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char slot,
 HOSE_PREAMBLE;
 	*val = 0xffffffff; 
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24));
-	*val = in_le32((volatile unsigned *)pci.pci_config_data);
+	*val = in_le32((volatile uint32_t *)pci.pci_config_data);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -120,7 +120,7 @@ indirect_pci_write_config_byte(unsigned char bus, unsigned char slot,
 			       unsigned char function, 
 			       unsigned char offset, uint8_t val) {
 HOSE_PREAMBLE;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
 	out_8(pci.pci_config_data + (offset&3), val);
 	return PCIBIOS_SUCCESSFUL;
@@ -132,9 +132,9 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char slot,
 			       unsigned char offset, uint16_t val) {
 HOSE_PREAMBLE;
 	if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|((offset&~3)<<24));
-	out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val);
+	out_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)), val);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -144,9 +144,9 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char slot,
 				unsigned char offset, uint32_t val) {
 HOSE_PREAMBLE;
 	if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
-	out_be32((unsigned int*) pci.pci_config_addr, 
+	out_be32((uint32_t*) pci.pci_config_addr,
 		 0x80|(bus<<8)|(PCI_DEVFN(slot,function)<<16)|(offset<<24));
-	out_le32((volatile unsigned *)pci.pci_config_data, val);
+	out_le32((volatile uint32_t *)pci.pci_config_data, val);
 	return PCIBIOS_SUCCESSFUL;
 }
 
diff --git a/c/src/lib/libbsp/powerpc/beatnik/pci/motload_fixup.c b/c/src/lib/libbsp/powerpc/beatnik/pci/motload_fixup.c
index 91dc013c1f..f3bc120be8 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/pci/motload_fixup.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/pci/motload_fixup.c
@@ -96,36 +96,36 @@ uint32_t	b0,b1,r0,r1,lim,dis;
 	 *  whereas the mvme6100 does it the other way round...
 	 */
 
-	b0 = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_Low_Decode) );
-	b1 = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_Low_Decode) );
+	b0 = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_Low_Decode) );
+	b1 = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_Low_Decode) );
 
-	r0 = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap) );
-	r1 = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap) );
+	r0 = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap) );
+	r1 = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap) );
 
 	switch ( BSP_getDiscoveryVersion(0) ) {
 		case MV_64360:
 			/* In case of the MV64360 the 'limit' is actually a 'size'!
 			 * Disable by setting special bits in the 'BAR disable reg'.
 			 */
-			dis = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL) );
+			dis = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL) );
 			/* disable PCI0 I/O and PCI1 I/O */
-			out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL), dis | (1<<9) | (1<<14) );
+			out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL), dis | (1<<9) | (1<<14) );
 			/* remap busses on hose 0; if the remap register was already set, assume
 			 * that someone else [such as the bootloader] already performed the fixup
 			 */
 			if ( (b0 & 0xffff) && 0 == (r0 & 0xffff) ) {
 				rtems_pci_io_remap( 0, BSP_pci_hose1_bus_base, (b0 & 0xffff)<<16 );
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap), (b0 & 0xffff) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap), (b0 & 0xffff) );
 			}
 
 			/* remap busses on hose 1 */
 			if ( (b1 & 0xffff) && 0 == (r1 & 0xffff) ) {
 				rtems_pci_io_remap( BSP_pci_hose1_bus_base, pci_bus_count(), (b1 & 0xffff)<<16 );
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap), (b1 & 0xffff) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap), (b1 & 0xffff) );
 			}
 
 			/* re-enable */
-			out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL), dis );
+			out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + MV_64360_BASE_ADDR_DISBL), dis );
 		break;
 
 		case GT_64260_A:
@@ -133,32 +133,32 @@ uint32_t	b0,b1,r0,r1,lim,dis;
 			
 			if ( (b0 & 0xfff) && 0 == (r0 & 0xfff) ) { /* base are only 12 bits */
 				/* switch window off by setting the limit < base */
-				lim = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode) );
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode), 0 );
+				lim = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode), 0 );
 				/* remap busses on hose 0 */
 				rtems_pci_io_remap( 0, BSP_pci_hose1_bus_base, (b0 & 0xfff)<<20 );
 
 				/* BTW: it seems that writing the base register also copies the
 				 * value into the 'remap' register automatically (??)
 				 */
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap), (b0 & 0xfff) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_Remap), (b0 & 0xfff) );
 
 				/* re-enable */
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode), lim );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI0_IO_High_Decode), lim );
 			}
 
 			if ( (b1 & 0xfff) && 0 == (r1 & 0xfff) ) { /* base are only 12 bits */
 				/* switch window off by setting the limit < base */
-				lim = in_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode) );
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode), 0 );
+				lim = in_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode), 0 );
 
 				/* remap busses on hose 1 */
 				rtems_pci_io_remap( BSP_pci_hose1_bus_base, pci_bus_count(), (b1 & 0xfff)<<20 );
 
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap), (b1 & 0xfff) );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_Remap), (b1 & 0xfff) );
 
 				/* re-enable */
-				out_le32( (volatile unsigned*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode), lim );
+				out_le32( (volatile uint32_t*)(BSP_MV64x60_BASE + GT_PCI1_IO_High_Decode), lim );
 			}
 		break;
 
diff --git a/c/src/lib/libbsp/powerpc/beatnik/startup/bspreset.c b/c/src/lib/libbsp/powerpc/beatnik/startup/bspreset.c
index ecdc03404c..68540847ee 100644
--- a/c/src/lib/libbsp/powerpc/beatnik/startup/bspreset.c
+++ b/c/src/lib/libbsp/powerpc/beatnik/startup/bspreset.c
@@ -4,6 +4,7 @@
 #include <rtems/bspIo.h>
 #include <libcpu/io.h>
 #include <libcpu/stackTrace.h>
+#include <stdint.h>
 
 void bsp_reset()
 {
@@ -13,5 +14,5 @@ void bsp_reset()
 
   printk("RTEMS terminated; Rebooting ...\n");
   /* Mvme5500 board reset : 2004 S. Kate Feng <feng1@bnl.gov>  */
-  out_8((volatile unsigned char*) (BSP_MV64x60_DEV1_BASE +2), 0x80);
+  out_8((volatile uint8_t*) (BSP_MV64x60_DEV1_BASE +2), 0x80);
 }
diff --git a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c b/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c
index f92cfadf82..deee170df9 100644
--- a/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c
+++ b/c/src/lib/libbsp/powerpc/ep1a/console/rsPMCQ1.c
@@ -58,15 +58,15 @@ static void MsDelay(void)
 }
 
 static void write8( int addr, int data ){
-  out_8((void *)addr, (unsigned char)data);
+  out_8((uint8_t *)addr, (uint8_t)data);
 }
 
 static void write16( int addr, int data ) {
-  out_be16((void *)addr, (short)data );
+  out_be16((uint16_t *)addr, (uint16_t)data );
 }
 
 static void write32( int addr, int data ) {
-  out_be32((unsigned int *)addr, data );
+  out_be32((uint32_t *)addr, (uint32_t)data );
 }
 
 static void rsPMCQ1_scc_nullFunc(void) {}
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h b/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h
index 62992398fd..eb92150767 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h
+++ b/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h
@@ -110,7 +110,7 @@
 #define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
 #define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
 #define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
-#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((unsigned int*)(addr), (val))
+#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((uint32_t*)(addr), (val))
 
 #define BSP_CONSOLE_PORT	BSP_UART_COM1
 #define BSP_UART_BAUD_BASE	(-9600) /* use existing divisor to determine clock rate */
diff --git a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
index 86b9ec0744..d384f557b7 100644
--- a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c
@@ -142,13 +142,13 @@ char *save_boot_params(
 static inline uint32_t
 _ccsr_rd32(uint32_t off)
 {
-  return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
+  return in_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off) );
 }
 
 static inline void
 _ccsr_wr32(uint32_t off, uint32_t val)
 {
-  out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
+  out_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off), val );
 }
 
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
index 0f99deed77..ca5fa70cfc 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
@@ -27,6 +27,7 @@
  *
  */
 
+#include <inttypes.h>
 #include <stdio.h>
 #include <rtems/system.h>
 #include <bsp.h>
@@ -314,8 +315,8 @@ void BSP_enable_irq_at_pic(const rtems_irq_number irqNum)
 #endif
   BSP_irqMask_cache[regNum] |= (1 << bitNum);
 
-  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
-  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+  out_le32((volatile uint32_t *)BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32((volatile uint32_t *)BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
 
   rtems_interrupt_enable(level);
 }
@@ -342,8 +343,8 @@ int BSP_disable_irq_at_pic(const rtems_irq_number irqNum)
 
   BSP_irqMask_cache[regNum] &=  ~(1 << bitNum);
 
-  out_le32(BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
-  while (in_le32(BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
+  out_le32((volatile uint32_t *)BSP_irqMask_reg[regNum], BSP_irqMask_cache[regNum]);
+  while (in_le32((volatile uint32_t *)BSP_irqMask_reg[regNum]) != BSP_irqMask_cache[regNum]);
 
   rtems_interrupt_enable(level);
 
@@ -372,39 +373,39 @@ int BSP_setup_the_pic(rtems_irq_global_settings* config)
    * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
    * MOTload default is set as level sensitive(1). Set it agin to make sure.
    */
-  out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
-           (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
+  out_le32((volatile uint32_t *)GT_CommUnitArb_Ctrl,
+           (in_le32((volatile uint32_t *)GT_CommUnitArb_Ctrl)| (1<<10)));
 
 #if 0
-  printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
-         in_le32(BSP_irqMask_reg[0]),
-         in_le32(BSP_irqCause_reg[0]));
-  printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
-         in_le32(BSP_irqMask_reg[1]),
-         in_le32(BSP_irqCause_reg[1]));
-  printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
-         in_le32(BSP_irqMask_reg[2]),
-         in_le32(BSP_irqCause_reg[2]));
+  printk("BSP_irqMask_reg[0] = 0x%" PRIx32 ", BSP_irqCause_reg[0] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[0]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[0]));
+  printk("BSP_irqMask_reg[1] = 0x%" PRIx32 ", BSP_irqCause_reg[1] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[1]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[1]));
+  printk("BSP_irqMask_reg[2] = 0x%" PRIx32 ", BSP_irqCause_reg[2] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[2]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[2]));
 #endif
 
   /* Initialize the interrupt related  registers */
   for (i=0; i<3; i++) {
-    out_le32(BSP_irqCause_reg[i], 0);
-    out_le32(BSP_irqMask_reg[i], 0);
+    out_le32((volatile uint32_t *)BSP_irqCause_reg[i], 0);
+    out_le32((volatile uint32_t *)BSP_irqMask_reg[i], 0);
   }
-  in_le32(BSP_irqMask_reg[2]);
+  in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
   compute_pic_masks_from_prio();
 
 #if 0
-  printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
-         in_le32(BSP_irqMask_reg[0]),
-         in_le32(BSP_irqCause_reg[0]));
-  printk("BSP_irqMask_reg[1] = 0x%x, BSP_irqCause_reg[1] 0x%x\n",
-         in_le32(BSP_irqMask_reg[1]),
-         in_le32(BSP_irqCause_reg[1]));
-  printk("BSP_irqMask_reg[2] = 0x%x, BSP_irqCause_reg[2] 0x%x\n",
-         in_le32(BSP_irqMask_reg[2]),
-         in_le32(BSP_irqCause_reg[2]));
+  printk("BSP_irqMask_reg[0] = 0x%" PRIx32 ", BSP_irqCause_reg[0] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[0]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[0]));
+  printk("BSP_irqMask_reg[1] = 0x%" PRIx32 ", BSP_irqCause_reg[1] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[1]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[1]));
+  printk("BSP_irqMask_reg[2] = 0x%" PRIx32 ", BSP_irqCause_reg[2] 0x%" PRIx32 "\n",
+         in_le32((volatile uint32_t *)BSP_irqMask_reg[2]),
+         in_le32((volatile uint32_t *)BSP_irqCause_reg[2]));
 #endif
 
   /*
@@ -442,7 +443,7 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
   }
 
   for (j=0; j<3; j++ ) oldMask[j] = BSP_irqMask_cache[j];
-  for (j=0; j<3; j++) irqCause[j] = in_le32(BSP_irqCause_reg[j]) & in_le32(BSP_irqMask_reg[j]);
+  for (j=0; j<3; j++) irqCause[j] = in_le32((volatile uint32_t *)BSP_irqCause_reg[j]) & in_le32((volatile uint32_t *)BSP_irqMask_reg[j]);
 
   while (((irq = picPrioTable[i++])!=-1)&& (loop++ < MAX_IRQ_LOOP))
   {
@@ -450,19 +451,19 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum)
       for (j=0; j<3; j++)
         BSP_irqMask_cache[j] &= (~ BSP_irq_prio_mask_tbl[j][irq]);
 
-      out_le32(BSP_irqMask_reg[0], BSP_irqMask_cache[0]);
-      out_le32(BSP_irqMask_reg[1], BSP_irqMask_cache[1]);
-      out_le32(BSP_irqMask_reg[2], BSP_irqMask_cache[2]);
-      in_le32(BSP_irqMask_reg[2]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[0], BSP_irqMask_cache[0]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[1], BSP_irqMask_cache[1]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[2], BSP_irqMask_cache[2]);
+      in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
 
       bsp_irq_dispatch_list( rtems_hdl_tbl, irq, default_rtems_hdl);
 
       for (j=0; j<3; j++ ) BSP_irqMask_cache[j] = oldMask[j];
 
-      out_le32(BSP_irqMask_reg[0], oldMask[0]);
-      out_le32(BSP_irqMask_reg[1], oldMask[1]);
-      out_le32(BSP_irqMask_reg[2], oldMask[2]);
-      in_le32(BSP_irqMask_reg[2]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[0], oldMask[0]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[1], oldMask[1]);
+      out_le32((volatile uint32_t *)BSP_irqMask_reg[2], oldMask[2]);
+      in_le32((volatile uint32_t *)BSP_irqMask_reg[2]);
     }
   }
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
index b6a51848e8..25be33959c 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
@@ -39,6 +39,7 @@
 #include <rtems.h>
 #include <rtems/bspIo.h>      /* printk */
 
+#include <inttypes.h>
 #include <stdio.h>	      /* printf for statistics */
 #include <string.h>
 
@@ -217,8 +218,8 @@ struct wm_softc {
 #define	WM_F_BUS64		0x20	/* bus is 64-bit */
 #define	WM_F_PCIX		0x40	/* bus is PCI-X */
 
-#define	CSR_READ(sc,reg) in_le32((volatile unsigned *)(sc->sc_membase+reg))
-#define	CSR_WRITE(sc,reg,val) out_le32((volatile unsigned *)(sc->sc_membase+reg), val)
+#define	CSR_READ(sc,reg) in_le32((volatile uint32_t *)(sc->sc_membase+reg))
+#define	CSR_WRITE(sc,reg,val) out_le32((volatile uint32_t *)(sc->sc_membase+reg), val)
 
 #define	WM_CDTXADDR(sc)	( (uint32_t) &sc->sc_txdescs[0] )
 #define	WM_CDRXADDR(sc)	( (uint32_t) &sc->sc_rxdescs[0] )
@@ -540,18 +541,18 @@ static void i82544EI_stats(struct wm_softc *sc)
 
   printf("    Ghost Interrupts:%-8lu\n", sc->stats.ghostInterrupts);
   printf("       Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
-  printf("     Receive Packets:%-8u\n", CSR_READ(sc,WMREG_GPRC));
+  printf("     Receive Packets:%-8u\n", (unsigned)CSR_READ(sc,WMREG_GPRC));
   printf("     Receive Overrun:%-8lu\n", sc->stats.rxOvrRunInterrupts);
-  printf("     Receive  errors:%-8u\n", CSR_READ(sc,WMREG_RXERRC));
+  printf("     Receive  errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_RXERRC));
   printf("   Rx sequence error:%-8lu\n", sc->stats.rxSeqErr);
   printf("      Rx /C/ ordered:%-8lu\n", sc->stats.rxC_ordered);
-  printf("    Rx Length Errors:%-8u\n", CSR_READ(sc,WMREG_RLEC));
+  printf("    Rx Length Errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_RLEC));
   printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
-  printf("   Transmitt Packets:%-8u\n", CSR_READ(sc,WMREG_GPTC));
+  printf("   Transmitt Packets:%-8u\n", (unsigned)CSR_READ(sc,WMREG_GPTC));
   printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
   printf("         Active Txqs:%-8lu\n", sc->txq_nactive);
-  printf("          collisions:%-8u\n", CSR_READ(sc,WMREG_COLC));
-  printf("          Crc Errors:%-8u\n", CSR_READ(sc,WMREG_CRCERRS));
+  printf("          collisions:%-8u\n", (unsigned)CSR_READ(sc,WMREG_COLC));
+  printf("          Crc Errors:%-8u\n", (unsigned)CSR_READ(sc,WMREG_CRCERRS));
   printf("  Link Status Change:%-8lu\n", sc->stats.linkStatusChng);
 }
 
@@ -1146,21 +1147,21 @@ static int i82544EI_init_hw(struct wm_softc *sc)
 
 void BSP_rdTIDV(void)
 {
-  printf("Reg TIDV: 0x%x\n", in_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_TIDV)));
+  printf("Reg TIDV: 0x%" PRIx32 "\n", in_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_TIDV)));
 }
 void BSP_rdRDTR(void)
 {
-  printf("Reg RDTR: 0x%x\n", in_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_RDTR)));
+  printf("Reg RDTR: 0x%" PRIx32 "\n", in_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_RDTR)));
 }
 
 void BSP_setTIDV(int val)
 {
-  out_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_TIDV), val);
+  out_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_TIDV), val);
 }
 
 void BSP_setRDTR(int val)
 {
-  out_le32((volatile unsigned *) (BSP_1GHz_membase+WMREG_RDTR), val);
+  out_le32((volatile uint32_t *) (BSP_1GHz_membase+WMREG_RDTR), val);
 }
 /*
  * i82544EI_ifinit:		[ifnet interface function]
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
index d3ffa1e455..8601721c03 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
@@ -102,7 +102,7 @@ unsigned char offset, uint8_t *val)
     BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
 #endif
 
-  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_be32((volatile uint32_t *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
   *val = in_8(BSP_pci[n].pci_config_data + (offset&3));
   return PCIBIOS_SUCCESSFUL;
 }
@@ -123,8 +123,8 @@ unsigned char func, unsigned char offset, uint16_t *val)
   printk("addr %x, data %x, pack %x \n", config_addr,
     config_data,pciConfigPack(bus,dev,func,offset));
 #endif
-  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
+  out_be32((volatile uint32_t *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le16((volatile uint16_t *) (BSP_pci[n].pci_config_data + (offset&2)));
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -141,8 +141,8 @@ unsigned char func, unsigned char offset, uint32_t *val)
   *val = 0xffffffff;
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  *val = in_le32((volatile uint32_t *)BSP_pci[n].pci_config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -157,8 +157,8 @@ static int indirect_pci_write_config_byte(unsigned char bus, unsigned char dev,u
 
   if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_8((volatile uint8_t *) (BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -173,8 +173,8 @@ static int indirect_pci_write_config_word(unsigned char bus, unsigned char dev,u
 
   if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le16((volatile uint16_t *)(BSP_pci[n].pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -189,8 +189,8 @@ static int indirect_pci_write_config_dword(unsigned char bus,unsigned char dev,u
 
   if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
 
-  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
-  out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
+  out_be32((volatile uint32_t *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
+  out_le32((volatile uint32_t *)BSP_pci[n].pci_config_data, val);
   return PCIBIOS_SUCCESSFUL;
 }
 
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
index d22691b724..9f7be59151 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/pci/pci_interface.c
@@ -23,6 +23,8 @@
 #include <bsp/gtreg.h>
 #include <bsp/gtpcireg.h>
 
+#include <inttypes.h>
+
 #define PCI_DEBUG     0
 
 #if 0
@@ -71,10 +73,10 @@ void pci_interface(void)
 
 #ifdef CPU2PCI_ORDER
     /* MOTLOad deafult : 0x07ff8600 */
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+CNT_SYNC_REG), 0x07fff600);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+CNT_SYNC_REG), 0x07fff600);
 #endif
     /* asserts SERR upon various detection */
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+0xc28), 0x3fffff);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+0xc28), 0x3fffff);
     pciAccessInit();
 }
 
@@ -83,15 +85,15 @@ void pciAccessInit(void)
   unsigned int PciLocal, data;
 
   for (PciLocal=0; PciLocal < 2; PciLocal++) {
-    data = in_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
+    data = in_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)));
 #if 0
     printk("PCI%d_ACCESS_CNTL_BASE0_LOW was 0x%x\n",PciLocal,data);
 #endif
     data |= PCI_ACCCTLBASEL_VALUE;
     data &= ~0x300000;
-    out_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)), data);
+    out_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80)), data);
 #if 0
-      printf("PCI%d_ACCESS_CNTL_BASE0_LOW now 0x%x\n",PciLocal,in_le32((volatile unsigned int *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))));
+      printf("PCI%d_ACCESS_CNTL_BASE0_LOW now 0x%" PRIx32 "\n",PciLocal,in_le32((volatile uint32_t *)(GT64x60_REG_BASE+PCI0_ACCESS_CNTL_BASE0_LOW+(PciLocal * 0x80))));
 #endif
   }
 }
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
index b25888e727..de15bc4972 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
+++ b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspreset.c
@@ -8,6 +8,7 @@
 #include <rtems/bspIo.h>
 #include <libcpu/io.h>
 #include <libcpu/stackTrace.h>
+#include <stdint.h>
 
 void bsp_reset()
 {
@@ -17,5 +18,5 @@ void bsp_reset()
 
   printk("RTEMS terminated; Rebooting ...\n");
   /* Mvme5500 board reset : 2004 S. Kate Feng <feng1@bnl.gov>  */
-  out_8((volatile unsigned char*) (GT64x60_DEV1_BASE +2), 0x80);
+  out_8((volatile uint8_t*) (GT64x60_DEV1_BASE +2), 0x80);
 }
diff --git a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
index 4d51b35d5a..59bf8620fa 100644
--- a/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/bootloader/pci.c
@@ -571,7 +571,7 @@ indirect_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
    if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
    out_be32(pci->config_addr,
             0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-   *val=in_le16((volatile u_short *)(pci->config_data + (offset&3)));
+   *val=in_le16((volatile uint16_t *)(pci->config_data + (offset&3)));
    return PCIBIOS_SUCCESSFUL;
 }
 
@@ -582,7 +582,7 @@ indirect_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
    if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
    out_be32(pci->config_addr,
             0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
-   *val=in_le32((volatile u_int *)pci->config_data);
+   *val=in_le32((volatile uint32_t *)pci->config_data);
    return PCIBIOS_SUCCESSFUL;
 }
 
@@ -601,7 +601,7 @@ indirect_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
    if (offset&1) return PCIBIOS_BAD_REGISTER_NUMBER;
    out_be32(pci->config_addr,
             0x80|(bus<<8)|(dev_fn<<16)|((offset&~3)<<24));
-   out_le16((volatile u_short *)(pci->config_data + (offset&3)), val);
+   out_le16((volatile uint16_t *)(pci->config_data + (offset&3)), val);
    return PCIBIOS_SUCCESSFUL;
 }
 
@@ -611,7 +611,7 @@ indirect_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
    if (offset&3) return PCIBIOS_BAD_REGISTER_NUMBER;
    out_be32(pci->config_addr,
             0x80|(bus<<8)|(dev_fn<<16)|(offset<<24));
-   out_le32((volatile u_int *)pci->config_data, val);
+   out_le32((volatile uint32_t *)pci->config_data, val);
    return PCIBIOS_SUCCESSFUL;
 }
 
@@ -644,7 +644,7 @@ direct_pci_read_config_word(unsigned char bus, unsigned char dev_fn,
    if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
       return PCIBIOS_DEVICE_NOT_FOUND;
    }
-   *val=in_le16((volatile u_short *)
+   *val=in_le16((volatile uint16_t *)
                 (pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
                  + (PCI_FUNC(dev_fn)<<8) + offset));
    return PCIBIOS_SUCCESSFUL;
@@ -658,7 +658,7 @@ direct_pci_read_config_dword(unsigned char bus, unsigned char dev_fn,
    if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
       return PCIBIOS_DEVICE_NOT_FOUND;
    }
-   *val=in_le32((volatile u_int *)
+   *val=in_le32((volatile uint32_t *)
                 (pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
                  + (PCI_FUNC(dev_fn)<<8) + offset));
    return PCIBIOS_SUCCESSFUL;
@@ -683,7 +683,7 @@ direct_pci_write_config_word(unsigned char bus, unsigned char dev_fn,
    if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
       return PCIBIOS_DEVICE_NOT_FOUND;
    }
-   out_le16((volatile u_short *)
+   out_le16((volatile uint16_t *)
             (pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
              + (PCI_FUNC(dev_fn)<<8) + offset),
             val);
@@ -697,7 +697,7 @@ direct_pci_write_config_dword(unsigned char bus, unsigned char dev_fn,
    if (bus != 0 || (1<<PCI_SLOT(dev_fn) & 0xff8007fe)) {
       return PCIBIOS_DEVICE_NOT_FOUND;
    }
-   out_le32((volatile u_int *)
+   out_le32((volatile uint32_t *)
             (pci->config_data + ((1<<PCI_SLOT(dev_fn))&~1)
              + (PCI_FUNC(dev_fn)<<8) + offset),
             val);
diff --git a/c/src/lib/libbsp/powerpc/shared/console/console.inl b/c/src/lib/libbsp/powerpc/shared/console/console.inl
index 1e300ef01a..177444e870 100644
--- a/c/src/lib/libbsp/powerpc/shared/console/console.inl
+++ b/c/src/lib/libbsp/powerpc/shared/console/console.inl
@@ -6,17 +6,18 @@
  */
 
 #include <bsp.h>
+#include <stdint.h>
 
 #define INL_IN_DECL(name,base) \
 static inline unsigned char name(int off) \
 { \
-	return in_8((unsigned char*)(((unsigned long)base) + off)); \
+	return in_8((uint8_t*)(((unsigned long)base) + off)); \
 }
 
 #define INL_OUT_DECL(name,base) \
 static inline void name(int off, unsigned int val) \
 { \
-	out_8((unsigned char*)(((unsigned long)base) + off), val); \
+	out_8((uint8_t*)(((unsigned long)base) + off), val); \
 }
 
 #ifdef BSP_UART_IOBASE_COM1
diff --git a/c/src/lib/libbsp/powerpc/shared/console/uart.c b/c/src/lib/libbsp/powerpc/shared/console/uart.c
index 917fd5bf7c..cd8657cfda 100644
--- a/c/src/lib/libbsp/powerpc/shared/console/uart.c
+++ b/c/src/lib/libbsp/powerpc/shared/console/uart.c
@@ -5,6 +5,7 @@
  * an endorsement by T.sqware of the product in which it is included.
  */
 
+#include <stdint.h>
 #include <stdio.h>
 #include <bsp.h>
 #include <bsp/irq.h>
@@ -72,13 +73,13 @@ static struct uart_data uart_data[2] = {
 static inline unsigned char
 uread(int uart, unsigned int reg)
 {
-	return in_8((unsigned char*)(uart_data[uart].ioBase + reg));
+	return in_8((uint8_t*)(uart_data[uart].ioBase + reg));
 }
 
 static inline void
 uwrite(int uart, int reg, unsigned int val)
 {
-	out_8((unsigned char*)(uart_data[uart].ioBase + reg), val);
+	out_8((uint8_t*)(uart_data[uart].ioBase + reg), val);
 }
 
 
diff --git a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
index 87090d87a7..fa37079f77 100644
--- a/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
+++ b/c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
@@ -92,9 +92,9 @@ static inline unsigned int openpic_read(volatile unsigned int *addr)
     unsigned int val;
 
 #ifdef BSP_OPEN_PIC_BIG_ENDIAN
-	val = in_be32(addr);
+	val = in_be32((volatile uint32_t *)addr);
 #else
-    val = in_le32(addr);
+    val = in_le32((volatile uint32_t *)addr);
 #endif
 #ifdef REGISTER_DEBUG
     printk("openpic_read(0x%08x) = 0x%08x\n", (unsigned int)addr, val);
@@ -108,9 +108,9 @@ static inline void openpic_write(volatile unsigned int *addr, unsigned int val)
     printk("openpic_write(0x%08x, 0x%08x)\n", (unsigned int)addr, val);
 #endif
 #ifdef BSP_OPEN_PIC_BIG_ENDIAN
-    out_be32(addr, val);
+    out_be32((volatile uint32_t *)addr, val);
 #else
-	out_le32(addr, val);
+	out_le32((volatile uint32_t *)addr, val);
 #endif
 }
 
@@ -307,7 +307,7 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses
 		 */
 		uint32_t eicr_val, ratio;
 		/* On the 8240 this is the EICR register */
-		eicr_val = in_le32( &OpenPIC->Global.Global_Configuration1 ) & ~(7<<28);
+		eicr_val = in_le32( (volatile uint32_t *)&OpenPIC->Global.Global_Configuration1 ) & ~(7<<28);
 		if ( (1<<27) & eicr_val ) {
 			/* serial interface mode enabled */
 
@@ -318,7 +318,7 @@ void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses
 			ratio >>= 2; /* EICR value is half actual divisor */
 			if ( 0==ratio )
 				ratio = 1;
-			out_le32(&OpenPIC->Global.Global_Configuration1, eicr_val | ((ratio &7) << 28));
+			out_le32((volatile uint32_t *)&OpenPIC->Global.Global_Configuration1, eicr_val | ((ratio &7) << 28));
 			/*  Delay in TB cycles (assuming TB runs at 1/4 of the bus frequency) */
 			openpic_set_eoi_delay( 16 * (2*ratio) / 4 );
 		}
diff --git a/c/src/lib/libbsp/powerpc/shared/pci/pci.c b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
index 6cdc4be3b7..f75151ad46 100644
--- a/c/src/lib/libbsp/powerpc/shared/pci/pci.c
+++ b/c/src/lib/libbsp/powerpc/shared/pci/pci.c
@@ -43,7 +43,7 @@
 #endif
 
 #ifndef  PCI_CONFIG_WR_ADDR
-#define  PCI_CONFIG_WR_ADDR( addr, val ) out_le32((unsigned int*)(addr), (val))
+#define  PCI_CONFIG_WR_ADDR( addr, val ) out_le32((volatile uint32_t*)(addr), (val))
 #endif
 
 #define PCI_CONFIG_SET_ADDR(addr, bus, slot,function,offset) \
@@ -83,7 +83,7 @@ indirect_pci_read_config_word(
     return PCIBIOS_BAD_REGISTER_NUMBER;
 
   PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
-  *val = in_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)));
+  *val = in_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)));
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -100,7 +100,7 @@ indirect_pci_read_config_dword(
     return PCIBIOS_BAD_REGISTER_NUMBER;
 
   PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
-  *val = in_le32((volatile unsigned int *)pci.pci_config_data);
+  *val = in_le32((volatile uint32_t *)pci.pci_config_data);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -129,7 +129,7 @@ indirect_pci_write_config_word(
     return PCIBIOS_BAD_REGISTER_NUMBER;
 
   PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
-  out_le16((volatile unsigned short *)(pci.pci_config_data + (offset&3)), val);
+  out_le16((volatile uint16_t *)(pci.pci_config_data + (offset&3)), val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -144,7 +144,7 @@ indirect_pci_write_config_dword(
   if (offset&3)
     return PCIBIOS_BAD_REGISTER_NUMBER;
   PCI_CONFIG_SET_ADDR(pci.pci_config_addr, bus, slot, function, offset);
-  out_le32((volatile unsigned int *)pci.pci_config_data, val);
+  out_le32((volatile uint32_t *)pci.pci_config_data, val);
   return PCIBIOS_SUCCESSFUL;
 }
 
@@ -194,7 +194,7 @@ direct_pci_read_config_word(
   if (bus != 0 || (1<<slot & 0xff8007fe))
      return PCIBIOS_DEVICE_NOT_FOUND;
 
-  *val=in_le16((volatile unsigned short *)
+  *val=in_le16((volatile uint16_t *)
       (pci.pci_config_data + ((1<<slot)&~1)
        + (function<<8) + offset));
   return PCIBIOS_SUCCESSFUL;
@@ -214,7 +214,7 @@ direct_pci_read_config_dword(
   if (bus != 0 || (1<<slot & 0xff8007fe))
      return PCIBIOS_DEVICE_NOT_FOUND;
 
-  *val=in_le32((volatile unsigned int *)
+  *val=in_le32((volatile uint32_t *)
       (pci.pci_config_data + ((1<<slot)&~1)
        + (function<<8) + offset));
   return PCIBIOS_SUCCESSFUL;
@@ -250,7 +250,7 @@ direct_pci_write_config_word(
   if (bus != 0 || (1<<slot & 0xff8007fe))
      return PCIBIOS_DEVICE_NOT_FOUND;
 
-  out_le16((volatile unsigned short *)
+  out_le16((volatile uint16_t *)
      (pci.pci_config_data + ((1<<slot)&~1)
    + (function<<8) + offset),
      val);
@@ -270,7 +270,7 @@ direct_pci_write_config_dword(
   if (bus != 0 || (1<<slot & 0xff8007fe))
      return PCIBIOS_DEVICE_NOT_FOUND;
 
-  out_le32((volatile unsigned int *)
+  out_le32((volatile uint32_t *)
      (pci.pci_config_data + ((1<<slot)&~1)
    + (function<<8) + offset),
      val);
diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
index 08dc12b225..0f450fcaac 100644
--- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
+++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
@@ -124,8 +124,8 @@ unsigned int EUMBBAR;
  * Processor Address Map B (CHRP).
  */
 static unsigned int get_eumbbar(void) {
-  out_le32( (volatile unsigned *)0xfec00000, 0x80000078 );
-  return in_le32( (volatile unsigned *)0xfee00000 );
+  out_le32( (volatile uint32_t *)0xfec00000, 0x80000078 );
+  return in_le32( (volatile uint32_t *)0xfee00000 );
 }
 #endif
 
diff --git a/c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c b/c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c
index 2ff0b0402b..5f46de7601 100644
--- a/c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c
+++ b/c/src/lib/libbsp/shared/vmeUniverse/vmeTsi148.c
@@ -326,12 +326,12 @@
 #define TSI_CRG_SIZE		(1<<12)		/* 4k */
 
 
-#define TSI_RD(base, reg)				in_be32((volatile unsigned *)((base) + (reg)/sizeof(*base)))
-#define TSI_RD16(base, reg)				in_be16((volatile unsigned short *)(base) + (reg)/sizeof(short))
-#define TSI_LE_RD16(base, reg) 			in_le16((volatile unsigned short *)(base) + (reg)/sizeof(short))
-#define TSI_LE_RD32(base, reg) 			in_le32((volatile unsigned *)(base) + (reg)/sizeof(*base))
-#define TSI_RD8(base, reg)				in_8((volatile unsigned char *)(base) + (reg))
-#define TSI_WR(base, reg, val)			out_be32((volatile unsigned *)((base) + (reg)/sizeof(*base)), val)
+#define TSI_RD(base, reg)				in_be32((volatile uint32_t *)((base) + (reg)/sizeof(*base)))
+#define TSI_RD16(base, reg)				in_be16((volatile uint16_t *)(base) + (reg)/sizeof(uint16_t))
+#define TSI_LE_RD16(base, reg) 			in_le16((volatile uint16_t *)(base) + (reg)/sizeof(uint16_t))
+#define TSI_LE_RD32(base, reg) 			in_le32((volatile uint32_t *)(base) + (reg)/sizeof(*base))
+#define TSI_RD8(base, reg)				in_8((volatile uint8_t *)(base) + (reg))
+#define TSI_WR(base, reg, val)			out_be32((volatile uint32_t *)((base) + (reg)/sizeof(*base)), val)
 
 #define UNIV_SCTL_AM_MASK	(UNIV_CTL_VAS | UNIV_SCTL_PGM | UNIV_SCTL_DAT | UNIV_SCTL_USER | UNIV_SCTL_SUPER)
 
diff --git a/c/src/lib/libcpu/powerpc/shared/include/io.h b/c/src/lib/libcpu/powerpc/shared/include/io.h
index 0f06c54692..841df81f47 100644
--- a/c/src/lib/libcpu/powerpc/shared/include/io.h
+++ b/c/src/lib/libcpu/powerpc/shared/include/io.h
@@ -30,6 +30,7 @@
 #ifndef ASM
 
 #include <bsp.h>		/* for _IO_BASE & friends */
+#include <stdint.h>
 
 /* NOTE: The use of these macros is DISCOURAGED.
  *       you should consider e.g. using in_xxx / out_xxx
@@ -37,12 +38,12 @@
  *       defined by the BSP. This makes drivers easier
  *       to port.
  */
-#define inb(port)		in_8((unsigned char *)((port)+_IO_BASE))
-#define outb(val, port)		out_8((unsigned char *)((port)+_IO_BASE), (val))
-#define inw(port)		in_le16((unsigned short *)((port)+_IO_BASE))
-#define outw(val, port)		out_le16((unsigned short *)((port)+_IO_BASE), (val))
-#define inl(port)		in_le32((unsigned *)((port)+_IO_BASE))
-#define outl(val, port)		out_le32((unsigned *)((port)+_IO_BASE), (val))
+#define inb(port)		in_8((uint8_t *)((port)+_IO_BASE))
+#define outb(val, port)		out_8((uint8_t *)((port)+_IO_BASE), (val))
+#define inw(port)		in_le16((uint16_t *)((port)+_IO_BASE))
+#define outw(val, port)		out_le16((uint16_t *)((port)+_IO_BASE), (val))
+#define inl(port)		in_le32((uint32_t *)((port)+_IO_BASE))
+#define outl(val, port)		out_le32((uint32_t *)((port)+_IO_BASE), (val))
 
 /*
  * Enforce In-order Execution of I/O:
@@ -65,71 +66,71 @@ static inline void eieio(void)
 /*
  * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
  */
-static inline int in_8(volatile unsigned char *addr)
+static inline uint8_t in_8(const volatile uint8_t *addr)
 {
-	int ret;
+	uint8_t ret;
 
 	__asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-static inline void out_8(volatile unsigned char *addr, int val)
+static inline void out_8(volatile uint8_t *addr, uint8_t val)
 {
 	__asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }
 
-static inline int in_le16(volatile unsigned short *addr)
+static inline uint16_t in_le16(const volatile uint16_t *addr)
 {
-	int ret;
+	uint16_t ret;
 
 	__asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
 			      "r" (addr), "m" (*addr));
 	return ret;
 }
 
-static inline int in_be16(volatile unsigned short *addr)
+static inline uint16_t in_be16(const volatile uint16_t *addr)
 {
-	int ret;
+	uint16_t ret;
 
 	__asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-static inline void out_le16(volatile unsigned short *addr, int val)
+static inline void out_le16(volatile uint16_t *addr, uint16_t val)
 {
 	__asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
 			      "r" (val), "r" (addr));
 }
 
-static inline void out_be16(volatile unsigned short *addr, int val)
+static inline void out_be16(volatile uint16_t *addr, uint16_t val)
 {
 	__asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }
 
-static inline unsigned in_le32(volatile unsigned *addr)
+static inline uint32_t in_le32(const volatile uint32_t *addr)
 {
-	unsigned ret;
+	uint32_t ret;
 
 	__asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
 			     "r" (addr), "m" (*addr));
 	return ret;
 }
 
-static inline unsigned in_be32(volatile unsigned *addr)
+static inline uint32_t in_be32(const volatile uint32_t *addr)
 {
-	unsigned ret;
+	uint32_t ret;
 
 	__asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
 	return ret;
 }
 
-static inline void out_le32(volatile unsigned *addr, int val)
+static inline void out_le32(volatile uint32_t *addr, uint32_t val)
 {
 	__asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
 			     "r" (val), "r" (addr));
 }
 
-static inline void out_be32(volatile unsigned *addr, int val)
+static inline void out_be32(volatile uint32_t *addr, uint32_t val)
 {
 	__asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
 }