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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-01-07 14:55:23 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-01-07 15:07:42 +0100 |
| commit | 2570a2a89684f90ac66aa47ce64b67360d0d25ab (patch) | |
| tree | 2039eed074b9fadff6f6fc59ad593c4e3d54509a | |
| parent | arm: Implement CPU_Exception_frame_print() (diff) | |
| download | rtems-2570a2a89684f90ac66aa47ce64b67360d0d25ab.tar.bz2 | |
arm: Add AIRCR register defines
| -rw-r--r-- | cpukit/score/cpu/arm/rtems/score/armv7m.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/armv7m.h b/cpukit/score/cpu/arm/rtems/score/armv7m.h index f029b693e3..9b56f797c7 100644 --- a/cpukit/score/cpu/arm/rtems/score/armv7m.h +++ b/cpukit/score/cpu/arm/rtems/score/armv7m.h @@ -59,6 +59,21 @@ typedef struct { uint32_t icsr; ARMV7M_Exception_handler *vtor; + +#define ARMV7M_SCB_AIRCR_VECTKEY (0x05fa << 16) +#define ARMV7M_SCB_AIRCR_ENDIANESS (1U << 15) +#define ARMV7M_SCB_AIRCR_PRIGROUP_SHIFT 8 +#define ARMV7M_SCB_AIRCR_PRIGROUP_MASK \ + ((0x7U) << ARMV7M_SCB_AIRCR_PRIGROUP_SHIFT) +#define ARMV7M_SCB_AIRCR_PRIGROUP(val) \ + (((val) << ARMV7M_SCB_AIRCR_PRIGROUP_SHIFT) & ARMV7M_SCB_AIRCR_PRIGROUP_MASK) +#define ARMV7M_SCB_AIRCR_PRIGROUP_GET(reg) \ + (((val) & ARMV7M_SCB_AIRCR_PRIGROUP_MASK) >> ARMV7M_SCB_AIRCR_PRIGROUP_SHIFT) +#define ARMV7M_SCB_AIRCR_PRIGROUP_SET(reg, val) \ + (((reg) & ~ARMV7M_SCB_AIRCR_PRIGROUP_MASK) | ARMV7M_SCB_AIRCR_PRIGROUP(val)) +#define ARMV7M_SCB_AIRCR_SYSRESETREQ (1U << 2) +#define ARMV7M_SCB_AIRCR_VECTCLRACTIVE (1U << 1) +#define ARMV7M_SCB_AIRCR_VECTRESET (1U << 0) uint32_t aircr; uint32_t scr; uint32_t ccr; |