diff options
| author | Chris Johns <chrisj@rtems.org> | 2016-05-31 17:36:52 +1000 |
|---|---|---|
| committer | Chris Johns <chrisj@rtems.org> | 2016-06-03 17:28:58 +1000 |
| commit | 23213135d1164c1994e60be16fcda498b660d960 (patch) | |
| tree | 023e0267143e132b541a2d236eae0a5369839555 | |
| parent | score: Maybe fix _Thread_Lock_acquire() (diff) | |
| download | rtems-23213135d1164c1994e60be16fcda498b660d960.tar.bz2 | |
arm: Fix printk warnings.
| -rw-r--r-- | cpukit/score/cpu/arm/arm-exception-frame-print.c | 34 |
1 files changed, 18 insertions, 16 deletions
diff --git a/cpukit/score/cpu/arm/arm-exception-frame-print.c b/cpukit/score/cpu/arm/arm-exception-frame-print.c index eaeef94062..3ec927a064 100644 --- a/cpukit/score/cpu/arm/arm-exception-frame-print.c +++ b/cpukit/score/cpu/arm/arm-exception-frame-print.c @@ -16,6 +16,8 @@ #include "config.h" #endif +#include <inttypes.h> + #include <rtems/score/cpu.h> #include <rtems/bspIo.h> @@ -27,7 +29,7 @@ static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) int i; printk( - "FPEXC = 0x%08x\nFPSCR = 0x%08x\n", + "FPEXC = 0x%08" PRIx32 "\nFPSCR = 0x%08" PRIx32 "\n", vfp_context->register_fpexc, vfp_context->register_fpscr ); @@ -36,7 +38,7 @@ static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) uint32_t low = (uint32_t) dx[i]; uint32_t high = (uint32_t) (dx[i] >> 32); - printk( "D%02i = 0x%08x%08x\n", i, high, low ); + printk( "D%02i = 0x%08" PRIx32 "%08" PRIx32 "\n", i, high, low ); } } #endif @@ -46,20 +48,20 @@ void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) { printk( "\n" - "R0 = 0x%08x R8 = 0x%08x\n" - "R1 = 0x%08x R9 = 0x%08x\n" - "R2 = 0x%08x R10 = 0x%08x\n" - "R3 = 0x%08x R11 = 0x%08x\n" - "R4 = 0x%08x R12 = 0x%08x\n" - "R5 = 0x%08x SP = 0x%08x\n" - "R6 = 0x%08x LR = 0x%08x\n" - "R7 = 0x%08x PC = 0x%08x\n" + "R0 = 0x%08" PRIx32 " R8 = 0x%08" PRIx32 "\n" + "R1 = 0x%08" PRIx32 " R9 = 0x%08" PRIx32 "\n" + "R2 = 0x%08" PRIx32 " R10 = 0x%08" PRIx32 "\n" + "R3 = 0x%08" PRIx32 " R11 = 0x%08" PRIx32 "\n" + "R4 = 0x%08" PRIx32 " R12 = 0x%08" PRIx32 "\n" + "R5 = 0x%08" PRIx32 " SP = 0x%08" PRIx32 "\n" + "R6 = 0x%08" PRIx32 " LR = 0x%08" PRIxPTR "\n" + "R7 = 0x%08" PRIx32 " PC = 0x%08" PRIxPTR "\n" #if defined(ARM_MULTILIB_ARCH_V4) - "CPSR = 0x%08x " + "CPSR = 0x%08" PRIx32 " " #elif defined(ARM_MULTILIB_ARCH_V7M) - "XPSR = 0x%08x " + "XPSR = 0x%08" PRIx32 " " #endif - "VEC = 0x%08x\n", + "VEC = 0x%08" PRIxPTR "\n", frame->register_r0, frame->register_r8, frame->register_r1, @@ -73,15 +75,15 @@ void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) frame->register_r5, frame->register_sp, frame->register_r6, - frame->register_lr, + (intptr_t) frame->register_lr, frame->register_r7, - frame->register_pc, + (intptr_t) frame->register_pc, #if defined(ARM_MULTILIB_ARCH_V4) frame->register_cpsr, #elif defined(ARM_MULTILIB_ARCH_V7M) frame->register_xpsr, #endif - frame->vector + (intptr_t) frame->vector ); _ARM_VFP_context_print( frame->vfp_context ); |