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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-26 15:46:04 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-07-30 09:53:24 +0200 |
| commit | 10b51ae7396192f311fe106fe870cdce62973f92 (patch) | |
| tree | 5c25aa1d85d32bcbb0d41e8f122f2c8986679f53 | |
| parent | score: Add assert to _Per_CPU_Get() (diff) | |
| download | rtems-10b51ae7396192f311fe106fe870cdce62973f92.tar.bz2 | |
score: Critical section change in _Thread_Dispatch
If we enter _Thread_Dispatch() then _Thread_Dispatch_disable_level must
be zero. Single processor RTEMS assumes that stores of non-zero values
to _Thread_Dispatch_disable_level are observed by interrupts as non-zero values.
Move the _Thread_Dispatch_set_disable_level( 1 ) out of the first ISR
disabled critical section. In case interrupts happen between the
_Thread_Dispatch_set_disable_level( 1 ) and _ISR_Disable( level ) then
the interrupt will observe a non-zero _Thread_Dispatch_disable_level and
will not issue a _Thread_Dispatch() and we can enter the ISR disabled
section directly after interrupt processing.
This change leads to symmetry between the single processor and SMP
configuration.
| -rw-r--r-- | cpukit/score/src/threaddispatch.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c index b91eca8165..ac906e44d9 100644 --- a/cpukit/score/src/threaddispatch.c +++ b/cpukit/score/src/threaddispatch.c @@ -70,6 +70,8 @@ void _Thread_Dispatch( void ) * If necessary, send dispatch request to other cores. */ _SMP_Request_other_cores_to_dispatch(); + #else + _Thread_Dispatch_set_disable_level( 1 ); #endif /* @@ -82,8 +84,6 @@ void _Thread_Dispatch( void ) #if defined(RTEMS_SMP) executing->is_executing = false; heir->is_executing = true; - #else - _Thread_Dispatch_set_disable_level( 1 ); #endif _Thread_Dispatch_necessary = false; _Thread_Executing = heir; |