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author | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2021-01-18 10:02:40 +0100 |
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committer | Christian Mauderer <christian.mauderer@embedded-brains.de> | 2021-01-21 10:29:15 +0100 |
commit | 0d44334ca1c35a23a90eca8945acfe95fc9e2827 (patch) | |
tree | 8f6206dd513b1044a9e8e9dd2c4f895d1ba337f4 | |
parent | bsps/arm: Fix MMU configuration (diff) | |
download | rtems-0d44334ca1c35a23a90eca8945acfe95fc9e2827.tar.bz2 |
bsp/imx: Fix system counter init for imx6
For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is
often used which doesn't initialize the counter. With this patch, we try
to auto-detect whether the counter is initialized or not and do the
initialization ourself if necessary.
Closes #4220
-rw-r--r-- | bsps/arm/imx/start/bspstart.c | 61 |
1 files changed, 60 insertions, 1 deletions
diff --git a/bsps/arm/imx/start/bspstart.c b/bsps/arm/imx/start/bspstart.c index 36f62993a6..07cf33a5ed 100644 --- a/bsps/arm/imx/start/bspstart.c +++ b/bsps/arm/imx/start/bspstart.c @@ -18,6 +18,7 @@ #include <bsp/fdt.h> #include <bsp/irq-generic.h> #include <bsp/linker-symbols.h> +#include <libcpu/arm-cp15.h> #include <libfdt.h> @@ -58,6 +59,60 @@ uint32_t bsp_fdt_map_intr(const uint32_t *intr, size_t icells) return intr[1] + MAGIC_IRQ_OFFSET; } +static bool imx_is_imx6(const void *fdt) +{ + /* + * At the moment: Check for some compatible strings that should be there + * somewhere in every fdt. + * + * FIXME: It would be nice if some CPU-ID could be used instead. But I didn't + * find one. + */ + int node; + + node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx6ul"); + if (node >= 0) { + return true; + } + + node = fdt_node_offset_by_compatible(fdt, -1, "fsl,imx6ull"); + if (node >= 0) { + return true; + } + + return false; +} + +#define SYSCNT_CNTCR (0x0) +#define SYSCNT_CNTCR_ENABLE (1 << 0) +#define SYSCNT_CNTCR_HDBG (1 << 1) +#define SYSCNT_CNTCR_FCREQ(n) (1 << (8 + (n))) +#define SYSCNT_CNTFID(n) (0x20 + 4 * (n)) + +static uint32_t imx_syscnt_enable_and_return_frequency(const void *fdt) +{ + uint32_t freq; + volatile void *syscnt_base; + + /* That's not in the usual FDTs. Sorry for falling back to a magic value. */ + if (imx_is_imx6(fdt)) { + syscnt_base = (void *)0x021dc000; + } else { + syscnt_base = (void *)0x306c0000; + } + + freq = *(uint32_t *)(syscnt_base + SYSCNT_CNTFID(0)); + + arm_cp15_set_counter_frequency(freq); + + *(uint32_t *)(syscnt_base + SYSCNT_CNTCR) = + SYSCNT_CNTCR_ENABLE | + SYSCNT_CNTCR_HDBG | + SYSCNT_CNTCR_FCREQ(0); + + return freq; +} + void arm_generic_timer_get_config( uint32_t *frequency, uint32_t *irq @@ -75,7 +130,11 @@ void arm_generic_timer_get_config( if (val != NULL && len >= 4) { *frequency = fdt32_to_cpu(val[0]); } else { - bsp_fatal(IMX_FATAL_GENERIC_TIMER_FREQUENCY); + /* + * Normally clock-frequency would be provided by the boot loader. If it + * didn't add one, we have to initialize the system counter ourself. + */ + *frequency = imx_syscnt_enable_and_return_frequency(fdt); } /* FIXME: Figure out how Linux gets a proper IRQ number */ |