From a81a237f3e2318d88a16b31aadb82333498e06fd Mon Sep 17 00:00:00 2001 From: Jiri Gaisler Date: Thu, 10 Sep 2020 08:56:32 +0200 Subject: Add sis to RISC-V build --- rtems/config/6/rtems-riscv.bset | 1 + 1 file changed, 1 insertion(+) diff --git a/rtems/config/6/rtems-riscv.bset b/rtems/config/6/rtems-riscv.bset index 42a4ebd..ad7cb5b 100644 --- a/rtems/config/6/rtems-riscv.bset +++ b/rtems/config/6/rtems-riscv.bset @@ -2,3 +2,4 @@ %define rtems_arch riscv %define with_libgomp %include 6/rtems-default.bset +devel/sis-2-1 -- cgit v1.2.3