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authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-09-07 08:34:34 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-01-10 09:53:33 +0100
commitc07da019f311447ef88c53fd63301935e40d7136 (patch)
tree44e2adb327abba0f387a27d57f6dc6b79c676f6b
parentif_dwc: Avoid mbuf use after free (diff)
downloadrtems-libbsd-c07da019f311447ef88c53fd63301935e40d7136.tar.bz2
if_dwc: Fix a possible interrupt starvation
-rw-r--r--freebsd/sys/dev/dwc/if_dwc.c29
-rw-r--r--freebsd/sys/dev/dwc/if_dwc.h1
2 files changed, 13 insertions, 17 deletions
diff --git a/freebsd/sys/dev/dwc/if_dwc.c b/freebsd/sys/dev/dwc/if_dwc.c
index 98885edc..1d606977 100644
--- a/freebsd/sys/dev/dwc/if_dwc.c
+++ b/freebsd/sys/dev/dwc/if_dwc.c
@@ -893,27 +893,22 @@ dwc_intr(void *arg)
READ4(sc, SGMII_RGMII_SMII_CTRL_STATUS);
reg = READ4(sc, DMA_STATUS);
- if (reg & DMA_STATUS_NIS) {
- if (reg & DMA_STATUS_RI)
- dwc_rxfinish_locked(sc);
+ WRITE4(sc, DMA_STATUS, reg & DMA_STATUS_INTR_MASK);
- if (reg & DMA_STATUS_TI) {
- dwc_txfinish_locked(sc);
- dwc_txstart_locked(sc);
- }
- }
+ if (reg & (DMA_STATUS_RI | DMA_STATUS_RU))
+ dwc_rxfinish_locked(sc);
- if (reg & DMA_STATUS_AIS) {
- if (reg & DMA_STATUS_FBI) {
- /* Fatal bus error */
- device_printf(sc->dev,
- "Ethernet DMA error, restarting controller.\n");
- dwc_stop_locked(sc);
- dwc_init_locked(sc);
- }
+ if (reg & DMA_STATUS_TI)
+ dwc_txfinish_locked(sc);
+
+ if (reg & DMA_STATUS_FBI) {
+ /* Fatal bus error */
+ device_printf(sc->dev,
+ "Ethernet DMA error, restarting controller.\n");
+ dwc_stop_locked(sc);
+ dwc_init_locked(sc);
}
- WRITE4(sc, DMA_STATUS, reg & DMA_STATUS_INTR_MASK);
DWC_UNLOCK(sc);
}
diff --git a/freebsd/sys/dev/dwc/if_dwc.h b/freebsd/sys/dev/dwc/if_dwc.h
index d6078baa..79a6ba14 100644
--- a/freebsd/sys/dev/dwc/if_dwc.h
+++ b/freebsd/sys/dev/dwc/if_dwc.h
@@ -231,6 +231,7 @@
#define DMA_STATUS_NIS (1 << 16)
#define DMA_STATUS_AIS (1 << 15)
#define DMA_STATUS_FBI (1 << 13)
+#define DMA_STATUS_RU (1 << 7)
#define DMA_STATUS_RI (1 << 6)
#define DMA_STATUS_TI (1 << 0)
#define DMA_STATUS_INTR_MASK 0x1ffff